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1. 发明授权

US07512729B2 Method and apparatus for a high efficiency two-stage rotating priority arbiter with predictable arbitration latency 有权
标题翻译：具有可预测仲裁延迟的高效率两阶段旋转优先仲裁器的方法和装置
公开(公告)号：US07512729B2
公开(公告)日：2009-03-31
申请号：US11097067
申请日：2005-03-31
申请人： Bijoy Bose , Sridhar Lakshmanamurthy , Mark B. Rosenbluth , Irwin J. Vaz , Suri Medapati , Edwin O'Yang
发明人： Bijoy Bose , Sridhar Lakshmanamurthy , Mark B. Rosenbluth , Irwin J. Vaz , Suri Medapati , Edwin O'Yang
IPC分类号： G06F13/00
CPC分类号： H04L49/101 , H04L49/254
摘要： A scalable, two-stage rotating priority arbiter with re-circulation and bounded latency for use in multi-threaded, multi-processing devices. An apparatus implementing the two-stage arbiter includes a plurality of masters configured in a plurality of clusters, a plurality of targets, and an chassis interconnect that may be controlled to selectively connects a given master to a given target. The chassis interconnect includes multiple sets of bus lines connected between the plurality of clusters and the plurality of targets forming a cross-bar interconnect, including sets of bus lines corresponding to a command bus. A two-stage arbitration scheme is employed to arbitrate access to the command bus. The first arbitration stage is used to arbitrate between target requests issued by masters in a given cluster. The second arbitration stage is used to arbitrate between winning first-stage target requests. One embodiment of the arbitration scheme employs a rotating priority arbitration scheme at the first stage. Another embodiment employs a complementary rotating priority arbitration scheme at the second stage.
摘要翻译：一种可扩展的两阶段旋转优先仲裁器，具有重新循环和有限延迟，可用于多线程多处理设备。实现两级仲裁器的装置包括配置在多个集群中的多个主机，多个目标以及可被控制以选择性地将给定主机连接到给定目标的机箱互连。底盘互连包括连接在多个群集之间的多组总线，并且多个目标形成横杆互连，包括对应于命令总线的总线线。采用两阶段仲裁方案仲裁访问命令总线。第一个仲裁阶段用于在给定群集中由主人发出的目标请求之间进行仲裁。第二仲裁阶段用于在获胜的第一阶段目标请求之间进行仲裁。仲裁方案的一个实施例在第一阶段采用旋转优先权仲裁方案。另一实施例在第二阶段采用互补旋转优先权仲裁方案。

2. 发明申请

US20060221980A1 Method and apparatus for a high efficiency two-stage rotating priority arbiter with predictable arbitration latency 有权
公开(公告)号：US20060221980A1
公开(公告)日：2006-10-05
申请号：US11097067
申请日：2005-03-31
申请人： Bijoy Bose , Sridhar Lakshmanamurthy , Mark Rosenbluth , Irwin Vaz , Suri Medapati , Edwin O'Yang
发明人： Bijoy Bose , Sridhar Lakshmanamurthy , Mark Rosenbluth , Irwin Vaz , Suri Medapati , Edwin O'Yang
IPC分类号： H04L12/56 , H04L12/28 , H04L12/66
CPC分类号： H04L49/101 , H04L49/254
摘要： A scalable, two-stage rotating priority arbiter with re-circulation and bounded latency for use in multi-threaded, multi-processing devices. An apparatus implementing the two-stage arbiter includes a plurality of masters configured in a plurality of clusters, a plurality of targets, and an chassis interconnect that may be controlled to selectively connects a given master to a given target. The chassis interconnect includes multiple sets of bus lines connected between the plurality of clusters and the plurality of targets forming a cross-bar interconnect, including sets of bus lines corresponding to a command bus. A two-stage arbitration scheme is employed to arbitrate access to the command bus. The first arbitration stage is used to arbitrate between target requests issued by masters in a given cluster. The second arbitration stage is used to arbitrate between winning first-stage target requests. One embodiment of the arbitration scheme employs a rotating priority arbitration scheme at the first stage. Another embodiment employs a complementary rotating priority arbitration scheme at the second stage.

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