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1. 发明申请

US20070200640A1 System and Method for Mitigating Phase Pulling in a Mulitple Frequency Source System 有权
标题翻译：用于减轻多频率源系统中的相拉的系统和方法
公开(公告)号：US20070200640A1
公开(公告)日：2007-08-30
申请号：US11461534
申请日：2006-08-01
申请人： Biagio Bisanti , Stefano Cipriani , Lorenzo Carpineto , Gianni Puccio , Eric Duvivier , Francesco Coppola , Martin Alderton
发明人： Biagio Bisanti , Stefano Cipriani , Lorenzo Carpineto , Gianni Puccio , Eric Duvivier , Francesco Coppola , Martin Alderton
IPC分类号： H03L7/00
CPC分类号： H03J5/244 , G06F1/06 , H03H11/1291 , H03J1/005 , H03J3/24 , H03J7/065 , H03J7/08 , H03J2200/10 , H03J2200/17 , H03L7/0891 , H03L7/093 , H03L7/099 , H03L7/10 , H03L7/1974 , H03L7/1976 , H03L7/22 , H03L7/23 , H03L2207/06
摘要： A method for mitigating phase pulling in multiple frequency source system includes generating a first signal, the first signal referred to as an existing signal operating at an existing frequency point, the existing signal having a predefined pulling bandwidth around the existing frequency point. A request is received to generate a prospective signal at a prospective frequency point which is within the predefined pulling bandwidth of the existing signal. The prospective frequency is removed from within the predefined pulling bandwidth, and the prospective and existing signals are generated at the corresponding frequency points.
摘要翻译：一种用于减轻多频率源系统中的相位拉动的方法包括产生第一信号，即在现有频点处工作的现有信号的第一信号，现有信号具有围绕现有频率点的预定义的拉动带宽。接收请求以在预期频率点产生预期信号，该预期频率点在现有信号的预定义的拉动带宽内。预定频率从预定义的拉动带宽内移除，并且在相应的频率点产生预期和现有的信号。

2. 发明授权

US07355483B2 System and method for mitigating phase pulling in a multiple frequency source system 有权
标题翻译：用于减轻多频源系统中的相位牵引的系统和方法
公开(公告)号：US07355483B2
公开(公告)日：2008-04-08
申请号：US11461534
申请日：2006-08-01
申请人： Biagio Bisanti , Stefano Cipriani , Lorenzo Carpineto , Gianni Puccio , Eric Duvivier , Francesco Coppola , Martin Alderton
发明人： Biagio Bisanti , Stefano Cipriani , Lorenzo Carpineto , Gianni Puccio , Eric Duvivier , Francesco Coppola , Martin Alderton
IPC分类号： H03L7/00 , H03L7/16 , H03L7/22
CPC分类号： H03J5/244 , G06F1/06 , H03H11/1291 , H03J1/005 , H03J3/24 , H03J7/065 , H03J7/08 , H03J2200/10 , H03J2200/17 , H03L7/0891 , H03L7/093 , H03L7/099 , H03L7/10 , H03L7/1974 , H03L7/1976 , H03L7/22 , H03L7/23 , H03L2207/06
摘要： A method for mitigating phase pulling in multiple frequency source system includes generating a first signal, the first signal referred to as an existing signal operating at an existing frequency point, the existing signal having a predefined pulling bandwidth around the existing frequency point. A request is received to generate a prospective signal at a prospective frequency point which is within the predefined pulling bandwidth of the existing signal. The prospective frequency is removed from within the predefined pulling bandwidth, and the prospective and existing signals are generated at the corresponding frequency points.
摘要翻译：一种用于减轻多频率源系统中的相位拉动的方法包括产生第一信号，即在现有频点处工作的现有信号的第一信号，现有信号具有围绕现有频率点的预定义的拉动带宽。接收请求以在预期频率点产生预期信号，该预期频率点在现有信号的预定义的拉动带宽内。预定频率从预定义的拉动带宽内移除，并且在相应的频率点产生预期和现有的信号。

3. 发明申请

US20070183014A1 Multiple Frequency Source System and Method of Operation 有权
标题翻译：多频源系统及其运行方式
公开(公告)号：US20070183014A1
公开(公告)日：2007-08-09
申请号：US11461530
申请日：2006-08-01
申请人： Francesco Coppola , Stefano Cipriani , Lorenzo Carpineto , Gianni Puccio , Eric Duvivier , Biagio Bisanti , Martin Alderton
发明人： Francesco Coppola , Stefano Cipriani , Lorenzo Carpineto , Gianni Puccio , Eric Duvivier , Biagio Bisanti , Martin Alderton
IPC分类号： G02B26/00 , G02F1/35 , G02F1/00 , G02F1/01 , G02F2/02
CPC分类号： H03J5/244 , G06F1/06 , H03H11/1291 , H03J1/005 , H03J3/24 , H03J7/065 , H03J7/08 , H03J2200/10 , H03J2200/17 , H03L7/0891 , H03L7/093 , H03L7/099 , H03L7/10 , H03L7/1974 , H03L7/1976 , H03L7/22 , H03L7/23 , H03L2207/06
摘要： A multiple frequency source system includes at least one frequency source tunable to a predefined target frequency, and at least one additional frequency source operable to generate a second signal at a frequency which is either higher or lower than the target frequency. A method for tuning the tunable frequency source to the target frequency during concurrent generation of the second signal includes (i) controlling the tunable frequency source to tune to at least one frequency point frequency lower than the target frequency, and thereafter controlling the oscillator to tune to the target frequency, when the second signal is higher in frequency than the target frequency, or (ii) controlling the tunable frequency source to tune to at least one frequency point higher than the target frequency, and thereafter controlling the tunable frequency source to tune to the target frequency, when the second signal is lower in frequency than the target frequency.
摘要翻译：多频率源系统包括可调谐到预定目标频率的至少一个频率源，以及可操作以产生频率高于或低于目标频率的第二信号的至少一个附加频率源。一种在并行产生第二信号期间将可调谐频率源调谐到目标频率的方法包括（i）控制可调谐频率源调谐到低于目标频率的至少一个频率点，然后控制振荡器调谐到目标频率，当第二信号的频率高于目标频率时，或者（ii）控制可调频率源调谐到比目标频率高的至少一个频率点，然后控制可调频率源调谐当第二信号的频率低于目标频率时，到目标频率。

4. 发明申请

US20070176663A1 Offset Signal Phasing for a Multiple Frequency Source System 有权
标题翻译：用于多频率源系统的偏移信号相位
公开(公告)号：US20070176663A1
公开(公告)日：2007-08-02
申请号：US11461533
申请日：2006-08-01
申请人： Biagio Bisanti , Stefano Cipriani , Lorenzo Carpineto , Gianni Puccio , Eric Duvivier , Francesco Coppola , Martin Alderton
发明人： Biagio Bisanti , Stefano Cipriani , Lorenzo Carpineto , Gianni Puccio , Eric Duvivier , Francesco Coppola , Martin Alderton
IPC分类号： G06F1/04
CPC分类号： H03J5/244 , G06F1/06 , H03H11/1291 , H03J1/005 , H03J3/24 , H03J7/065 , H03J7/08 , H03J2200/10 , H03J2200/17 , H03L7/0891 , H03L7/093 , H03L7/099 , H03L7/10 , H03L7/1974 , H03L7/1976 , H03L7/22 , H03L7/23 , H03L2207/06
摘要： A tunable multiple frequency source system employing offset signal phasing includes a first frequency source, a phase delay element, and a second frequency source configured to operate concurrently with the first frequency source. The first frequency source includes an input coupled to receive a reference input signal and an output for providing a first frequency source signal. The phase delay includes an input coupled to receive the input reference signal, and an output, the phase delay element operable to apply a predefined phase delay to the input reference signal to produce a phase-delayed input signal. The second frequency source includes an input coupled to receive the phase-delayed input signal and an output for providing a second frequency source signal.
摘要翻译：采用偏移信号定相的可调多频源系统包括被配置为与第一频率源同时运行的第一频率源，相位延迟元件和第二频率源。第一频率源包括耦合以接收参考输入信号的输入和用于提供第一频率源信号的输出。相位延迟包括耦合以接收输入参考信号的输入和输出，相位延迟元件可操作以将预定相位延迟施加到输入参考信号以产生相位延迟的输入信号。第二频率源包括耦合以接收相位延迟的输入信号的输入和用于提供第二频率源信号的输出。

5. 发明授权

US07653370B2 Offset signal phasing for a multiple frequency source system 有权
标题翻译：用于多频源系统的偏移信号定相
公开(公告)号：US07653370B2
公开(公告)日：2010-01-26
申请号：US11461533
申请日：2006-08-01
申请人： Biagio Bisanti , Stefano Cipriani , Lorenzo Carpineto , Gianni Puccio , Eric Duvivier , Francesco Coppola , Martin Alderton
发明人： Biagio Bisanti , Stefano Cipriani , Lorenzo Carpineto , Gianni Puccio , Eric Duvivier , Francesco Coppola , Martin Alderton
IPC分类号： H04B1/06
CPC分类号： H03J5/244 , G06F1/06 , H03H11/1291 , H03J1/005 , H03J3/24 , H03J7/065 , H03J7/08 , H03J2200/10 , H03J2200/17 , H03L7/0891 , H03L7/093 , H03L7/099 , H03L7/10 , H03L7/1974 , H03L7/1976 , H03L7/22 , H03L7/23 , H03L2207/06
摘要： A tunable multiple frequency source system employing offset signal phasing includes a first frequency source, a phase delay element, and a second frequency source configured to operate concurrently with the first frequency source. The first frequency source includes an input coupled to receive a reference input signal and an output for providing a first frequency source signal. The phase delay includes an input coupled to receive the input reference signal, and an output, the phase delay element operable to apply a predefined phase delay to the input reference signal to produce a phase-delayed input signal. The second frequency source includes an input coupled to receive the phase-delayed input signal and an output for providing a second frequency source signal.
摘要翻译：采用偏移信号定相的可调多频源系统包括被配置为与第一频率源同时运行的第一频率源，相位延迟元件和第二频率源。第一频率源包括耦合以接收参考输入信号的输入和用于提供第一频率源信号的输出。相位延迟包括耦合以接收输入参考信号的输入和输出，相位延迟元件可操作以将预定相位延迟施加到输入参考信号以产生相位延迟的输入信号。第二频率源包括耦合以接收相位延迟的输入信号的输入和用于提供第二频率源信号的输出。

6. 发明授权

US07528665B2 Multiple frequency source system and method of operation 有权
标题翻译：多频源系统及操作方法
公开(公告)号：US07528665B2
公开(公告)日：2009-05-05
申请号：US11461530
申请日：2006-08-01
申请人： Francesco Coppola , Stefano Cipriani , Lorenzo Carpineto , Gianni Puccio , Eric Duvivier , Biagio Bisanti , Martin Alderton
发明人： Francesco Coppola , Stefano Cipriani , Lorenzo Carpineto , Gianni Puccio , Eric Duvivier , Biagio Bisanti , Martin Alderton
IPC分类号： H03L7/00
CPC分类号： H03J5/244 , G06F1/06 , H03H11/1291 , H03J1/005 , H03J3/24 , H03J7/065 , H03J7/08 , H03J2200/10 , H03J2200/17 , H03L7/0891 , H03L7/093 , H03L7/099 , H03L7/10 , H03L7/1974 , H03L7/1976 , H03L7/22 , H03L7/23 , H03L2207/06
摘要： A multiple frequency source system includes at least one frequency source tunable to a predefined target frequency, and at least one additional frequency source operable to generate a second signal at a frequency which is either higher or lower than the target frequency. A method for tuning the tunable frequency source to the target frequency during concurrent generation of the second signal includes (i) controlling the tunable frequency source to tune to at least one frequency point frequency lower than the target frequency, and thereafter controlling the oscillator to tune to the target frequency, when the second signal is higher in frequency than the target frequency, or (ii) controlling the tunable frequency source to tune to at least one frequency point higher than the target frequency, and thereafter controlling the tunable frequency source to tune to the target frequency, when the second signal is lower in frequency than the target frequency.
摘要翻译：多频率源系统包括可调谐到预定目标频率的至少一个频率源，以及可操作以产生频率高于或低于目标频率的第二信号的至少一个附加频率源。一种在并行产生第二信号期间将可调谐频率源调谐到目标频率的方法包括（i）控制可调谐频率源调谐到低于目标频率的至少一个频率点，然后控制振荡器调谐到目标频率，当第二信号的频率高于目标频率时，或者（ii）控制可调频率源调谐到比目标频率高的至少一个频率点，然后控制可调频率源调谐当第二信号的频率低于目标频率时，到目标频率。

7. 发明授权

US06963233B2 Charge pump phase locked loop with improved power supply rejection 有权
标题翻译：充电泵锁相环，具有改进的电源抑制
公开(公告)号：US06963233B2
公开(公告)日：2005-11-08
申请号：US10793367
申请日：2004-03-03
申请人： Gianni Puccio , Biagio Bisanti , Stefano Cipriani
发明人： Gianni Puccio , Biagio Bisanti , Stefano Cipriani
IPC分类号： H03L7/00 , H03L7/06 , H03L7/089 , H03L7/18
CPC分类号： H03L7/0895 , H03L7/18
摘要： A phase lock loop circuit (60) has a phase frequency detector (62), a charge pump (64), an active filter (87) and a voltage-controlled oscillator (100). The phase detector generates signals responsive to reference signal FR and VCO output signal FV. A charge pump generates a voltage at the input of a first transmission gate (76) according to the values of the phase detector signals. A predetermined voltage is generated at the input of a second transmission gate (112). When the transmission gates (76, 110) are closed (low impedance) the charge pump may sink or source current to the inverting input of the operational amplifier (86) of the active filter 86 and the predetermined voltage is applied to the non-inverting input. When the transmission gates are open (high impedance state) the inverting input is electrically isolated from the node and the non-inverting output is isolated from the power supply.
摘要翻译：锁相环电路（60）具有相位频率检测器（62），电荷泵（64），有源滤波器（87）和压控振荡器（100）。相位检测器响应于参考信号F SUB和VCO输出信号F OUT产生信号。电荷泵根据相位检测器信号的值在第一传输门（76）的输入端产生电压。在第二传输门（112）的输入处产生预定电压。当传输门（76,110）闭合（低阻抗）时，电荷泵可以将有源滤波器86的运算放大器（86）的反相输入端的电流吸收或输出，并将预定的电压施加到非反相输入。当传输门打开（高阻抗状态）时，反相输入与节点电隔离，非反相输出与电源隔离。

8. 发明申请

US20050195002A1 CHARGE PUMP PHASE LOCKED LOOP WITH IMPROVED POWER SUPPLY REJECTION 有权
标题翻译：充电泵相位锁定环与改进的电源抑制
公开(公告)号：US20050195002A1
公开(公告)日：2005-09-08
申请号：US10793367
申请日：2004-03-03
申请人： Gianni Puccio , Biagio Bisanti , Stefano Cipriani
发明人： Gianni Puccio , Biagio Bisanti , Stefano Cipriani
IPC分类号： H03L7/00 , H03L7/06 , H03L7/089 , H03L7/18
CPC分类号： H03L7/0895 , H03L7/18
摘要： A phase lock loop circuit (60) has a phase frequency detector (62), a charge pump (64), an active filter (87) and a voltage-controlled oscillator (100). The phase detector generates signals responsive to reference signal FR and VCO output signal FV. A charge pump generates a voltage at the input of a first transmission gate (76) according to the values of the phase detector signals. A predetermined voltage is generated at the input of a second transmission gate (112). When the transmission gates (76, 110) are closed (low impedance) the charge pump may sink or source current to the inverting input of the operational amplifier (86) of the active filter 86 and the predetermined voltage is applied to the non-inverting input. When the transmission gates are open (high impedance state) the inverting input is electrically isolated from the node and the non-inverting output is isolated from the power supply.
摘要翻译：锁相环电路（60）具有相位频率检测器（62），电荷泵（64），有源滤波器（87）和压控振荡器（100）。相位检测器响应于参考信号F SUB和VCO输出信号F OUT产生信号。电荷泵根据相位检测器信号的值在第一传输门（76）的输入端产生电压。在第二传输门（112）的输入处产生预定电压。当传输门（76,110）关闭（低阻抗）时，电荷泵可以将有源滤波器86的运算放大器（86）的反相输入端的电流吸收或输出，并将预定的电压施加到非反相输入。当传输门打开（高阻抗状态）时，反相输入与节点电隔离，非反相输出与电源隔离。

9. 发明授权

US07158600B2 Charge pump phase locked loop 有权
标题翻译：电荷泵锁相环
公开(公告)号：US07158600B2
公开(公告)日：2007-01-02
申请号：US10154684
申请日：2002-05-24
申请人： Gianni Puccio , Biagio Bisanti , Stefano Cipriani
发明人： Gianni Puccio , Biagio Bisanti , Stefano Cipriani
IPC分类号： H03D3/24
CPC分类号： H03L7/0895
摘要： A phase lock loop circuit 60 has a phase frequency detector 62, a charge pump 64, an active filter 87 and a voltage-controlled oscillator 100. The phase detector generates UP and DN signals indicative of the relative frequency of FR, a reference signal, and FV, a signal controlled by the voltage-controlled oscillator. A charge pump using logic gates (buffer 66 and inverter 68) to produce a voltage drop over resistors 74 and 84 to generate a voltage at a node coupled to the input of transmission gate 76 according to the values of the UP and DN signals. When the transmission gate 76 is closed (low impedance) the charge pump may sink or source current to the inverting input of the operational amplifier 86 of the active filter 86. When the transmission gate is open (high impedance state) the inverting input is electrically isolated from the node.
摘要翻译：锁相环电路60具有相位频率检测器62，电荷泵64，有源滤波器87和压控振荡器100。相位检测器产生指示由压控振荡器控制的信号的F SUB相对频率，参考信号和F OUT的UP信号和DN信号。使用逻辑门（缓冲器66和反相器68）的电荷泵，以在电阻器74和84上产生电压降，以根据UP和DN信号的值在耦合到传输门76的输入端的节点处产生电压。当传输门76闭合（低阻抗）时，电荷泵可以将电流吸收或馈送到有源滤波器86的运算放大器86的反相输入端。当传输门打开（高阻抗状态）时，反相输入与节点电隔离。

10. 发明申请

US20050062551A1 High-speed, accurate trimming for electronically trimmed VCO 有权
标题翻译：用于电子修整VCO的高速，精确的修整
公开(公告)号：US20050062551A1
公开(公告)日：2005-03-24
申请号：US10667870
申请日：2003-09-22
申请人： Francesco Coppola , Gianni Puccio , Jean-Christophe Jiguet
发明人： Francesco Coppola , Gianni Puccio , Jean-Christophe Jiguet
IPC分类号： H03B5/12 , H03L7/099 , H03L7/10 , H03L7/193 , H03L7/199 , H03L7/00 , H03B5/00
CPC分类号： H03L7/199 , H03B5/1206 , H03B5/1243 , H03B5/1265 , H03B5/1293 , H03L7/099 , H03L7/10 , H03L7/193
摘要： A tuning circuit uses a VCO with a trimming capacitor bank. The trimming capacitor bank is calibrated by logic to accommodate a desired frequency, fwanted. A search renders an initial control word that is accurate within one LSB. In a first embodiment, comparisons between the desired frequency and the upper and lower frequency bounds of the VCO with the trimming capacitor bank configured by the initial control word. The control word may be increased or decreased based on the comparisons. In a second embodiment, differences between the desired frequency and the actual frequency of the VCO, with the trimming capacitor bank configured by the initial control word, are compared to a threshold. The control word may be increased or decreased based on the comparison.
摘要翻译：调谐电路使用具有微调电容器组的VCO。微调电容器组通过逻辑校准，以适应所需的频率。搜索会在一个LSB内呈现准确的初始控制字。在第一实施例中，期望频率与由初始控制字配置的微调电容器组的VCO的上限和下限频率之间的比较。可以基于比较来增加或减少控制字。在第二实施例中，将具有由初始控制字配置的微调电容器组的VCO的期望频率和实际频率之间的差异与阈值进行比较。基于比较可以增加或减少控制字。

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