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1. 发明申请

US20130077701A1 METHOD AND INTEGRATED CIRCUIT FOR ADJUSTING THE WIDTH OF AN INPUT/OUTPUT LINK 审中-公开
标题翻译：用于调整输入/输出链路宽度的方法和集成电路
公开(公告)号：US20130077701A1
公开(公告)日：2013-03-28
申请号：US13243086
申请日：2011-09-23
申请人： Benjamin Tsien , Kevin M. Lepak , Paul C. Miranda , William A. Hughes , Wade L. Williams , Chenping Yang , Adam L. From
发明人： Benjamin Tsien , Kevin M. Lepak , Paul C. Miranda , William A. Hughes , Wade L. Williams , Chenping Yang , Adam L. From
IPC分类号： H04L27/00
CPC分类号： G06F1/3253 , G06F13/4273 , H04L25/14 , H04W28/18 , Y02D10/151
摘要： A method and apparatus are described for adjusting a bit width of an input/output (I/O) link established between a transmitter and a receiver. The I/O link has a plurality of bit lanes. The transmitter may send to the receiver a command identifying at least one selected bit lane of the I/O link that will be powered off or powered on in response to detecting that a bit width adjustment threshold of the I/O link has been reached.
摘要翻译：描述了一种用于调整在发射机和接收机之间建立的输入/输出（I / O）链路的比特宽度的方法和装置。 I / O链路具有多个位通道。响应于检测到已经达到I / O链路的比特宽度调整阈值，发射机可以向接收机发送识别I / O链路的至少一个所选比特通道的命令，该I / O链路将被断电或上电。

2. 发明授权

US08195849B2 Device and method for transferring data between devices 有权
标题翻译：用于在设备之间传输数据的设备和方法
公开(公告)号：US08195849B2
公开(公告)日：2012-06-05
申请号：US12613837
申请日：2009-11-06
申请人： Wade L. Williams , Philip E. Madrid
发明人： Wade L. Williams , Philip E. Madrid
IPC分类号： G06F3/00 , G06F13/12 , G06F13/38
CPC分类号： G06F5/06
摘要： A device and method for transferring data is disclosed that facilitates data transfers between devices having different clock domains. The data transfer from one device to another occurs through a First In First Out memory (FIFO). The relative number of FIFO access cycles to the FIFO is controlled to maintain a desired FIFO fullness. Setting the desired FIFO fullness to a desired value allows control of data transfer latency between devices.
摘要翻译：公开了用于传送数据的设备和方法，其有助于在具有不同时钟域的设备之间进行数据传输。从一个设备到另一个设备的数据传输通过先进先出存储器（FIFO）进行。控制到FIFO的FIFO访问周期的相对数量以保持期望的FIFO充满度。将所需的FIFO饱和度设置为所需的值可以控制设备之间的数据传输延迟。

3. 发明授权

US07636803B2 Device and method for transferring data between devices 有权
标题翻译：用于在设备之间传输数据的设备和方法
公开(公告)号：US07636803B2
公开(公告)日：2009-12-22
申请号：US11528947
申请日：2006-09-28
申请人： Wade L. Williams , Philip E. Madrid
发明人： Wade L. Williams , Philip E. Madrid
IPC分类号： G06F3/00 , G06F5/00
CPC分类号： G06F5/06
摘要： A device and method for transferring data is disclosed that facilitates data transfers between devices having different clock domains. The data transfer from one device to another occurs through a First In First Out memory (FIFO). The relative number of FIFO access cycles to the FIFO is controlled to maintain a desired FIFO fullness. Setting the desired FIFO fullness to a desired value allows control of data transfer latency between devices.
摘要翻译：公开了用于传送数据的设备和方法，其有助于在具有不同时钟域的设备之间进行数据传输。从一个设备到另一个设备的数据传输通过先进先出存储器（FIFO）进行。控制到FIFO的FIFO访问周期的相对数量以保持期望的FIFO充满度。将所需的FIFO饱和度设置为所需的值可以控制设备之间的数据传输延迟。

4. 发明申请

US20100049887A1 DEVICE AND METHOD FOR TRANSFERRING DATA BETWEEN DEVICES 有权
标题翻译：用于传输设备之间的数据的设备和方法
公开(公告)号：US20100049887A1
公开(公告)日：2010-02-25
申请号：US12613837
申请日：2009-11-06
申请人： Wade L. Williams , Philip E. Madrid
发明人： Wade L. Williams , Philip E. Madrid
IPC分类号： G06F3/00 , G06F1/04
CPC分类号： G06F5/06
摘要： A device and method for transferring data is disclosed that facilitates data transfers between devices having different clock domains. The data transfer from one device to another occurs through a First In First Out memory (FIFO). The relative number of FIFO access cycles to the FIFO is controlled to maintain a desired FIFO fullness. Setting the desired FIFO fullness to a desired value allows control of data transfer latency between devices.
摘要翻译：公开了用于传送数据的设备和方法，其有助于在具有不同时钟域的设备之间进行数据传输。从一个设备到另一个设备的数据传输通过先进先出存储器（FIFO）进行。控制到FIFO的FIFO访问周期的相对数量以保持期望的FIFO充满度。将所需的FIFO饱和度设置为所需的值可以控制设备之间的数据传输延迟。

5. 发明申请

US20080147914A1 Device and method of data transfer 有权
标题翻译：数据传输的装置和方法
公开(公告)号：US20080147914A1
公开(公告)日：2008-06-19
申请号：US11528947
申请日：2006-09-28
申请人： Wade L. Williams , Philip E. Madrid
发明人： Wade L. Williams , Philip E. Madrid
IPC分类号： G06F5/00
CPC分类号： G06F5/06
摘要： Data transfer between different clock domains occurs through a FIFO. The relative number of read and write FIFO access cycles to the FIFO is controlled to maintain a desired latency.
摘要翻译：通过FIFO发生不同时钟域之间的数据传输。对FIFO的读写FIFO访问周期的相对数量进行控制以保持期望的延迟。

6. 发明授权

US08202331B2 Pump purge apparatus and method 有权
标题翻译：泵清洗装置和方法
公开(公告)号：US08202331B2
公开(公告)日：2012-06-19
申请号：US12245979
申请日：2008-10-06
申请人： Kyle Welker , Wade L. Williams
发明人： Kyle Welker , Wade L. Williams
IPC分类号： C10J1/28 , C10J3/46 , C01B3/32
CPC分类号： G05D11/133 , A61L9/00 , Y10T137/0329 , Y10T137/85978
摘要： When odorant injection systems are inactive, they may accumulate unwanted vapors in the pump mechanism and associated tubing. In order to restart the odorant injection system, it is best to purge the unwanted vapors from the odorant pumps. The present pump purge system facilitates purging of unwanted vapors from odorant injection systems in an environmentally friendly fashion. The pump purge system purifies these vapors before they are vented to atmosphere. In addition, the pump purge system accumulates liquid odorant which is a byproduct of the purging process and stores it in a tank to reduce the likelihood of improper disposal. As an option, the pump purge system may also include a liquid odorant recapture system. The liquid odorant recapture system uses high pressure gas to return accumulated liquid odorant to the odorant injection system to be reused. This liquid odorant recovery system ensures environmentally responsible behavior.
摘要翻译：当气味注射系统不活动时，它们可能在泵机构和相关管道中积聚不需要的蒸汽。为了重新启动加臭剂注射系统，最好从气味泵中清除不需要的蒸汽。本发明的泵清洗系统有助于以环保的方式从加臭剂注射系统中清除不需要的蒸气。泵清洗系统在排放到大气中之前将这些蒸气净化。此外，泵清洗系统积聚作为清洗过程的副产物的液体气味剂，并将其储存在罐中以减少不当处置的可能性。作为选择，泵清洗系统还可以包括液体气味再捕获系统。液体加味剂再捕获系统使用高压气体将积存的液体气味剂返回到要再利用的加臭剂注射系统。这种液体气味回收系统确保环境负责的行为。

7. 发明申请

US20100084025A1 APPARATUS AND METHOD FOR VENTING AND DEPRESSURIZATION OF AN ODORANT INJECTION SYSTEM 审中-公开
标题翻译：装置和方法，用于喷射和喷射气味注射系统
公开(公告)号：US20100084025A1
公开(公告)日：2010-04-08
申请号：US12248002
申请日：2008-10-08
申请人： Kyle Welker , Wade L. Williams
发明人： Kyle Welker , Wade L. Williams
IPC分类号： E03D9/03
CPC分类号： G05D16/2026 , Y10T137/0329 , Y10T137/3112
摘要： The apparatus and method for venting and depressurization of an odorant injection system may be used on special LNG tankers that have onboard gasification equipment, on land or elsewhere. Odorant injection systems may operate at high pressures on an intermittent basis. On some occasions, the odorant is drained from a pressurized system and disposed of in inappropriate ways. The present invention depressurizes an odorant injection system and transfers the unwanted liquid odorant back into an odorant tank where it can be reused when the odorant injection system is restarted.
摘要翻译：用于气味喷射系统的排放和减压的装置和方法可用于具有船上气化设备，陆地或其他地方的特殊LNG罐车。气味注射系统可以间歇地在高压下运行。在某些情况下，加臭剂从加压系统排出并以不适当的方式处理。本发明减压加气剂注射系统，并将不想要的液体加臭剂转移回加臭剂罐中，在加臭剂注射系统重新开始时可以重新使用。

8. 发明申请

US20100084020A1 PUMP PURGE APPARATUS AND METHOD 有权
标题翻译：泵浦装置和方法
公开(公告)号：US20100084020A1
公开(公告)日：2010-04-08
申请号：US12245979
申请日：2008-10-06
申请人： Kyle Welker , Wade L. Williams
发明人： Kyle Welker , Wade L. Williams
IPC分类号： E03B5/00
CPC分类号： G05D11/133 , A61L9/00 , Y10T137/0329 , Y10T137/85978
摘要： When odorant injection systems are inactive, they may accumulate unwanted vapors in the pump mechanism and associated tubing. In order to restart the odorant injection system, it is best to purge the unwanted vapors from the odorant pumps. The present pump purge system facilitates purging of unwanted vapors from odorant injection systems in an environmentally friendly fashion. The pump purge system purifies these vapors before they are vented to atmosphere. In addition, the pump purge system accumulates liquid odorant which is a byproduct of the purging process and stores it in a tank to reduce the likelihood of improper disposal. As an option, the pump purge system may also include a liquid odorant recapture system. The liquid odorant recapture system uses high pressure gas to return accumulated liquid odorant to the odorant injection system to be reused. This liquid odorant recovery system ensures environmentally responsible behavior.
摘要翻译：当气味注射系统不活动时，它们可能在泵机构和相关管道中积聚不需要的蒸汽。为了重新启动加臭剂注射系统，最好从气味泵中清除不需要的蒸汽。本发明的泵清洗系统有助于以环保的方式从加臭剂注射系统中清除不需要的蒸气。泵清洗系统在排放到大气中之前将这些蒸气净化。此外，泵清洗系统积聚作为清洗过程的副产物的液体气味剂，并将其储存在罐中以减少不当处置的可能性。作为选择，泵清洗系统还可以包括液体气味再捕获系统。液体加味剂再捕获系统使用高压气体将积存的液体气味剂返回到要再利用的加臭剂注射系统。这种液体气味回收系统确保环境负责的行为。

9. 发明授权

US5862148A Microcontroller with improved debug capability for internal memory 失效
标题翻译：具有改进内部存储器调试功能的微控制器
公开(公告)号：US5862148A
公开(公告)日：1999-01-19
申请号：US798249
申请日：1997-02-11
申请人： Melanie D. Typaldos , Eric G. Chambers , Wade L. Williams
发明人： Melanie D. Typaldos , Eric G. Chambers , Wade L. Williams
IPC分类号： G06F11/36 , G06F11/00
CPC分类号： G06F11/3656
摘要： A microcontroller integrates an internal memory accessible by the cores included thereon. Logic within the microcontroller compares memory addresses generated by the cores to values in a configuration register specifying a memory address range in which the internal memory resides. The logic generates a chip select signal to the internal memory if the memory address generated resides within the specified address range to enable accesses by the cores to the internal memory. The integrated circuit may be configured in a debug mode wherein the chip select signal is inhibited to the internal memory, however the chip select signal is provided external to the integrated circuit on a pin. The chip select signal may then be used to select an external memory which serves to overlay the internal memory address range. Thus the debug mode allows instruction code and data to reside in the external memory rather than the internal memory while in the debug mode. This facilitates debugging of the code since the contents of the external memory may be examined, for example by an in-circuit emulator, in a less intrusive manner than the contents of the internal memory may be examined. The debug mode may be enabled by asserting a signal upon a predefined pin at the conclusion of reset of the microcontroller. By providing the predefined pin for placing the microcontroller into the debug mode, the microcontroller may be placed into the debug mode for debug purposes without changing the instruction code being executed thereon. Furthermore, the in-circuit emulator need not have knowledge of the internal memory address range.
摘要翻译：微控制器集成了由其上包括的核可访问的内部存储器。微控制器内的逻辑电路将内核产生的内存地址与配置寄存器中的值进行比较，指定内部存储器所在的内存地址范围。如果产生的存储器地址驻留在指定的地址范围内，则逻辑将产生芯片选择信号到内部存储器，以使内核能够访问内部存储器。集成电路可以配置在调试模式，其中芯片选择信号被禁止到内部存储器，然而芯片选择信号被提供在引脚上的集成电路的外部。然后可以使用芯片选择信号来选择用于覆盖内部存储器地址范围的外部存储器。因此，在调试模式下，调试模式允许指令代码和数据驻留在外部存储器而不是内部存储器中。这有利于代码的调试，因为外部存储器的内容可以例如通过在线仿真器以比内部存储器的内容更少侵入的方式进行检查。在微控制器复位结束时，通过在预定义的引脚上断言一个信号可以使能调试模式。通过提供用于将微控制器置于调试模式的预定义引脚，可以将微控制器置于调试模式以进行调试，而不改变在其上执行的指令代码。此外，在线仿真器不需要了解内部存储器地址范围。

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