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1. 发明授权

US08788794B2 Programmable atomic memory using stored atomic procedures 有权
标题翻译：可编程原子存储器使用存储的原子程序
公开(公告)号：US08788794B2
公开(公告)日：2014-07-22
申请号：US12961819
申请日：2010-12-07
申请人： Benjamin C. Serebrin , David A. Kaplan , Anton Chernoff
发明人： Benjamin C. Serebrin , David A. Kaplan , Anton Chernoff
IPC分类号： G06F9/44 , G06F12/08 , G06F12/14
CPC分类号： G06F9/30189 , G06F9/3004 , G06F9/30076 , G06F9/30087 , G06F9/3834 , G06F9/467
摘要： A processing core in a multi-processing core system is configured to execute a sequence of instructions as a single atomic memory transaction. The processing core validates that the sequence meets a set of one or more atomicity criteria, including that no instruction in the sequence instructs the processing core to access shared memory. After validating the sequence, the processing core executes the sequence as a single atomic memory transaction, such as by locking a source cache line that stores shared memory data, executing the validated sequence of instructions, storing a result of the sequence into the source cache line, and unlocking the source cache line.
摘要翻译：多处理核心系统中的处理核心被配置为执行指令序列作为单个原子存储器事务。处理核心验证序列符合一个或多个原子性标准的集合，包括序列中的指令不指示处理核心访问共享存储器。在验证序列之后，处理核心作为单个原子存储器事务执行序列，例如通过锁定存储共享存储器数据的源缓存行，执行经过验证的指令序列，将序列的结果存储到源高速缓存行，并解锁源缓存行。

2. 发明申请

US20120144119A1 PROGRAMMABLE ATOMIC MEMORY USING STORED ATOMIC PROCEDURES 有权
标题翻译：可编程原子记录使用存储的原子程序
公开(公告)号：US20120144119A1
公开(公告)日：2012-06-07
申请号：US12961819
申请日：2010-12-07
申请人： Benjamin C. Serebrin , David A. Kaplan , Anton Chernoff
发明人： Benjamin C. Serebrin , David A. Kaplan , Anton Chernoff
IPC分类号： G06F12/08
CPC分类号： G06F9/30189 , G06F9/3004 , G06F9/30076 , G06F9/30087 , G06F9/3834 , G06F9/467
摘要： A processing core in a multi-processing core system is configured to execute a sequence of instructions as a single atomic memory transaction. The processing core validates that the sequence meets a set of one or more atomicity criteria, including that no instruction in the sequence instructs the processing core to access shared memory. After validating the sequence, the processing core executes the sequence as a single atomic memory transaction, such as by locking a source cache line that stores shared memory data, executing the validated sequence of instructions, storing a result of the sequence into the source cache line, and unlocking the source cache line.
摘要翻译：多处理核心系统中的处理核心被配置为执行指令序列作为单个原子存储器事务。处理核心验证序列符合一个或多个原子性标准的集合，包括序列中的指令不指示处理核心访问共享存储器。在验证序列之后，处理核心作为单个原子存储器事务执行序列，例如通过锁定存储共享存储器数据的源高速缓存行，执行经过验证的指令序列，将该序列的结果存储到源高速缓存行，并解锁源缓存行。

3. 发明授权

US08464028B2 Redirection table and predictor for fetching instruction routines in a virtual machine guest 有权
标题翻译：重定向表和用于在虚拟机访客中获取指令例程的预测器
公开(公告)号：US08464028B2
公开(公告)日：2013-06-11
申请号：US12357563
申请日：2009-01-22
申请人： Benjamin C. Serebrin , Anton Chernoff
发明人： Benjamin C. Serebrin , Anton Chernoff
IPC分类号： G06F9/30 , G06F9/455
CPC分类号： G06F9/455 , G06F9/45537
摘要： In one embodiment, a processor comprises a redirect unit configured to detect a match of an instruction pointer (IP) in an IP redirect table, the IP corresponding to a guest instruction that the processor has intercepted, wherein the guest is executed under control of a virtual machine monitor (VMM), and wherein the redirect unit is configured to redirect instruction fetching by the processor to a routine identified in the IP redirect table instead of exiting to the VMM in response to the intercept of the guest instruction.
摘要翻译：在一个实施例中，处理器包括：重定向单元，被配置为检测IP重定向表中的指令指针（IP）的匹配，所述IP重定向表中的指令对应于处理器截获的访客指令的IP，其中，所述访客在虚拟机监视器（VMM），并且其中所述重定向单元被配置为将由所述处理器的指令取出重定向到所述IP重定向表中标识的例程，而不是响应于所述客户指令的拦截退出到所述VMM。

4. 发明申请

US20090187904A1 Redirection Table for Virtual Machine Guest 有权
标题翻译：虚拟机访客重定向表
公开(公告)号：US20090187904A1
公开(公告)日：2009-07-23
申请号：US12357563
申请日：2009-01-22
申请人： Benjamin C. Serebrin , Anton Chernoff
发明人： Benjamin C. Serebrin , Anton Chernoff
IPC分类号： G06F9/455
CPC分类号： G06F9/455 , G06F9/45537
摘要： In one embodiment, a processor comprises a redirect unit configured to detect a match of an instruction pointer (IP) in an IP redirect table, the IP corresponding to a guest instruction that the processor has intercepted, wherein the guest is executed under control of a virtual machine monitor (VMM), and wherein the redirect unit is configured to redirect instruction fetching by the processor to a routine identified in the IP redirect table instead of exiting to the VMM in response to the intercept of the guest instruction.
摘要翻译：在一个实施例中，处理器包括：重定向单元，被配置为检测IP重定向表中的指令指针（IP）的匹配，所述IP重定向表中的指令对应于处理器截获的访客指令的IP，其中，所述访客在虚拟机监视器（VMM），并且其中所述重定向单元被配置为将由所述处理器的指令取出重定向到所述IP重定向表中标识的例程，而不是响应于所述客户指令的拦截退出到所述VMM。

5. 发明申请

US20140068088A1 SYSTEMS AND METHODS FOR PROCESSING MEDIA ACCESS CONTROL (MAC) ADDRESSES 审中-公开
标题翻译：用于处理媒体访问控制（MAC）地址的系统和方法
公开(公告)号：US20140068088A1
公开(公告)日：2014-03-06
申请号：US13602512
申请日：2012-09-04
申请人： Venkata S. Krishnan , Anton Chernoff , Mark Hummel , David E. Mayhew
发明人： Venkata S. Krishnan , Anton Chernoff , Mark Hummel , David E. Mayhew
IPC分类号： G06F15/16
CPC分类号： H04L61/6022 , H04L61/2038
摘要： Described are a system and method for processing a media access control (MAC) address. A communication is established between a processing device and a network port of a data switching device. The data switching device assigns a MAC address to the processing device. The assigned MAC address is directly associated with the network port of the data switching device absent a learning mechanism.
摘要翻译：描述了用于处理媒体访问控制（MAC）地址的系统和方法。在数据交换设备的处理设备和网络端口之间建立通信。数据交换设备向处理设备分配MAC地址。分配的MAC地址与没有学习机制的数据交换设备的网络端口直接相关联。

6. 发明申请

US20140059160A1 SYSTEMS AND METHODS FOR SHARING DEVICES IN A VIRTUALIZATION ENVIRONMENT 有权
标题翻译：在虚拟化环境中共享设备的系统和方法
公开(公告)号：US20140059160A1
公开(公告)日：2014-02-27
申请号：US13590700
申请日：2012-08-21
申请人： Anton Chernoff , Venkata S. Krishnan , Mark Hummel , David E. Mayhew , Michael J. Osborn
发明人： Anton Chernoff , Venkata S. Krishnan , Mark Hummel , David E. Mayhew , Michael J. Osborn
IPC分类号： G06F15/173 , G06F15/16
CPC分类号： H04L49/70 , G06F9/45558 , G06F2009/45579 , H04L49/356
摘要： Described are systems and methods for communication between a plurality of electronic devices and an aggregation device. An aggregation device processes instructions related to a configuration of an electronic device in communication with the aggregation device. One or more virtual devices are generated in response to processing the instructions. The electronic device enumerates a configuration space to determine devices for use by the electronic device. The aggregation device detects an access of the configuration space by the electronic device. The one or more virtual devices are presented from the aggregation device to the electronic device in accordance with the instructions.
摘要翻译：描述了用于多个电子设备和聚合设备之间的通信的系统和方法。聚合设备处理与聚合设备通信的电子设备的配置相关的指令。响应于处理指令而产生一个或多个虚拟设备。电子设备列举配置空间以确定电子设备使用的设备。聚合设备检测电子设备对配置空间的访问。一个或多个虚拟设备根据指令从聚合设备呈现给电子设备。

7. 发明申请

US20140047341A1 SYSTEM AND METHOD FOR CONFIGURING CLOUD COMPUTING SYSTEMS 有权
标题翻译：用于配置云计算系统的系统和方法
公开(公告)号：US20140047341A1
公开(公告)日：2014-02-13
申请号：US13568368
申请日：2012-08-07
申请人： Mauricio Breternitz , Keith A. Lowery , Patryk Kaminski , Anton Chernoff
发明人： Mauricio Breternitz , Keith A. Lowery , Patryk Kaminski , Anton Chernoff
IPC分类号： G06F15/177 , G06F3/01
CPC分类号： G06F17/30002 , G06F9/505 , G06F9/5072
摘要： The present disclosure relates to a method, system, and apparatus for configuring a computing system, such as a cloud computing system. A method includes, based on user selections received via a user interface, configuring a cluster of nodes by selecting the cluster of nodes from a plurality of available nodes, selecting a workload container module from a plurality of available workload container modules for operation on each node of the selected cluster of nodes, and selecting a workload for execution with the workload container on the cluster of nodes. Each node of the cluster of nodes includes at least one processing device and memory, and the cluster of nodes is operative to share processing of a workload.
摘要翻译：本公开涉及用于配置诸如云计算系统之类的计算系统的方法，系统和装置。一种方法包括：基于经由用户接口接收的用户选择，通过从多个可用节点中选择节点簇来配置节点簇，从多个可用工作负载容器模块中选择工作负载容器模块，以在每个节点上进行操作的选定的节点集群，并选择一个工作负载以便与节点集群上的工作负载容器一起执行。节点集群的每个节点包括至少一个处理设备和存储器，并且节点集群可操作地共享工作负载的处理。

8. 发明申请

US20120291040A1 AUTOMATIC LOAD BALANCING FOR HETEROGENEOUS CORES 有权
标题翻译：自动负载平衡异常角
公开(公告)号：US20120291040A1
公开(公告)日：2012-11-15
申请号：US13105250
申请日：2011-05-11
申请人： Mauricio Breternitz , Patryk Kaminski , Keith Lowery , Anton Chernoff
发明人： Mauricio Breternitz , Patryk Kaminski , Keith Lowery , Anton Chernoff
IPC分类号： G06F9/46
CPC分类号： G06F9/5083
摘要： A system and method for efficient automatic scheduling of the execution of work units between multiple heterogeneous processor cores. A processing node includes a first processor core with a general-purpose micro-architecture and a second processor core with a single instruction multiple data micro-architecture. A computer program comprises one or more compute kernels, or function calls. A compiler computes pre-runtime information of the given function call. A runtime scheduler produces one or more work units by matching each of the one or more kernels with an associated record of data. The scheduler assigns work units either to the first or to the second processor core based at least in part on the computed pre-runtime information. In addition, the scheduler is able to change an original assignment for a waiting work unit based on dynamic runtime behavior of other work units corresponding to a same kernel as the waiting work unit.
摘要翻译：一种用于在多个异构处理器内核之间高效自动调度工作单元执行的系统和方法。处理节点包括具有通用微架构的第一处理器核心和具有单个指令多数据微架构的第二处理器核心。计算机程序包括一个或多个计算内核或函数调用。编译器计算给定函数调用的运行前信息。运行时调度器通过将一个或多个内核中的每一个与相关联的数据记录进行匹配来生成一个或多个工作单元。至少部分地基于所计算的运行前信息，调度器将工作单元分配给第一或第二处理器核。此外，调度器能够基于与等待工作单元相同的内核的其他工作单元的动态运行时行为来改变等待工作单元的原始分配。

9. 发明授权

US09658895B2 System and method for configuring boot-time parameters of nodes of a cloud computing system 有权
公开(公告)号：US09658895B2
公开(公告)日：2017-05-23
申请号：US13568463
申请日：2012-08-07
申请人： Mauricio Breternitz , Keith A. Lowery , Patryk Kaminski , Anton Chernoff
发明人： Mauricio Breternitz , Keith A. Lowery , Patryk Kaminski , Anton Chernoff
IPC分类号： G06F9/50 , G06F9/455
CPC分类号： G06F9/5066 , G06F9/45558
摘要： The present disclosure relates to a method and system for configuring a computing system, such as a cloud computing system. A method includes providing a user interface comprising selectable boot-time configuration data and selecting, based on at least one user selection of the boot-time configuration data, a boot-time configuration for at least one node of a cluster of nodes of the computing system. The method further includes configuring the at least one node of the cluster of nodes with the selected boot-time configuration to modify at least one boot-time parameter of the at least one node.

10. 发明授权

US08782645B2 Automatic load balancing for heterogeneous cores 有权
标题翻译：异构核心的自动负载平衡
公开(公告)号：US08782645B2
公开(公告)日：2014-07-15
申请号：US13105250
申请日：2011-05-11
申请人： Mauricio Breternitz , Patryk Kaminski , Keith Lowery , Anton Chernoff
发明人： Mauricio Breternitz , Patryk Kaminski , Keith Lowery , Anton Chernoff
IPC分类号： G06F9/46 , G06F9/50
CPC分类号： G06F9/5083
摘要： A system and method for efficient automatic scheduling of the execution of work units between multiple heterogeneous processor cores. A processing node includes a first processor core with a general-purpose micro-architecture and a second processor core with a single instruction multiple data micro-architecture. A computer program comprises one or more compute kernels, or function calls. A compiler computes pre-runtime information of the given function call. A runtime scheduler produces one or more work units by matching each of the one or more kernels with an associated record of data. The scheduler assigns work units either to the first or to the second processor core based at least in part on the computed pre-runtime information. In addition, the scheduler is able to change an original assignment for a waiting work unit based on dynamic runtime behavior of other work units corresponding to a same kernel as the waiting work unit.
摘要翻译：一种用于在多个异构处理器内核之间高效自动调度工作单元执行的系统和方法。处理节点包括具有通用微架构的第一处理器核心和具有单个指令多数据微架构的第二处理器核心。计算机程序包括一个或多个计算内核或函数调用。编译器计算给定函数调用的运行前信息。运行时调度器通过将一个或多个内核中的每一个与相关联的数据记录进行匹配来生成一个或多个工作单元。至少部分地基于所计算的运行前信息，调度器将工作单元分配给第一或第二处理器核。此外，调度器能够基于与等待工作单元相同的内核的其他工作单元的动态运行时行为来改变等待工作单元的原始分配。

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