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1. 发明申请

US20090259797A1 METHOD, APPARATUS AND COMPUTER READABLE MEDIUM FOR STORING DATA ON A FLASH DEVICE USING MULTIPLE WRITING MODES 有权
标题翻译：用于使用多种写入模式存储闪存设备上的数据的方法，装置和计算机可读介质
公开(公告)号：US20090259797A1
公开(公告)日：2009-10-15
申请号：US12100476
申请日：2008-04-10
申请人： Avraham MEIR
发明人： Avraham MEIR
IPC分类号： G06F12/00
CPC分类号： G06F12/0246
摘要： Methods, apparatus and computer readable medium for writing data into a flash memory device are disclosed. In some embodiments, the data is written in a writing mode selected in accordance with an extent to which the flash memory storage device or a flash die thereof is full of previously-stored data. The presently disclosed techniques may be implemented on the “device-side” (for example, by a device controller of the flash device) and/or on the “host-side.” In some embodiments, the selected writing mode is a bits-per-cell density mode. In some embodiments, the selected writing mode is a “slower” or “faster” writing mode. The presently disclosed techniques relate to SBC as well as MBC devices.
摘要翻译：公开了用于将数据写入闪速存储器件的方法，装置和计算机可读介质。在一些实施例中，数据以写入模式写入，该写入模式根据闪速存储器存储设备或其闪存芯片充满预先存储的数据的程度而选择。目前公开的技术可以在“设备侧”（例如，由闪存设备的设备控制器）和/或“主机侧”上实现。在一些实施例中，所选择的写入模式是每单元比特密度模式。在一些实施例中，所选择的写入模式是“较慢”或“更快”的写入模式。目前公开的技术涉及SBC以及MBC设备。

2. 发明申请

US20080270682A1 METHOD FOR USING A MULTI-BIT CELL FLASH DEVICE IN A SYSTEM NOT DESIGNED FOR THE DEVICE 有权
标题翻译：在未设计用于设备的系统中使用多位单元闪存器件的方法
公开(公告)号：US20080270682A1
公开(公告)日：2008-10-30
申请号：US12167306
申请日：2008-07-03
申请人： Menahem LASSER , Avraham MEIR
发明人： Menahem LASSER , Avraham MEIR
IPC分类号： G06F12/02 , G06F15/177
CPC分类号： G11C16/0483 , G06F9/4403 , G06F12/0246 , G11C11/5621 , G11C11/5628 , G11C29/00 , G11C2211/5641
摘要： A computerized system is booted from a flash memory device configured to always operate one or more of its blocks only in a M-bit-per-cell mode and the rest of its blocks in a N>M-bit-per-cell mode. When the system is powered up, an initialization program is retrieved from the M-bit-per-cell block(s), corrected for errors using a first error correction method, and executed. Data accessed subsequently from the N-bit-per-cell blocks are corrected using an error correction method that corrects more errors per block than the first error correction method.
摘要翻译：计算机化系统从闪速存储器引导，该闪速存储器件被配置为总是仅在每个M位单元模式中操作其一个或多个块，并且其余块以每个单元N模式M位。当系统通电时，从每个M位单元块检索一个初始化程序，使用第一个纠错方法对错误进行校正并执行。从N比特单元块随后访问的数据使用错误校正方法来校正，该纠错方法校正每块大于第一纠错方法的错误。

3. 发明申请

US20080032451A1 METHOD OF PROVIDING INVERTED PYRAMID MULTI-DIE PACKAGE REDUCING WIRE SWEEP AND WEAKENING TORQUES 审中-公开
标题翻译：提供反相波形多模封装的方法减少电线和漏电极
公开(公告)号：US20080032451A1
公开(公告)日：2008-02-07
申请号：US11767535
申请日：2007-06-25
申请人： Avraham MEIR , Doron TEOMIM , Alex SHEVACHMAN , Reuven LEVITANUS , Valery ISRAILIT
发明人： Avraham MEIR , Doron TEOMIM , Alex SHEVACHMAN , Reuven LEVITANUS , Valery ISRAILIT
IPC分类号： H01L21/00
CPC分类号： H01L25/0657 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2225/0651 , H01L2225/06575 , H01L2924/14 , H01L2924/15331 , H01L2924/30107 , H01L2924/00014
摘要： An inverted pyramid multi-die package provides, for each die pad on an upper die, a rigid support underneath extending to a substrate. Such configuration reduces both the wire sweep and weakening torques. A lower die, smaller than the upper die in at least one dimension, may be positioned between the upper die and the substrate. The two dice may or may not contact each other, or they may contact each other via an intermediate spacer. The lower die may be a flip chip. The multi-die package may be fashioned without the lower die or the substrate. Wire sweep is reduced, because the second die is smaller than the upper die in at least one dimension. Weakening torques are reduced, because spacers at the periphery of the upper die absorb the impact of bonding wires thereon.
摘要翻译：倒金字塔多管芯封装为上模具上的每个管芯焊盘提供在基底下延伸的刚性支撑件。这种配置减少了线扫和弱化转矩。在至少一个维度上小于上模的下模可以位于上模与基板之间。两个骰子可以彼此接触或者不会彼此接触，或者它们可以通过中间间隔物彼此接触。下模可以是倒装芯片。可以不使用下模具或基板来形成多管芯封装。电线扫描减少，因为在至少一个维度上第二个模具小于上模具。减弱转矩，因为在上模的周边处的间隔件吸收其上的接合线的冲击。

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