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    • 7. 发明申请
    • SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF
    • 半导体器件及其驱动方法
    • US20070001941A1
    • 2007-01-04
    • US11427134
    • 2006-06-28
    • Atsushi UmezakiHajime KimuraShunpei Yamazaki
    • Atsushi UmezakiHajime KimuraShunpei Yamazaki
    • G09G3/30
    • G09G3/3266G09G3/006G09G3/2007G09G3/3283G09G2330/08G09G2330/10G09G2330/12
    • The semiconductor device includes a plurality of pixels each including a plurality of sub-pixels, a power supply line and a plurality of signal lines for operating the plurality of pixels, a driver circuit for outputting signals to the plurality of signal lines, a signal input circuit for controlling the driver circuit, a compensation circuit which determines if a pixel has a normal state, a defective bright spot, or a point defect in the case where a current value detected shows an abnormal value, and accordingly outputs a compensation signal to the signal input circuit, and a current value detection circuit which detects a current value flowing through the power supply line when each sub-pixel is lighted. Thus, a pixel including a sub-pixel which shows an abnormal current value when lighted is compensated by a signal output from the driver circuit.
    • 半导体器件包括多个像素,每个像素包括多个子像素,电源线和用于操作多个像素的多条信号线,用于向多条信号线输出信号的驱动电路,信号输入 用于控制驱动器电路的电路,在检测到的电流值显示异常值的情况下,确定像素是否具有正常状态,缺陷亮点或点缺陷的补偿电路,并且因此将补偿信号输出到 信号输入电路和电流值检测电路,其检测当每个子像素点亮时流过电源线的电流值。 因此,在由点亮时显示异常电流值的子像素的像素由从驱动电路输出的信号补偿。
    • 10. 发明授权
    • Semiconductor device
    • 半导体器件
    • US09035923B2
    • 2015-05-19
    • US13225856
    • 2011-09-06
    • Hajime KimuraAtsushi Umezaki
    • Hajime KimuraAtsushi Umezaki
    • G09G5/00G09G3/36
    • G09G3/3648G09G3/2096G09G3/3677G09G3/3688G09G2300/0426G09G2300/0814G09G2300/0819G09G2320/0209G09G2320/0223G09G2320/043
    • A semiconductor device where delay or distortion of a signal output to a gate signal line in a selection period is reduced is provided. The semiconductor device includes a gate signal line, a first and second gate driver circuits which output a selection signal and a non-selection signal to the gate signal line, and pixels electrically connected to the gate signal line and supplied with the two signals. In a period during which the gate signal line is selected, both the first and second gate driver circuits output the selection signal to the gate signal line. In a period during which the gate signal line is not selected, one of the first and second gate driver circuits outputs the non-selection signal to the gate signal line, and the other gate driver circuit outputs neither the selection signal nor the non-selection signal to the gate signal line.
    • 提供了在选择期间输出到栅极信号线的信号的延迟或失真减小的半导体器件。 半导体器件包括栅极信号线,向栅极信号线输出选择信号和非选择信号的第一和第二栅极驱动器电路,以及电连接到栅极信号线并被提供有两个信号的像素。 在选择栅极信号线的期间,第一和第二栅极驱动电路都将选择信号输出到栅极信号线。 在没有选择栅极信号线的期间,第一和第二栅极驱动电路中的一个将非选择信号输出到栅极信号线,另一个栅极驱动电路既不输出选择信号也不输出非选择信号 信号到门信号线。