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1. 发明授权

US09715845B2 Semiconductor display device 有权
公开(公告)号：US09715845B2
公开(公告)日：2017-07-25
申请号：US12880252
申请日：2010-09-13
申请人： Atsushi Umezaki , Mai Akiba
发明人： Atsushi Umezaki , Mai Akiba
IPC分类号： G09G3/20 , G11C19/28 , H01L27/12 , G09G3/3225
CPC分类号： G09G3/20 , G09G3/3225 , G09G2300/08 , G09G2300/0842 , G09G2310/0267 , G09G2310/027 , G09G2310/0286 , G09G2310/0297 , G09G2310/04 , G09G2330/021 , G11C19/28 , H01L27/1225
摘要： It is an object to provide a semiconductor display device with high reliability. Further, it is an object to provide a semiconductor display device which can reduce power consumption. A decoder is provided for a scan line driver circuit and operates such that, in accordance with a signal input to the scan line driver circuit, a pulse is sequentially input only to scan lines included in pixels of rows performing display and a pulse is not input to scan lines included in pixels of rows at which display is not performed. Then, all pixels or part of pixels in the line selected by the pulse is supplied with a video signal from a signal line driver circuit, whereby display of an image is performed in pixels arranged in the specific area of the pixel portion.

2. 发明授权

US09236377B2 Semiconductor device and display device 有权
公开(公告)号：US09236377B2
公开(公告)日：2016-01-12
申请号：US12875808
申请日：2010-09-03
申请人： Hajime Kimura , Atsushi Umezaki
发明人： Hajime Kimura , Atsushi Umezaki
IPC分类号： H01L31/00 , H01L27/088 , H01L27/12 , H01L29/786
CPC分类号： H01L27/1225 , G02F1/13306 , G02F1/133345 , G02F1/1339 , G02F1/134309 , G02F1/136213 , G02F1/136286 , G02F1/1368 , G02F2001/133302 , G02F2201/121 , G02F2201/123 , G09G3/3677 , G09G2310/0251 , G09G2310/08 , G09G2330/021 , G11C19/28 , H01L27/088 , H01L27/124 , H01L27/1244 , H01L27/1251 , H01L27/1255 , H01L27/127 , H01L27/1288 , H01L29/41733 , H01L29/42384 , H01L29/7869 , H01L29/78696
摘要： A semiconductor device including a circuit which does not easily deteriorate is provided. The semiconductor device includes a first transistor, a second transistor, a first switch, a second switch, and a third switch. A first terminal of the first transistor is connected to a first wiring. A second terminal of the first transistor is connected to a second wiring. A gate and a first terminal of the second transistor are connected to the first wiring. A second terminal of the second transistor is connected to a gate of the first transistor. The first switch is connected between the second wiring and a third wiring. The second switch is connected between the second wiring and the third wiring. The third switch is connected between the gate of the first transistor and the third wiring.

3. 发明授权

US09189997B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US09189997B2
公开(公告)日：2015-11-17
申请号：US13443146
申请日：2012-04-10
申请人： Hajime Kimura , Yasunori Yoshida , Hideaki Shishido , Atsushi Umezaki , Makoto Yanagisawa , Shunpei Yamazaki
发明人： Hajime Kimura , Yasunori Yoshida , Hideaki Shishido , Atsushi Umezaki , Makoto Yanagisawa , Shunpei Yamazaki
IPC分类号： G09G3/36 , G09G3/32 , G09G3/34 , G02F1/1335 , G02F1/1362
CPC分类号： G09G3/36 , G02F1/133603 , G02F1/1362 , G09G3/3208 , G09G3/3426 , G09G3/3648 , G09G2300/046 , G09G2320/0238 , G09G2320/062 , G09G2320/066 , G09G2330/021
摘要： It is an object to provide a display device in which a problem of light leakage from a liquid crystal element in black display is reduced or overcome and the contrast is improved. It is another object to provide a pixel circuit having a function to control a lighting state of a backlight based on each pixel. These objects are achieved by turning off a light-emitting element in display of a black gray scale, and by providing a light-emitting element in each pixel and providing, in a pixel circuit, a function to individually control lighting and non-lighting of the light-emitting element depending on a gray scale to perform display. When a backlight is provided in each pixel, a light-emitting element that is a backlight is turned off when a black gray scale is displayed, whereby reduction in contrast due to light leakage from a liquid crystal element can be prevented.
摘要翻译：本发明的目的是提供一种显示装置，其中减少或克服了黑色显示器中的液晶元件的漏光问题，并提高了对比度。另一个目的是提供一种具有基于每个像素来控制背光的点亮状态的功能的像素电路。这些目的是通过关闭黑色灰度显示器中的发光元件来实现的，并且通过在每个像素中提供发光元件并在像素电路中提供单独控制照明和非点亮的功能该发光元件根据灰度来执行显示。当在每个像素中设置背光时，当显示黑色灰度时，作为背光的发光元件被关闭，由此可以防止由于来自液晶元件的光泄漏造成的对比度的降低。

4. 发明授权

US09035923B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09035923B2
公开(公告)日：2015-05-19
申请号：US13225856
申请日：2011-09-06
申请人： Hajime Kimura , Atsushi Umezaki
发明人： Hajime Kimura , Atsushi Umezaki
IPC分类号： G09G5/00 , G09G3/36
CPC分类号： G09G3/3648 , G09G3/2096 , G09G3/3677 , G09G3/3688 , G09G2300/0426 , G09G2300/0814 , G09G2300/0819 , G09G2320/0209 , G09G2320/0223 , G09G2320/043
摘要： A semiconductor device where delay or distortion of a signal output to a gate signal line in a selection period is reduced is provided. The semiconductor device includes a gate signal line, a first and second gate driver circuits which output a selection signal and a non-selection signal to the gate signal line, and pixels electrically connected to the gate signal line and supplied with the two signals. In a period during which the gate signal line is selected, both the first and second gate driver circuits output the selection signal to the gate signal line. In a period during which the gate signal line is not selected, one of the first and second gate driver circuits outputs the non-selection signal to the gate signal line, and the other gate driver circuit outputs neither the selection signal nor the non-selection signal to the gate signal line.
摘要翻译：提供了在选择期间输出到栅极信号线的信号的延迟或失真减小的半导体器件。半导体器件包括栅极信号线，向栅极信号线输出选择信号和非选择信号的第一和第二栅极驱动器电路，以及电连接到栅极信号线并被提供有两个信号的像素。在选择栅极信号线的期间，第一和第二栅极驱动电路都将选择信号输出到栅极信号线。在没有选择栅极信号线的期间，第一和第二栅极驱动电路中的一个将非选择信号输出到栅极信号线，另一个栅极驱动电路既不输出选择信号也不输出非选择信号信号到门信号线。

5. 发明授权

US08994636B2 Display device and electronic device having plural gate drivers 有权
标题翻译：具有多个栅极驱动器的显示装置和电子装置
公开(公告)号：US08994636B2
公开(公告)日：2015-03-31
申请号：US12794939
申请日：2010-06-07
申请人： Atsushi Umezaki
发明人： Atsushi Umezaki
IPC分类号： G09G3/36 , G09G3/20 , H03K17/04
CPC分类号： G09G3/3648 , G09G3/20 , G09G3/3677 , G09G2300/0426 , G09G2310/0267 , G09G2310/0286 , G09G2320/043 , G09G2352/00 , H03K17/04
摘要： It is an object to provide a display device which can favorably display a image without delayed or distorted signals. The display device includes a first gate driver and a second gate driver. The first gate driver and the second gate driver each include a plurality of flip flop circuits and a plurality of transfer signal generation circuits. Both the flip flop circuit and the transfer signal generation circuit are circuits which output a signal inputted to a first input terminal with a half clock cycle delay. In addition, an output terminal of the transfer signal generation circuit is directly connected to a first input terminal of the flip flop circuit in the next stage. Therefore, delay and distortion of the signal which is inputted from the transfer signal generation circuit to the flip flop circuit can be reduced.
摘要翻译：本发明的目的是提供一种可以有利地显示图像而不延迟或失真的信号的显示装置。显示装置包括第一栅极驱动器和第二栅极驱动器。第一栅极驱动器和第二栅极驱动器各自包括多个触发器电路和多个传输信号发生电路。触发电路和传输信号发生电路都是以半个时钟周期延迟输出输入到第一输入端的信号的电路。此外，传送信号发生电路的输出端子在下一级直接连接到触发电路的第一输入端。因此，可以减少从传送信号发生电路向触发电路输入的信号的延迟和失真。

6. 发明授权

US08902144B2 Display device and electronic device including the same 有权
公开(公告)号：US08902144B2
公开(公告)日：2014-12-02
申请号：US12614852
申请日：2009-11-09
申请人： Atsushi Umezaki
发明人： Atsushi Umezaki
IPC分类号： G09G3/36 , G09G3/34 , H01L27/06 , G02F1/1362
CPC分类号： H01L27/1255 , G02F1/134309 , G02F1/13624 , G02F1/136286 , G02F1/1368 , G09G3/3266 , G09G3/3413 , G09G3/3614 , G09G3/3648 , G09G2300/0426 , G09G2310/0235 , G09G2310/0251 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G09G2320/0252 , G09G2330/021 , G11C19/28 , H01L27/0629 , H01L27/1222 , H01L27/1225 , H01L27/124 , H01L27/3262 , H01L27/3265 , H01L27/3276 , H01L29/78663 , H01L29/78672 , H01L29/7869
摘要： It is an object to decrease the number of transistors connected to a capacitor. In a structure, a capacitor and one transistor are included, one electrode of the capacitor is connected to a wiring, and the other electrode of the capacitor is connected to a gate of the transistor. Since a clock signal is input to the wiring, the clock signal is input to the gate of the transistor through the capacitor. Then, on/off of the transistor is controlled by a signal which synchronizes with the clock signal, so that a period when the transistor is on and a period when the transistor is off are repeated. In this manner, deterioration of the transistor can be suppressed.

7. 发明授权

US08872751B2 Liquid crystal display device having interconnected transistors and electronic device including the same 有权
标题翻译：具有互连晶体管的液晶显示装置和包括该液晶显示装置的电子装置
公开(公告)号：US08872751B2
公开(公告)日：2014-10-28
申请号：US12730952
申请日：2010-03-24
申请人： Hajime Kimura , Atsushi Umezaki
发明人： Hajime Kimura , Atsushi Umezaki
IPC分类号： G09G3/36 , G09G3/20 , G11C19/00
CPC分类号： G09G3/3677 , G02F1/13624 , G02F1/1368 , G02F2202/10 , G09G3/20 , G09G3/3674 , G09G3/3688 , G09G3/3696 , G09G2300/0426 , G09G2300/0809 , G09G2300/0842 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2310/0291 , G09G2330/021 , H01L27/1225 , H01L27/124 , H01L29/24 , H01L29/7869
摘要： A driver circuit includes a circuit 200, a transistor 101—1, and a transistor 101—2. A signal is selectively input from the circuit 200 to a gate of the transistor 101—1 and the transistor 101—2, so that the transistor 101—1 and the transistor 101—2 are controlled to be on or off. The transistor 101—1 and the transistor 101—2 are turned on or off; thus, the wiring 112 and the wiring 111 become conducting or non-conducting.
摘要翻译：驱动器电路包括电路200，晶体管101-1和晶体管101-2。从电路200选择性地输入信号到晶体管101-1和晶体管101-2的栅极，使得晶体管101-1和晶体管101-2被控制为导通或截止。晶体管101-1和晶体管101-2导通或截止; 因此，布线112和布线111变为导通或非导通。

8. 发明授权

US08786527B2 Method of driving display device, display device, and electronic appliance 有权
标题翻译：驱动显示装置，显示装置和电子设备的方法
公开(公告)号：US08786527B2
公开(公告)日：2014-07-22
申请号：US12906539
申请日：2010-10-18
申请人： Atsushi Umezaki , Ryo Arasawa
发明人： Atsushi Umezaki , Ryo Arasawa
IPC分类号： G09G3/30
CPC分类号： G09G3/22 , G09G3/3233 , G09G3/3266 , G09G2300/0465 , G09G2300/0819 , G09G2310/0251 , G09G2310/0262 , G09G2310/0264 , G09G2310/061
摘要： The present invention is a method of driving a display device including a transistor, a capacitor one electrode of which is electrically connected to a first terminal of the transistor and the other electrode of which is electrically connected to a gate of the transistor, and a display element a first electrode of which is electrically connected to a second terminal of the transistor, including the steps of: electrically connecting the gate of the transistor, the first terminal of the transistor, and both electrodes of the capacitor to a first line in a first period; electrically connecting the gate of the transistor and the other electrode of the capacitor to a second line in a second period; and electrically connecting the first terminal of the transistor and one electrode of the capacitor to a third line in a third period.
摘要翻译：本发明是一种驱动显示装置的方法，该显示装置包括晶体管，其电极的一个电极电连接到晶体管的第一端子，而另一个电极电连接到晶体管的栅极，显示器元件，其第一电极电连接到晶体管的第二端子，包括以下步骤：将晶体管的栅极，晶体管的第一端子和电容器的两个电极电连接到第一线路中的第一线期; 在第二周期中将晶体管的栅极和电容器的另一个电极电连接到第二线路; 以及在第三周期中将晶体管的第一端子和电容器的一个电极电连接到第三线路。

9. 发明授权

US08743044B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US08743044B2
公开(公告)日：2014-06-03
申请号：US13289100
申请日：2011-11-04
申请人： Atsushi Umezaki , Hiroyuki Miyake
发明人： Atsushi Umezaki , Hiroyuki Miyake
IPC分类号： G09G3/36
CPC分类号： H01L27/124 , G09G3/2092 , G09G3/3266 , G09G3/3674 , G09G3/3677 , G09G2300/0809 , G09G2310/0205 , G09G2310/0248 , G09G2310/0286 , G09G2310/0289 , G09G2310/0291 , G09G2310/061 , G09G2320/0646 , G09G2320/0666 , G11C19/28 , H01L27/0207 , H01L27/1222 , H01L27/1225
摘要： To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor; a clock signal is input to a gate electrode of the first switching transistor; and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.
摘要翻译：为了抑制晶体管的阈值电压的波动，为了减少显示面板和驱动器IC的连接数量，为了实现显示装置的功耗的降低，并且实现显示装置的尺寸和高清晰度的增加。容易恶化的晶体管的栅电极通过第一开关晶体管和通过第二开关晶体管供给低电位的布线而连接到提供高电位的布线; 时钟信号被输入到第一开关晶体管的栅电极; 并且反相时钟信号被输入到第二开关晶体管的栅电极。因此，高电位和低电位交替施加到容易劣化的晶体管的栅电极。

10. 发明授权

US08629819B2 Semiconductor device and driving method thereof 有权
标题翻译：半导体装置及其驱动方法
公开(公告)号：US08629819B2
公开(公告)日：2014-01-14
申请号：US11456296
申请日：2006-07-10
申请人： Atsushi Umezaki
发明人： Atsushi Umezaki
IPC分类号： G09G3/30 , G09G3/32 , G09G3/34 , G09G3/36
CPC分类号： G09G3/3233 , G09G3/20 , G09G3/3225 , G09G3/3659 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2310/0251 , G09G2320/0223 , G09G2320/043 , G09G2330/021
摘要： There has been a problem that power consumption is increased if a potential of a signal line changes every time a video signal is applied to a driving transistor from the signal line, since the parasitic capacitance of the signal line stores and releases electric charges. In a configuration of a display portion provided with a gate signal line for selecting an input of a video signal to a pixel and a source signal line for inputting a video signal to the pixel, a switch is connected in series with the source signal line, the switch being controlled to be in on state when the pixel is not selected by the gate signal line, and in off state when the pixel is selected by the gate signal line. Accordingly, the parasitic capacitance of the source signal line which stores and releases electric charges affects only pixels between an output side of a source driver up to and including the pixel selected to be written with a video signal. Consequently, power consumed by the charging and discharging of the source signal line can be reduced, and thus low power consumption can be achieved.
摘要翻译：如果信号线的寄生电容存储并释放电荷，则每当视频信号从信号线施加到驱动晶体管时信号线的电位发生变化，则存在功耗增加的问题。在具有用于选择对像素的视频信号的输入的栅极信号线和用于向像素输入视频信号的源极信号线的显示部分的配置中，开关与源极信号线串联连接，当栅极信号线没有选择像素时，开关被控制为处于导通状态，并且当栅极信号线选择像素时处于截止状态。因此，存储和释放电荷的源极信号线的寄生电容仅影响源极驱动器的输出侧直到并且包括被选择用视频信号写入的像素的像素。因此，可以减少源极信号线的充电和放电所消耗的功率，从而可以实现低功耗。

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