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1. 发明申请

US20130181252A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130181252A1
公开(公告)日：2013-07-18
申请号：US13876170
申请日：2011-09-26
申请人： Hiroomi Eguchi , Atsushi Onogi , Takashi Okawa , Kiyoharu Hayakawa
发明人： Hiroomi Eguchi , Atsushi Onogi , Takashi Okawa , Kiyoharu Hayakawa
IPC分类号： H01L29/06
CPC分类号： H01L29/0611 , H01L27/0676 , H01L29/0696 , H01L29/0834 , H01L29/1608 , H01L29/20 , H01L29/2003 , H01L29/7394 , H01L29/861
摘要： A semiconductor device includes a semiconductor layer; a first type of a first semiconductor element that is arranged in a first element region of the semiconductor layer, has first and second main electrodes, and switches current; and a second type of a second semiconductor element that is arranged in a second element region of the semiconductor layer, has third and fourth main electrodes, and freewheels the current. The first and second element regions are adjacent in a direction orthogonal to a direction in which current flows, and are formed in a loop shape over the entire element region when the semiconductor layer is viewed from above. The first main electrode is electrically connected to the third main electrode, and the second main electrode is electrically connected to the fourth main electrode. When the semiconductor layer is viewed from above, a ratio of a length of the first main electrode to a length of the second main electrode is larger than a ratio of a length of the third main electrode to a length of the fourth main electrode.
摘要翻译：半导体器件包括半导体层; 布置在半导体层的第一元件区域中的第一半导体元件的第一类型具有第一和第二主电极并切换电流; 以及布置在所述半导体层的第二元件区域中的第二类型的第二半导体元件，具有第三和第四主电极，并且使所述电流自由转动。第一和第二元件区域在与电流流动的方向正交的方向上相邻，并且当从上方观察半导体层时，在整个元件区域上形成为环形。第一主电极与第三主电极电连接，第二主电极与第四主电极电连接。当从上方观察半导体层时，第一主电极的长度与第二主电极的长度的比例大于第三主电极的长度与第四主电极的长度的比率。

2. 发明申请

US20130309867A1 LATERAL SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME 有权
标题翻译：横向半导体器件及其制造方法
公开(公告)号：US20130309867A1
公开(公告)日：2013-11-21
申请号：US13976266
申请日：2011-02-08
申请人： Hiroomi Eguchi , Takashi Okawa , Atsushi Onogi
发明人： Hiroomi Eguchi , Takashi Okawa , Atsushi Onogi
IPC分类号： H01L29/66 , H01L21/306
CPC分类号： H01L29/6625 , H01L21/30604 , H01L29/4236 , H01L29/66325 , H01L29/7394
摘要： A manufacturing method for manufacturing a lateral semiconductor device having an SOI (Silicon on Insulator) substrate, the lateral semiconductor device comprising a semiconductor layer that includes a buried oxide layer and a drift region, the manufacturing method comprising an etching process of etching, by a predetermined depth, a LOCOS oxide that projects from a surface of the semiconductor layer by a predetermined thickness and is embedded in the semiconductor layer by a predetermined thickness, and a trench forming process of simultaneously forming a first trench extending from the drift region toward the buried oxide layer, and a second trench extending from a portion obtained by the etching in the etching process toward the buried oxide layer, at a same etching rate, and stopping forming the first trench and the second trench at a time when the second trench reaches the buried oxide layer.
摘要翻译：一种用于制造具有SOI（绝缘体上硅）衬底的横向半导体器件的制造方法，所述横向半导体器件包括包括掩埋氧化物层和漂移区的半导体层，所述制造方法包括通过蚀刻的蚀刻工艺，预定深度，从半导体层的表面突出预定厚度并以预定厚度嵌入到半导体层中的LOCOS氧化物，以及沟槽形成工艺，其同时形成从漂移区延伸到掩埋的第一沟槽氧化物层，以及从蚀刻处理中通过蚀刻获得的部分以相同的蚀刻速率向掩埋氧化物层延伸的第二沟槽，并且在第二沟槽到达第二沟槽时停止形成第一沟槽和第二沟槽掩埋氧化层。

3. 发明授权

US08871643B2 Lateral semiconductor device and manufacturing method for the same 有权
标题翻译：侧面半导体器件及其制造方法相同
公开(公告)号：US08871643B2
公开(公告)日：2014-10-28
申请号：US13976266
申请日：2011-02-08
申请人： Hiroomi Eguchi , Takashi Okawa , Atsushi Onogi
发明人： Hiroomi Eguchi , Takashi Okawa , Atsushi Onogi
IPC分类号： H01L21/302 , H01L29/66 , H01L29/423 , H01L29/739 , H01L21/306
CPC分类号： H01L29/6625 , H01L21/30604 , H01L29/4236 , H01L29/66325 , H01L29/7394
摘要： A manufacturing method for manufacturing a lateral semiconductor device having an SOI (Silicon on Insulator) substrate, the lateral semiconductor device comprising a semiconductor layer that includes a buried oxide layer and a drift region, the manufacturing method comprising an etching process of etching, by a predetermined depth, a LOCOS oxide that projects from a surface of the semiconductor layer by a predetermined thickness and is embedded in the semiconductor layer by a predetermined thickness, and a trench forming process of simultaneously forming a first trench extending from the drift region toward the buried oxide layer, and a second trench extending from a portion obtained by the etching in the etching process toward the buried oxide layer, at a same etching rate, and stopping forming the first trench and the second trench at a time when the second trench reaches the buried oxide layer.
摘要翻译：一种用于制造具有SOI（绝缘体上硅）衬底的横向半导体器件的制造方法，所述横向半导体器件包括包括掩埋氧化物层和漂移区的半导体层，所述制造方法包括通过蚀刻的蚀刻工艺，预定深度，从半导体层的表面突出预定厚度并以预定厚度嵌入到半导体层中的LOCOS氧化物，以及沟槽形成工艺，其同时形成从漂移区延伸到掩埋的第一沟槽氧化物层，以及从蚀刻处理中通过蚀刻获得的部分以相同的蚀刻速率向掩埋氧化物层延伸的第二沟槽，并且在第二沟槽到达第二沟槽时停止形成第一沟槽和第二沟槽掩埋氧化层。

4. 发明授权

US09112024B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09112024B2
公开(公告)日：2015-08-18
申请号：US14111704
申请日：2011-05-17
申请人： Atsushi Onogi , Hiroomi Eguchi , Takashi Okawa
发明人： Atsushi Onogi , Hiroomi Eguchi , Takashi Okawa
IPC分类号： H01L29/66 , H01L29/78 , H01L29/739 , H01L29/06 , H01L29/08 , H01L29/40 , H01L29/423
CPC分类号： H01L29/7816 , H01L29/0634 , H01L29/0696 , H01L29/0878 , H01L29/402 , H01L29/42368 , H01L29/7394 , H01L29/7824
摘要： A lateral semiconductor device including a semiconductor substrate; a buried oxide layer formed on the semiconductor substrate, and an active layer formed on the buried oxide layer. The active layer includes a first conductivity type well region, a second conductivity type well region, and a first conductivity type drift region interposed between the first conductivity type well region and the second conductivity type well region. A region where current flows because of carriers moving between the first conductivity type well region and the second conductivity type well region, and a region where no current flows are formed alternately between the first conductivity type well region and the second conductivity type well region, in a direction perpendicular to a carrier moving direction when viewed in a plan view.
摘要翻译：一种包括半导体衬底的横向半导体器件; 形成在半导体衬底上的掩埋氧化物层和形成在掩埋氧化物层上的有源层。有源层包括介于第一导电类型阱区和第二导电类型阱区之间的第一导电类型阱区，第二导电类型阱区和第一导电类型漂移区。由于载流子在第一导电类型阱区域和第二导电类型阱区域之间移动，并且在第一导电类型阱区域和第二导电类型阱区域之间交替形成没有电流流动的区域，电流流动的区域，在平面图中观察时垂直于载体移动方向的方向。

5. 发明授权

US09048107B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09048107B2
公开(公告)日：2015-06-02
申请号：US13876170
申请日：2011-09-26
申请人： Hiroomi Eguchi , Atsushi Onogi , Takashi Okawa , Kiyoharu Hayakawa
发明人： Hiroomi Eguchi , Atsushi Onogi , Takashi Okawa , Kiyoharu Hayakawa
IPC分类号： H01L29/06 , H01L27/06 , H01L29/08 , H01L29/739 , H01L29/861 , H01L29/16 , H01L29/20
CPC分类号： H01L29/0611 , H01L27/0676 , H01L29/0696 , H01L29/0834 , H01L29/1608 , H01L29/20 , H01L29/2003 , H01L29/7394 , H01L29/861
摘要： A semiconductor device includes a semiconductor layer; a first type of a first semiconductor element that is arranged in a first element region of the semiconductor layer, has first and second main electrodes, and switches current; and a second type of a second semiconductor element that is arranged in a second element region of the semiconductor layer, has third and fourth main electrodes, and freewheels the current. The first and second element regions are adjacent in a direction orthogonal to a direction in which current flows, and are formed in a loop shape over the entire element region when the semiconductor layer is viewed from above. The first main electrode is electrically connected to the third main electrode, and the second main electrode is electrically connected to the fourth main electrode. When the semiconductor layer is viewed from above, a ratio of a length of the first main electrode to a length of the second main electrode is larger than a ratio of a length of the third main electrode to a length of the fourth main electrode.
摘要翻译：半导体器件包括半导体层; 布置在半导体层的第一元件区域中的第一半导体元件的第一类型具有第一和第二主电极并切换电流; 以及布置在所述半导体层的第二元件区域中的第二类型的第二半导体元件，具有第三和第四主电极，并且使所述电流自由转动。第一和第二元件区域在与电流流动的方向正交的方向上相邻，并且当从上方观察半导体层时，在整个元件区域上形成为环形。第一主电极与第三主电极电连接，第二主电极与第四主电极电连接。当从上方观察半导体层时，第一主电极的长度与第二主电极的长度的比例大于第三主电极的长度与第四主电极的长度的比率。

6. 发明申请

US20140035036A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20140035036A1
公开(公告)日：2014-02-06
申请号：US14111704
申请日：2011-05-17
申请人： Atsushi Onogi , Hiroomi Eguchi , Takashi Okawa
发明人： Atsushi Onogi , Hiroomi Eguchi , Takashi Okawa
IPC分类号： H01L29/78
CPC分类号： H01L29/7816 , H01L29/0634 , H01L29/0696 , H01L29/0878 , H01L29/402 , H01L29/42368 , H01L29/7394 , H01L29/7824
摘要： A lateral semiconductor device including a semiconductor substrate; a buried oxide layer formed on the semiconductor substrate, and an active layer formed on the buried oxide layer. The active layer includes a first conductivity type well region, a second conductivity type well region, and a first conductivity type drift region interposed between the first conductivity type well region and the second conductivity type well region. A region where current flows because of carriers moving between the first conductivity type well region and the second conductivity type well region, and a region where no current flows are formed alternately between the first conductivity type well region and the second conductivity type well region, in a direction perpendicular to a carrier moving direction when viewed in a plan view.
摘要翻译：一种包括半导体衬底的横向半导体器件; 形成在半导体衬底上的掩埋氧化物层和形成在掩埋氧化物层上的有源层。有源层包括介于第一导电类型阱区和第二导电类型阱区之间的第一导电类型阱区，第二导电类型阱区和第一导电类型漂移区。由于载流子在第一导电类型阱区域和第二导电类型阱区域之间移动，并且在第一导电类型阱区域和第二导电类型阱区域之间交替形成没有电流流动的区域，电流流动的区域，在平面图中观察时垂直于载体移动方向的方向。

7. 发明申请

US20100026996A1 SURFACE INSPECTION METHOD AND SURFACE INSPECTION APPARATUS 有权
标题翻译：表面检查方法和表面检查装置
公开(公告)号：US20100026996A1
公开(公告)日：2010-02-04
申请号：US12576580
申请日：2009-10-09
申请人： Takashi Okawa , Kenji Mitomo
发明人： Takashi Okawa , Kenji Mitomo
IPC分类号： G01N21/00
CPC分类号： G01N21/9503 , G01N21/94
摘要： When measuring an edge region, a photo detector with an angle not influenced by the diffracted light, the diffracted light causing noise, is selected to thereby allow for inspection that minimizes the sensitivity reduction. This allows for the management of foreign matters in the outer peripheral portion, which conventionally could not be measured, and this also eliminates the oversight of critical defects on the wafer, thus leading to reduction of failures of IC.
摘要翻译：当测量边缘区域时，选择具有不受衍射光影响的角度的衍射光引起噪声的光电检测器，从而允许最小化灵敏度降低的检查。这允许管理外围部分中的异常情况，其通常不能被测量，并且这也消除了对晶片的关键缺陷的疏忽，从而导致IC故障的减少。

8. 发明授权

US07616299B2 Surface inspection method and surface inspection apparatus 有权
标题翻译：表面检查方法和表面检查装置
公开(公告)号：US07616299B2
公开(公告)日：2009-11-10
申请号：US11822469
申请日：2007-07-06
申请人： Takashi Okawa , Kenji Mitomo
发明人： Takashi Okawa , Kenji Mitomo
IPC分类号： G01N21/00
CPC分类号： G01N21/9503 , G01N21/94
摘要： When measuring an edge region, a photo detector with an angle not influenced by the diffracted light, the diffracted light causing noise, is selected to thereby allow for inspection that minimizes the sensitivity reduction. This allows for the management of foreign matters in the outer peripheral portion, which conventionally could not be measured, and this also eliminates the oversight of critical defects on the wafer, thus leading to reduction of failures of IC.
摘要翻译：当测量边缘区域时，选择具有不受衍射光影响的角度的衍射光引起噪声的光电检测器，从而允许最小化灵敏度降低的检查。这允许管理外围部分中的异常情况，其通常不能被测量，并且这也消除了对晶片的关键缺陷的疏忽，从而导致IC故障的减少。

9. 发明申请

US20050270721A1 Tweezers with grounding wire 审中-公开
标题翻译：镊子带接地线
公开(公告)号：US20050270721A1
公开(公告)日：2005-12-08
申请号：US11204716
申请日：2005-08-16
申请人： Takashi Okawa , Shigenobu Yamanaka , Hideki Utaki , Akio Harada
发明人： Takashi Okawa , Shigenobu Yamanaka , Hideki Utaki , Akio Harada
IPC分类号： A61B17/30 , B25B9/02 , H02H1/00
CPC分类号： A61B17/30 , B25B9/02
摘要： There are proposed tweezers with grounding wire for grabbing a minute object containing an infinitesimal substance, which can discharge static electricity in the human body when it is used to grab a minute object, and which thus prevents the action of static electricity on the minute object and/or infinitesimal substance therein. The tweezers with grounding wire is constructed by connecting the grounding wire 2 for discharging the static electricity when a human operates the tweezers 1 The tweezers with grounding wire is particularly useful for handling a minute object 8 containing infinitesimal substance 7 of which shape is unrecognizable with naked eyes or an optical microscope. Since static electricity in the human body or in the object handled is discharged through the grounding wire 2 from the tweezers 1, the minute object 8 and the infinitesimal substance 7 to be handled are not subject to the action of static electricity, and thus are kept free from destruction or damage of static electricity.
摘要翻译：有人提出用接地线镊子抓住含有微量物质的微小物体，当用来抓住微小物体时，能够释放人体内的静电，从而防止静电对微小物体的作用， /或其中的微小物质。具有接地线的镊子通过连接接地线2而构成，当人类操作镊子时，用于排放静电的地线2.具有接地线的镊子特别可用于处理包含无定形物质的微小物体8，其中形状不可识别眼睛或光学显微镜。由于人体或被处理物体中的静电通过接地线2从镊子1排出，所以待处理的微小物体8和无限小物质7不受静电的作用，因此被保持免受静电破坏或损坏。

10. 发明授权

US06787769B2 Conductive probe for scanning microscope and machining method using the same 失效
标题翻译：用于扫描显微镜的导电探针及使用其的加工方法
公开(公告)号：US06787769B2
公开(公告)日：2004-09-07
申请号：US10182331
申请日：2002-07-26
申请人： Yoshikazu Nakayama , Seiji Akita , Akio Harada , Takashi Okawa , Yuichi Takano , Masatoshi Yasutake , Yoshiharu Shirakawabe
发明人： Yoshikazu Nakayama , Seiji Akita , Akio Harada , Takashi Okawa , Yuichi Takano , Masatoshi Yasutake , Yoshiharu Shirakawabe
IPC分类号： G01N2300
CPC分类号： G01Q60/16 , G01Q60/38 , G01Q60/54 , G01Q70/12
摘要： A conductive probe for a scanning type microscope that captures the substance information of the surface of a specimen by the tip end of a conductive nanotube probe needle fastened to a cantilever, in which the conductive probe is constructed from a conductive film formed on the surface of the cantilever, a conductive nonatube with its base end portion being fixed in contact which the surface of a predetermined of the cantilever, and a conductive deposit which fastens the conductive nanotube by covering from the base end portion of the nonatube to a part of the conductive film. The conductive nonatube and the conductive film are electrically connected to each other by the conductive deposit.
摘要翻译：一种用于扫描型显微镜的导电探针，其通过固定到悬臂的导电纳米管探针的尖端捕获试样表面的物质信息，其中导电探针由形成在表面上的导电膜构成悬臂，其基端部固定为导电的非导管，其中预定的悬臂的表面是接触的，以及导电沉积物，其通过从非管形管的基端部分覆盖到导电的一部分来紧固导电纳米管电影。导电非导体和导电膜通过导电沉积物彼此电连接。

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