会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明申请
    • POWER AMPLIFIER BIAS CIRCUIT
    • 功率放大器偏置电路
    • US20110018639A1
    • 2011-01-27
    • US12712234
    • 2010-02-25
    • Takayuki MatsuzukaKazuya YamamotoAtsushi Okamura
    • Takayuki MatsuzukaKazuya YamamotoAtsushi Okamura
    • H03F3/04
    • H03F1/0261H03F3/195H03F3/245H03F2200/18H03F2200/451H03F2200/555
    • A power amplifier and bias circuit includes a combination circuit in which a voltage drive bias circuit and a current drive bias circuit are connected in a parallel relationship with each other. The power amplifier bias circuit also includes an idle current control circuit which uses the collector voltage of amplifier transistors. When the collector voltage of the amplifier transistors is lower than the threshold voltage of a first transistor (approximately 1.3 V), the first transistor is turned off. At that time, since the reference voltage (2.4-2.5 V) is higher than the voltage for turning on both a second transistor and a diode (namely, approximately 1.3 V plus 0.7 V), a current flows and the first transistor turns on. As a result, a current is drawn from the bases of the amplifier transistors to GND through two resistances, so that the idle currents of the amplifier transistors decrease.
    • 功率放大器和偏置电路包括其中电压驱动偏置电路和电流驱动偏置电路彼此并联连接的组合电路。 功率放大器偏置电路还包括使用放大器晶体管的集电极电压的空闲电流控制电路。 当放大器晶体管的集电极电压低于第一晶体管(约1.3V)的阈值电压时,第一晶体管截止。 此时,由于参考电压(2.4-2.5V)高于用于接通第二晶体管和二极管的电压(即,大约1.3V加上0.7V),所以电流流过,第一晶体管导通。 结果,通过两个电阻将电流从放大器晶体管的基极拉到GND,使得放大器晶体管的空闲电流减小。
    • 3. 发明申请
    • POWER AMPLIFIER
    • 功率放大器
    • US20130207729A1
    • 2013-08-15
    • US13611844
    • 2012-09-12
    • Atsushi OkamuraTakayuki Matsuzuka
    • Atsushi OkamuraTakayuki Matsuzuka
    • H03F3/21
    • H03F1/0261H03F1/302H03F1/56H03F3/602H03F2200/18H03F2200/411
    • A power amplifier includes: an amplifier having a base into which input signals are input, a collector to which a collector voltage is supplied, and an emitter; and a bias circuit for supplying a bias current to the base of the amplifier. The bias circuit includes a first transistor having a first control terminal into which a reference voltage is input, a first terminal to which a power voltage is applied, and a second terminal connected to the base of the amplifier. A capacitance adjusting circuit elevates capacitance between a grounding point and at least one of the first control terminal and the first terminal when the collector voltage of the amplifier is lowered.
    • 功率放大器包括:具有输入信号的基极的放大器,提供集电极电压的集电极和发射极; 以及用于向放大器的基极提供偏置电流的偏置电路。 偏置电路包括具有输入基准电压的第一控制端子的第一晶体管,施加电源电压的第一端子和连接到放大器的基极的第二端子。 当放大器的集电极电压降低时,电容调整电路提高接地点与第一控制端子和第一端子中的至少一个之间的电容。
    • 4. 发明授权
    • Power amplifier
    • 功率放大器
    • US08686795B2
    • 2014-04-01
    • US13611844
    • 2012-09-12
    • Atsushi OkamuraTakayuki Matsuzuka
    • Atsushi OkamuraTakayuki Matsuzuka
    • H03F3/04
    • H03F1/0261H03F1/302H03F1/56H03F3/602H03F2200/18H03F2200/411
    • A power amplifier includes: an amplifier having a base into which input signals are input, a collector to which a collector voltage is supplied, and an emitter; and a bias circuit for supplying a bias current to the base of the amplifier. The bias circuit includes a first transistor having a first control terminal into which a reference voltage is input, a first terminal to which a power voltage is applied, and a second terminal connected to the base of the amplifier. A capacitance adjusting circuit elevates capacitance between a grounding point and at least one of the first control terminal and the first terminal when the collector voltage of the amplifier is lowered.
    • 功率放大器包括:具有输入信号的基极的放大器,提供集电极电压的集电极和发射极; 以及用于向放大器的基极提供偏置电流的偏置电路。 偏置电路包括具有输入基准电压的第一控制端子的第一晶体管,施加电源电压的第一端子和连接到放大器的基极的第二端子。 当放大器的集电极电压降低时,电容调整电路提高接地点与第一控制端子和第一端子中的至少一个之间的电容。
    • 5. 发明授权
    • Power amplifier bias circuit
    • 功率放大器偏置电路
    • US07936219B2
    • 2011-05-03
    • US12712234
    • 2010-02-25
    • Takayuki MatsuzukaKazuya YamamotoAtsushi Okamura
    • Takayuki MatsuzukaKazuya YamamotoAtsushi Okamura
    • H03F3/04
    • H03F1/0261H03F3/195H03F3/245H03F2200/18H03F2200/451H03F2200/555
    • A power amplifier and bias circuit includes a combination circuit in which a voltage drive bias circuit and a current drive bias circuit are connected in a parallel relationship with each other. The power amplifier bias circuit also includes an idle current control circuit which uses the collector voltage of amplifier transistors. When the collector voltage of the amplifier transistors is lower than the threshold voltage of a first transistor (approximately 1.3 V), the first transistor is turned off. At that time, since the reference voltage (2.4-2.5 V) is higher than the voltage for turning on both a second transistor and a diode (namely, approximately 1.3 V plus 0.7 V), a current flows and the first transistor turns on. As a result, a current is drawn from the bases of the amplifier transistors to GND through two resistances, so that the idle currents of the amplifier transistors decrease.
    • 功率放大器和偏置电路包括其中电压驱动偏置电路和电流驱动偏置电路彼此并联连接的组合电路。 功率放大器偏置电路还包括使用放大器晶体管的集电极电压的空闲电流控制电路。 当放大器晶体管的集电极电压低于第一晶体管(约1.3V)的阈值电压时,第一晶体管截止。 此时,由于参考电压(2.4-2.5V)高于用于接通第二晶体管和二极管的电压(即,大约1.3V加上0.7V),所以电流流过,第一晶体管导通。 结果,通过两个电阻将电流从放大器晶体管的基极拉到GND,使得放大器晶体管的空闲电流减小。
    • 7. 发明授权
    • Bus system and information processing system including bus system
    • 总线系统和信息处理系统,包括总线系统
    • US07337260B2
    • 2008-02-26
    • US10405258
    • 2003-04-01
    • Kenichiro AnjoAtsushi Okamura
    • Kenichiro AnjoAtsushi Okamura
    • G06F13/40
    • G06F13/364G06F13/4018
    • In a bus connection circuit for connecting buses having different bit widths, number of clock cycles can be reduced, and hardware amount can be reduced. The bus connection circuit connects buses of mutually different bit widths having control lines and data lines connected to a bus master unit and bus slave unit. The control command lines of the buses are connected to a common control command bus to control command information on the buses. The data lines of the buses are connected via a data conversion unit to perform bit width conversion between the buses. An arbitration circuit is provided to perform arbitration of bus right for the buses in response arbitration request. Upon transfer of data between the buses, by obtaining of bus right by sender side bus, write access and rear access between buses is performed.
    • 在用于连接具有不同位宽度的总线的总线连接电路中,可以减少时钟周期数,并且可以减少硬件量。 总线连接电路连接具有连接到总线主单元和总线从单元的控制线和数据线的彼此不同位宽的总线。 总线的控制命令行连接到公共控制命令总线,以控制总线上的命令信息。 总线的数据线通过数据转换单元连接,以实现总线之间的位宽转换。 提供仲裁电路,以响应仲裁请求对总线执行总线权限的仲裁。 在总线之间传输数据时,通过由发送器侧总线获得总线,执行总线之间的写访问和后访问。
    • 8. 发明申请
    • Off-Axis Angle Estimation Method and Apparatus Using the Same
    • 离轴角度估计方法及其使用方法
    • US20080012752A1
    • 2008-01-17
    • US11632926
    • 2004-11-12
    • Atsushi OkamuraRokuzou HaraToshio WakayamaToshiyuki Hirai
    • Atsushi OkamuraRokuzou HaraToshio WakayamaToshiyuki Hirai
    • G01S7/40G01S13/93
    • G01S13/931G01S7/4026G01S2007/403G01S2007/4091G01S2013/9321G01S2013/9325G01S2013/9339
    • Without using a traveling velocity of a vehicular object mounted with a radar device, an off-axis angle which is an offset angle between a reference direction of the radar device and a traveling direction of the vehicular object is estimated. An off-axis angle estimation method for estimating an off-axis angle (φ) of a radar device (1) mounted on the vehicular object having a predetermined traveling direction includes that, from among reflection points of which a relative-velocity component (q) along the line of radar sight and an azimuthal angle (θ) are detected by the radar device (1), a plurality of reflection points of which the relative-velocity components in the traveling direction of the vehicular object being approximately equal to one another is selected without using the traveling velocity of the vehicular object; and based on the relative-velocity components along the line of radar sight, and on the azimuthal angles, of the plurality of reflection points having been selected, the off-axis angle (φ) is autonomously calculated solely from the observed values based on radar waves.
    • 在不使用安装有雷达装置的车辆的行驶速度的情况下,估计作为雷达装置的基准方向与车辆物体的行进方向之间的偏移角的离轴角度。 用于估计安装在具有预定行进方向的车辆上的雷达装置(1)的离轴角度(f i)的离轴角度估计方法包括:从相对速度分量(q )和雷达装置(1)检测到的方位角(θ),车辆物体的行进方向上的相对速度分量大致相等的多个反射点 在不使用车辆的行进速度的情况下被选择; 并且基于沿着雷达视线的相对速度分量和在所选择的多个反射点的方位角上,离轴角度(phi)仅根据基于雷达的观测值自主计算 波浪。
    • 10. 发明授权
    • Radar device
    • 雷达设备
    • US07586436B2
    • 2009-09-08
    • US10567789
    • 2003-09-11
    • Toshio WakayamaTakashi SekiguchiAtsushi OkamuraMasayoshi ItoTakayuki InabaMasashi Mitsumoto
    • Toshio WakayamaTakashi SekiguchiAtsushi OkamuraMasayoshi ItoTakayuki InabaMasashi Mitsumoto
    • G01S13/00
    • G01S13/48G01S13/426
    • A radar device separates directions of a plurality of targets, obtained from combinations of antenna beams, with a high accuracy. The radar device includes: a direction calculating unit for calculating a primary direction, which is the direction of a target, from a combination of characterizing quantities calculated by a signal detector from the reception waves of at least two beams that partially overlap, among the beams radiated in the plurality of directions; and a direction integrating unit for, when a plurality of primary directions calculated by the direction calculating unit is present, calculating an integrated direction, which is the true target direction, from an area in which distribution of the plurality of primary directions is a predetermined density or greater, based on the primary directions belonging to the area.
    • 雷达装置以高精度分离从天线波束的组合获得的多个目标的方向。 雷达装置包括:方向计算单元,用于根据来自部分重叠的至少两个波束的接收波的信号检测器计算的特征量的组合来计算作为目标的方向的主方向 沿多个方向辐射; 以及方向整合单元,用于当存在由方向计算单元计算的多个主要方向时,从多个主方向的分布是预定密度的区域中计算作为真实目标方向的积分方向 或更大,基于属于该地区的主要方向。