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    • 2. 发明申请
    • POWER AMPLIFIER BIAS CIRCUIT
    • 功率放大器偏置电路
    • US20110018639A1
    • 2011-01-27
    • US12712234
    • 2010-02-25
    • Takayuki MatsuzukaKazuya YamamotoAtsushi Okamura
    • Takayuki MatsuzukaKazuya YamamotoAtsushi Okamura
    • H03F3/04
    • H03F1/0261H03F3/195H03F3/245H03F2200/18H03F2200/451H03F2200/555
    • A power amplifier and bias circuit includes a combination circuit in which a voltage drive bias circuit and a current drive bias circuit are connected in a parallel relationship with each other. The power amplifier bias circuit also includes an idle current control circuit which uses the collector voltage of amplifier transistors. When the collector voltage of the amplifier transistors is lower than the threshold voltage of a first transistor (approximately 1.3 V), the first transistor is turned off. At that time, since the reference voltage (2.4-2.5 V) is higher than the voltage for turning on both a second transistor and a diode (namely, approximately 1.3 V plus 0.7 V), a current flows and the first transistor turns on. As a result, a current is drawn from the bases of the amplifier transistors to GND through two resistances, so that the idle currents of the amplifier transistors decrease.
    • 功率放大器和偏置电路包括其中电压驱动偏置电路和电流驱动偏置电路彼此并联连接的组合电路。 功率放大器偏置电路还包括使用放大器晶体管的集电极电压的空闲电流控制电路。 当放大器晶体管的集电极电压低于第一晶体管(约1.3V)的阈值电压时,第一晶体管截止。 此时,由于参考电压(2.4-2.5V)高于用于接通第二晶体管和二极管的电压(即,大约1.3V加上0.7V),所以电流流过,第一晶体管导通。 结果,通过两个电阻将电流从放大器晶体管的基极拉到GND,使得放大器晶体管的空闲电流减小。
    • 4. 发明授权
    • Power amplifier bias circuit
    • 功率放大器偏置电路
    • US07936219B2
    • 2011-05-03
    • US12712234
    • 2010-02-25
    • Takayuki MatsuzukaKazuya YamamotoAtsushi Okamura
    • Takayuki MatsuzukaKazuya YamamotoAtsushi Okamura
    • H03F3/04
    • H03F1/0261H03F3/195H03F3/245H03F2200/18H03F2200/451H03F2200/555
    • A power amplifier and bias circuit includes a combination circuit in which a voltage drive bias circuit and a current drive bias circuit are connected in a parallel relationship with each other. The power amplifier bias circuit also includes an idle current control circuit which uses the collector voltage of amplifier transistors. When the collector voltage of the amplifier transistors is lower than the threshold voltage of a first transistor (approximately 1.3 V), the first transistor is turned off. At that time, since the reference voltage (2.4-2.5 V) is higher than the voltage for turning on both a second transistor and a diode (namely, approximately 1.3 V plus 0.7 V), a current flows and the first transistor turns on. As a result, a current is drawn from the bases of the amplifier transistors to GND through two resistances, so that the idle currents of the amplifier transistors decrease.
    • 功率放大器和偏置电路包括其中电压驱动偏置电路和电流驱动偏置电路彼此并联连接的组合电路。 功率放大器偏置电路还包括使用放大器晶体管的集电极电压的空闲电流控制电路。 当放大器晶体管的集电极电压低于第一晶体管(约1.3V)的阈值电压时,第一晶体管截止。 此时,由于参考电压(2.4-2.5V)高于用于接通第二晶体管和二极管的电压(即,大约1.3V加上0.7V),所以电流流过,第一晶体管导通。 结果,通过两个电阻将电流从放大器晶体管的基极拉到GND,使得放大器晶体管的空闲电流减小。
    • 7. 发明申请
    • POWER AMPLIFIER
    • 功率放大器
    • US20120062321A1
    • 2012-03-15
    • US13079046
    • 2011-04-04
    • Kazuya YamamotoMiyo MiyashitaSatoshi SuzukiTakayuki Matsuzuka
    • Kazuya YamamotoMiyo MiyashitaSatoshi SuzukiTakayuki Matsuzuka
    • H03F3/20
    • H03F3/195H03F1/0277H03F3/189H03F3/245H03F3/72H03F2200/27H03F2200/411H03F2203/7206H03F2203/7236H03G1/0088
    • A power amplifier comprises: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage. The reference voltage generating circuit is turned ON/OFF in correspondence with an output voltage of the booster. The booster includes: an enable terminal to which the enable voltage is applied; a power source terminal connected to a power source; a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded; and a FET resistor connected between the first electrode of the transistor and the power source terminal. A gate electrode of the FET resistor is open.
    • 功率放大器包括:放大晶体管,用于放大输入信号; 产生参考电压的基准电压产生电路; 偏置电路,基于所述参考电压产生偏置电压,并将所述偏置电压提供给所述放大晶体管; 并且升压器提升从外部输入的使能电压并输出使能电压。 参考电压产生电路对应于升压器的输出电压而导通/截止。 升压器包括:施加使能电压的使能端子; 连接到电源的电源端子; 具有连接到使能端子的控制电极的晶体管,连接到电源端子的第一电极和接地的第二电极; 以及连接在晶体管的第一电极和电源端子之间的FET电阻器。 FET电阻的栅电极断开。
    • 9. 发明授权
    • Power amplifier
    • 功率放大器
    • US08217722B2
    • 2012-07-10
    • US13079046
    • 2011-04-04
    • Kazuya YamamotoMiyo MiyashitaSatoshi SuzukiTakayuki Matsuzuka
    • Kazuya YamamotoMiyo MiyashitaSatoshi SuzukiTakayuki Matsuzuka
    • H03F3/20
    • H03F3/195H03F1/0277H03F3/189H03F3/245H03F3/72H03F2200/27H03F2200/411H03F2203/7206H03F2203/7236H03G1/0088
    • A power amplifier comprises: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage. The reference voltage generating circuit is turned ON/OFF in correspondence with an output voltage of the booster. The booster includes: an enable terminal to which the enable voltage is applied; a power source terminal connected to a power source; a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded; and a FET resistor connected between the first electrode of the transistor and the power source terminal. A gate electrode of the FET resistor is open.
    • 功率放大器包括:放大晶体管,用于放大输入信号; 产生参考电压的基准电压产生电路; 偏置电路,基于所述参考电压产生偏置电压,并将所述偏置电压提供给所述放大晶体管; 并且升压器提升从外部输入的使能电压并输出使能电压。 基准电压发生电路与增压器的输出电压对应地接通/断开。 升压器包括:施加使能电压的使能端子; 连接到电源的电源端子; 具有连接到使能端子的控制电极的晶体管,连接到电源端子的第一电极和接地的第二电极; 以及连接在晶体管的第一电极和电源端子之间的FET电阻器。 FET电阻的栅电极断开。