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1. 发明授权

US09159888B2 Wafer level phosphor coating method and devices fabricated utilizing method 有权
标题翻译：晶圆级荧光粉涂布方法及利用方法制造的器件
公开(公告)号：US09159888B2
公开(公告)日：2015-10-13
申请号：US11899790
申请日：2007-09-07
申请人： Ashay Chitnis , James Ibbetson , Bernd Keller , David T. Emerson , John Edmond , Michael J. Bergmann , Jasper S. Cabalu , Jeffrey C. Britt , Arpan Chakraborty , Eric Tarsa , Yankun Fu
发明人： Ashay Chitnis , James Ibbetson , Bernd Keller , David T. Emerson , John Edmond , Michael J. Bergmann , Jasper S. Cabalu , Jeffrey C. Britt , Arpan Chakraborty , Eric Tarsa , James Seruto , Yankun Fu
IPC分类号： H01L33/00 , H01L33/50 , H01L33/62 , H01L33/38 , H01L33/36 , H01L33/44 , H01L33/54
CPC分类号： H01L33/508 , H01L33/0095 , H01L33/36 , H01L33/387 , H01L33/44 , H01L33/505 , H01L33/54 , H01L33/62 , H01L2924/0002 , H01L2933/0091 , H01L2924/00
摘要： Methods for fabricating light emitting diode (LED) chips comprising providing a plurality of LEDs typically on a substrate. Pedestals are deposited on the LEDs with each of the pedestals in electrical contact with one of the LEDs. A coating is formed over the LEDs with the coating burying at least some of the pedestals. The coating is then planarized to expose at least some of the buried pedestals while leaving at least some of said coating on said LEDs. The exposed pedestals can then be contacted such as by wire bonds. The present invention discloses similar methods used for fabricating LED chips having LEDs that are flip-chip bonded on a carrier substrate and for fabricating other semiconductor devices. LED chip wafers and LED chips are also disclosed that are fabricated using the disclosed methods.
摘要翻译：制造发光二极管（LED）芯片的方法包括通常在衬底上提供多个LED。基座沉积在LED上，每个基座与其中一个LED电接触。在LED上形成涂层，其中涂层埋入至少一些基座。然后将涂层平坦化以暴露至少一些埋置的基座，同时在所述LED上留下至少一些所述涂层。然后可以例如通过引线接合露出的基座。本发明公开了用于制造LED芯片的类似方法，所述LED芯片具有倒装芯片接合在载体基板上并用于制造其它半导体器件的LED。还公开了使用所公开的方法制造的LED芯片晶片和LED芯片。

2. 发明申请

US20080179611A1 Wafer level phosphor coating method and devices fabricated utilizing method 有权
标题翻译：晶圆级荧光粉涂布方法及利用方法制造的器件
公开(公告)号：US20080179611A1
公开(公告)日：2008-07-31
申请号：US11899790
申请日：2007-09-07
申请人： Ashay Chitnis , James Ibbetson , Bernd Keller , David T. Emerson , John Edmond , Michael J. Bergmann , Jasper S. Cabalu , Jeffrey C. Britt , Arpan Chakraborty , Eric Tarsa , James Seruto , Yankun Fu
发明人： Ashay Chitnis , James Ibbetson , Bernd Keller , David T. Emerson , John Edmond , Michael J. Bergmann , Jasper S. Cabalu , Jeffrey C. Britt , Arpan Chakraborty , Eric Tarsa , James Seruto , Yankun Fu
IPC分类号： H01L33/00
CPC分类号： H01L33/508 , H01L33/0095 , H01L33/36 , H01L33/387 , H01L33/44 , H01L33/505 , H01L33/54 , H01L33/62 , H01L2924/0002 , H01L2933/0091 , H01L2924/00
摘要： Methods for fabricating light emitting diode (LED) chips comprising providing a plurality of LEDs typically on a substrate. Pedestals are deposited on the LEDs with each of the pedestals in electrical contact with one of the LEDs. A coating is formed over the LEDs with the coating burying at least some of the pedestals. The coating is then planarized to expose at least some of the buried pedestals while leaving at least some of said coating on said LEDs. The exposed pedestals can then be contacted such as by wire bonds. The present invention discloses similar methods used for fabricating LED chips having LEDs that are flip-chip bonded on a carrier substrate and for fabricating other semiconductor devices. LED chip wafers and LED chips are also disclosed that are fabricated using the disclosed methods.
摘要翻译：制造发光二极管（LED）芯片的方法包括通常在衬底上提供多个LED。基座沉积在LED上，每个基座与其中一个LED电接触。在LED上形成涂层，其中涂层埋入至少一些基座。然后将涂层平坦化以暴露至少一些埋置的基座，同时在所述LED上留下至少一些所述涂层。然后可以例如通过引线接合露出的基座。本发明公开了用于制造LED芯片的类似方法，所述LED芯片具有倒装芯片接合在载体基板上并用于制造其它半导体器件的LED。还公开了使用所公开的方法制造的LED芯片晶片和LED芯片。

3. 发明授权

US09024349B2 Wafer level phosphor coating method and devices fabricated utilizing method 有权
公开(公告)号：US09024349B2
公开(公告)日：2015-05-05
申请号：US11656759
申请日：2007-01-22
申请人： Ashay Chitnis , James Ibbetson , Arpan Chakraborty , Eric J. Tarsa , Bernd Keller , James Seruto , Yankun Fu
发明人： Ashay Chitnis , James Ibbetson , Arpan Chakraborty , Eric J. Tarsa , Bernd Keller , James Seruto , Yankun Fu
IPC分类号： H01L33/38 , H01L33/62 , H01L33/44 , H01L33/50 , H01L23/31
CPC分类号： H01L33/62 , H01L23/3114 , H01L33/38 , H01L33/387 , H01L33/44 , H01L33/501 , H01L33/507 , H01L33/508 , H01L2924/0002 , H01L2933/0041 , H01L2924/00
摘要： Methods for fabricating light emitting diode (LED) chips comprising providing a plurality of LEDs typically on a substrate. Pedestals are deposited on the LEDs with each of the pedestals in electrical contact with one of the LEDs. A coating is formed over the LEDs with the coating burying at least some of the pedestals. The coating is then planarized to expose at least some of the buried pedestals while leaving at least some of said coating on said LEDs. The exposed pedestals can then be contacted such as by wire bonds. The present invention discloses similar methods used for fabricating LED chips having LEDs that are flip-chip bonded on a carrier substrate and for fabricating other semiconductor devices. LED chip wafers and LED chips are also disclosed that are fabricated using the disclosed methods.

4. 发明申请

US20080173884A1 Wafer level phosphor coating method and devices fabricated utilizing method 有权
公开(公告)号：US20080173884A1
公开(公告)日：2008-07-24
申请号：US11656759
申请日：2007-01-22
申请人： Ashay Chitnis , James Ibbetson , Arpan Chakraborty , Eric J. Tarsa , Bernd Keller , James Seruto , Yankun Fu
发明人： Ashay Chitnis , James Ibbetson , Arpan Chakraborty , Eric J. Tarsa , Bernd Keller , James Seruto , Yankun Fu
IPC分类号： H01L33/00
CPC分类号： H01L33/62 , H01L23/3114 , H01L33/38 , H01L33/387 , H01L33/44 , H01L33/501 , H01L33/507 , H01L33/508 , H01L2924/0002 , H01L2933/0041 , H01L2924/00
摘要： Methods for fabricating light emitting diode (LED) chips comprising providing a plurality of LEDs typically on a substrate. Pedestals are deposited on the LEDs with each of the pedestals in electrical contact with one of the LEDs. A coating is formed over the LEDs with the coating burying at least some of the pedestals. The coating is then planarized to expose at least some of the buried pedestals while leaving at least some of said coating on said LEDs. The exposed pedestals can then be contacted such as by wire bonds. The present invention discloses similar methods used for fabricating LED chips having LEDs that are flip-chip bonded on a carrier substrate and for fabricating other semiconductor devices. LED chip wafers and LED chips are also disclosed that are fabricated using the disclosed methods.

5. 发明授权

US08877524B2 Emission tuning methods and devices fabricated utilizing methods 有权
标题翻译：使用方法制造的排放调节方法和装置
公开(公告)号：US08877524B2
公开(公告)日：2014-11-04
申请号：US12414457
申请日：2009-03-30
申请人： Ashay Chitnis , John Edmond , Jeffrey Carl Britt , Bernd P. Keller , David Todd Emerson , Michael John Bergmann , Jasper S. Cabalu
发明人： Ashay Chitnis , John Edmond , Jeffrey Carl Britt , Bernd P. Keller , David Todd Emerson , Michael John Bergmann , Jasper S. Cabalu
IPC分类号： H01L21/66 , H01L33/00 , H01L33/50
CPC分类号： H01L33/508 , H01L33/0095 , H01L2224/13 , H01L2933/0041 , Y10T408/47
摘要： A method for fabricating light emitting diode (LED) chips comprising providing a plurality of LEDs, typically on a wafer, and coating the LEDs with a conversion material so that at least some light from the LEDs passes through the conversion material and is converted. The light emission from the LED chips comprises light from the conversion material, typically in combination with LED light. The emission characteristics of at least some of the LED chips is measured and at least some of the conversion material over the LEDs is removed to alter the emission characteristics of the LED chips. The invention is particularly applicable to fabricating LED chips on a wafer where the LED chips have light emission characteristics that are within a range of target emission characteristics. This target range can fall within an emission region on a CIE curve to reduce the need for binning of the LEDs from the wafer. The emission characteristics of the LED chips in the wafer can be tuned to the desired range by micro-machining the conversion material over the LEDs.
摘要翻译：一种用于制造发光二极管（LED）芯片的方法，包括通常在晶片上提供多个LED，并用转换材料涂覆LED，使得来自LED的至少一些光通过转换材料并被转换。来自LED芯片的光发射包括来自转换材料的光，通常与LED光结合。测量至少一些LED芯片的发射特性，并且除去LED上的至少一些转换材料以改变LED芯片的发射特性。本发明特别适用于在晶片上制造LED芯片，其中LED芯片具有在目标发射特性范围内的发光特性。该目标范围可以落在CIE曲线上的发射区域内，以减少对来自晶片的LED进行合并的需要。晶片上的LED芯片的发射特性可以通过在LED上微转换材料来调节到期望的范围。

6. 发明申请

US20090179207A1 Flip-chip phosphor coating method and devices fabricated utilizing method 有权
标题翻译：倒装芯片荧光粉涂布方法和使用方法制造的器件
公开(公告)号：US20090179207A1
公开(公告)日：2009-07-16
申请号：US12008477
申请日：2008-01-11
申请人： Ashay Chitnis , James Ibbetson , Bernd Keller
发明人： Ashay Chitnis , James Ibbetson , Bernd Keller
IPC分类号： H01L33/00
CPC分类号： H01L33/44 , H01L27/15 , H01L33/08 , H01L33/10 , H01L33/502 , H01L33/505 , H01L33/62 , H01L33/64 , H01L2224/13 , H01L2933/0041 , H01L2933/0066
摘要： Methods for fabricating light emitting diode (LED) chips one of which comprises flip-chip mounting a plurality of LEDs on a surface of a submount wafer and forming a coating over said LEDs. The coating comprising a conversion material at least partially covering the LEDs. The coating is planarized to the desired thickness with the coating being continuous and unobstructed on the top surface of the LEDs. The LEDs chips are then singulated from the submount wafer. An LED chip comprising a lateral geometry LED having first and second contacts, with the LED flip-chip mounted to a submount by a conductive bonding material. A phosphor loaded binder coats and at least partially covers the LED. The binder provides a substantially continuous and unobstructed coating over the LED. The phosphor within the coating absorbs and converts the wavelength of at least some of the LED light with the coating planarized to achieve the desired emission color point of the LED chip.
摘要翻译：制造发光二极管（LED）芯片的方法，其中之一包括倒装芯片，将多个LED安装在底座晶片的表面上并在所述LED上形成涂层。所述涂层包含至少部分地覆盖所述LED的转化材料。将涂层平坦化到所需的厚度，涂层在LED的顶表面上是连续的并且不受阻碍。然后将LED芯片从底座晶片分离。一种LED芯片，包括具有第一和第二触点的侧向几何形状LED，其中LED倒装芯片通过导电接合材料安装到基座。荧光体负载的粘合剂涂层并且至少部分地覆盖LED。粘合剂在LED上提供基本上连续且无障碍的涂层。涂层内的荧光体吸收并转换至少一些LED光的波长，使涂层平坦化，以达到LED芯片的期望的发射色点。

7. 发明授权

US09634191B2 Wire bond free wafer level LED 有权
公开(公告)号：US09634191B2
公开(公告)日：2017-04-25
申请号：US11985410
申请日：2007-11-14
申请人： Bernd Keller , Ashay Chitnis , Nicholas W. Medendorp, Jr. , James Ibbetson , Max Batres
发明人： Bernd Keller , Ashay Chitnis , Nicholas W. Medendorp, Jr. , James Ibbetson , Max Batres
IPC分类号： H01L33/00 , H01L33/38 , H01L33/58 , H01L33/50 , H01L33/22 , H01L33/48 , H01L33/62 , H01L33/46
CPC分类号： H01L25/0756 , H01L33/08 , H01L33/22 , H01L33/385 , H01L33/46 , H01L33/486 , H01L33/50 , H01L33/505 , H01L33/58 , H01L33/62 , H01L2224/45139 , H01L2224/48091 , H01L2224/49107 , H01L2924/00014 , H01L2924/00 , H01L2224/45099
摘要： A wire-bond free semiconductor device with two electrodes both of which are accessible from the bottom side of the device. The device is fabricated with two electrodes that are electrically connected to the oppositely doped epitaxial layers, each of these electrodes having leads with bottom-side access points. This structure allows the device to be biased with an external voltage/current source, obviating the need for wire-bonds or other such connection mechanisms that must be formed at the packaging level. Thus, features that are traditionally added to the device at the packaging level (e.g., phosphor layers or encapsulants) may be included in the wafer level fabrication process. Additionally, the bottom-side electrodes are thick enough to provide primary structural support to the device, eliminating the need to leave the growth substrate as part of the finished device.

8. 发明授权

US08878219B2 Flip-chip phosphor coating method and devices fabricated utilizing method 有权
标题翻译：倒装芯片荧光粉涂布方法和使用方法制造的器件
公开(公告)号：US08878219B2
公开(公告)日：2014-11-04
申请号：US12008477
申请日：2008-01-11
申请人： Ashay Chitnis , James Ibbetson , Bernd Keller
发明人： Ashay Chitnis , James Ibbetson , Bernd Keller
IPC分类号： H01L33/00 , H01L33/50 , H01L33/64 , H01L33/44
CPC分类号： H01L33/44 , H01L27/15 , H01L33/08 , H01L33/10 , H01L33/502 , H01L33/505 , H01L33/62 , H01L33/64 , H01L2224/13 , H01L2933/0041 , H01L2933/0066
摘要： Methods for fabricating light emitting diode (LED) chips one of which comprises flip-chip mounting a plurality of LEDs on a surface of a submount wafer and forming a coating over said LEDs. The coating comprising a conversion material at least partially covering the LEDs. The coating is planarized to the desired thickness with the coating being continuous and unobstructed on the top surface of the LEDs. The LEDs chips are then singulated from the submount wafer. An LED chip comprising a lateral geometry LED having first and second contacts, with the LED flip-chip mounted to a submount by a conductive bonding material. A phosphor loaded binder coats and at least partially covers the LED. The binder provides a substantially continuous and unobstructed coating over the LED. The phosphor within the coating absorbs and converts the wavelength of at least some of the LED light with the coating planarized to achieve the desired emission color point of the LED chip.
摘要翻译：制造发光二极管（LED）芯片的方法，其中之一包括倒装芯片，将多个LED安装在底座晶片的表面上并在所述LED上形成涂层。所述涂层包含至少部分地覆盖所述LED的转化材料。将涂层平坦化到所需的厚度，涂层在LED的顶表面上是连续的并且不受阻碍。然后将LED芯片从底座晶片分离。一种LED芯片，包括具有第一和第二触点的侧向几何形状LED，其中LED倒装芯片通过导电接合材料安装到基座。荧光体负载的粘合剂涂层并且至少部分地覆盖LED。粘合剂在LED上提供基本上连续且无障碍的涂层。涂层内的荧光体吸收并转换至少一些LED光的波长，使涂层平坦化，以达到LED芯片的期望的发射色点。

9. 发明申请

US20100224890A1 Light emitting diode chip with electrical insulation element 审中-公开
标题翻译：具有电绝缘元件的发光二极管芯片
公开(公告)号：US20100224890A1
公开(公告)日：2010-09-09
申请号：US11523381
申请日：2006-09-18
申请人： Bernd Keller , Ashay Chitnis , James Ibbetson
发明人： Bernd Keller , Ashay Chitnis , James Ibbetson
IPC分类号： H01L33/64 , H01L33/48 , H01L21/58 , H01L33/02
CPC分类号： H01L33/44 , H01L24/48 , H01L24/49 , H01L33/0075 , H01L2224/48091 , H01L2224/48111 , H01L2224/49107 , H01L2924/00014 , H01L2924/01322 , H01L2924/10253 , H01L2924/10272 , H01L2924/10336 , H01L2924/10349 , H01L2924/12041 , H01L2924/19041 , H01L2224/45099 , H01L2924/00
摘要： A light emitting diode chip comprising a light emitting diode and a thermally conductive substrate. The light emitting diode is on the substrate with the substrate providing a thermal path from the light emitting diode through the substrate. A mounting pad is also on a substrate and an electrically insulating layer is integral to the substrate. The insulating layer electrically insulates the mounting pad from the light emitting diode. A method for fabricating a light emitting diode chip comprises providing a thermally conductive substrate, forming an electrical insulating layer integral to the substrate and forming a mounting pad on the substrate. A light emitting diode is fabricated and mounted to the substrate, with the light emitting diode electrically insulated from the mounting pad by the electrically insulating layer.
摘要翻译：一种包括发光二极管和导热基板的发光二极管芯片。发光二极管在衬底上，衬底提供从发光二极管通过衬底的热路径。安装衬垫也在衬底上，并且电绝缘层与衬底成一体。绝缘层将安装垫与发光二极管电绝缘。一种用于制造发光二极管芯片的方法，包括提供导热基板，形成与基板成一体的电绝缘层，并在基板上形成安装焊盘。制造发光二极管并将其安装到基板上，其中发光二极管通过电绝缘层与安装焊盘电绝缘。

10. 发明申请

US20090121241A1 Wire bond free wafer level LED 有权
标题翻译：无接线晶圆级LED
公开(公告)号：US20090121241A1
公开(公告)日：2009-05-14
申请号：US11985410
申请日：2007-11-14
申请人： Bernd Keller , Ashay Chitnis , Nicholas W. Medendorp, JR. , James Ibbetson , Max Batres
发明人： Bernd Keller , Ashay Chitnis , Nicholas W. Medendorp, JR. , James Ibbetson , Max Batres
IPC分类号： H01L33/00
CPC分类号： H01L25/0756 , H01L33/08 , H01L33/22 , H01L33/385 , H01L33/46 , H01L33/486 , H01L33/50 , H01L33/505 , H01L33/58 , H01L33/62 , H01L2224/45139 , H01L2224/48091 , H01L2224/49107 , H01L2924/00014 , H01L2924/00 , H01L2224/45099
摘要： A wire-bond free semiconductor device with two electrodes both of which are accessible from the bottom side of the device. The device is fabricated with two electrodes that are electrically connected to the oppositely doped epitaxial layers, each of these electrodes having leads with bottom-side access points. This structure allows the device to be biased with an external voltage/current source, obviating the need for wire-bonds or other such connection mechanisms that must be formed at the packaging level. Thus, features that are traditionally added to the device at the packaging level (e.g., phosphor layers or encapsulants) may be included in the wafer level fabrication process. Additionally, the bottom-side electrodes are thick enough to provide primary structural support to the device, eliminating the need to leave the growth substrate as part of the finished device.
摘要翻译：具有两个电极的无引线键合半导体器件，两者均可从器件的底部接近。该器件由与相对掺杂的外延层电连接的两个电极制成，这些电极中的每一个具有具有底侧接入点的引线。这种结构允许器件被外部电压/电流源偏置，避免了在封装级别必须形成的引线接合或其他这样的连接机构的需要。因此，传统上在包装级别添加到设备的特征（例如，磷光体层或密封剂）可以包括在晶片级制造工艺中。此外，底侧电极足够厚以为器件提供主要的结构支撑，从而不需要将生长衬底作为成品器件的一部分。

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