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1. 发明申请

US20110102443A1 Virtualized GPU in a Virtual Machine Environment 审中-公开
标题翻译：虚拟化GPU在虚拟机环境中
公开(公告)号：US20110102443A1
公开(公告)日：2011-05-05
申请号：US12631662
申请日：2009-12-04
申请人： Asael Dror , Hao Zhang , B. Anil Kumar , Stuart Ray Patrick , Neal D. Margulis , Lin Tan , Pandele Stanescu , Martin Amon , Miriam Barbara Sedman
发明人： Asael Dror , Hao Zhang , B. Anil Kumar , Stuart Ray Patrick , Neal D. Margulis , Lin Tan , Pandele Stanescu , Martin Amon , Miriam Barbara Sedman
IPC分类号： G06T1/00
CPC分类号： G06T1/20 , G06F9/45558 , G06F2009/45579
摘要： Methods and systems are disclosed for virtualizing a graphics accelerator such as a GPU. In one embodiment, a GPU can be paravirtualized. Rather than modeling a complete hardware GPU, paravirtualization may provide for an abstracted software-only GPU that presents a software interface different from that of the underlying hardware. By providing a paravirtualized GPU, a virtual machine may enable a rich user experience with, for example, accelerated 3D rendering and multimedia, without the need for the virtual machine to be associated with a particular GPU product.
摘要翻译：公开了用于虚拟化诸如GPU的图形加速器的方法和系统。在一个实施例中，GPU可以是半虚拟化的。而不是对完整的硬件GPU进行建模，半虚拟化可以提供一个抽象的仅软件GPU，其提供与底层硬件不同的软件接口。通过提供半虚拟化GPU，虚拟机可以通过例如加速3D渲染和多媒体来实现丰富的用户体验，而不需要虚拟机与特定GPU产品相关联。

2. 发明授权

US08941671B2 Para-virtualized domain, hull, and geometry shaders 有权
标题翻译： Para虚拟化域，船体和几何着色器
公开(公告)号：US08941671B2
公开(公告)日：2015-01-27
申请号：US13350246
申请日：2012-01-13
申请人： Meher Prasad Malakapalli , Hao Zhang , Lin Tan , Meetesh Barua , Pandele Stanescu , B. Anil Kumar , Eric K. Han , Artem Belkine , Jeroen Dirk Meijer , Winston Matthew Penfold Johnston
发明人： Meher Prasad Malakapalli , Hao Zhang , Lin Tan , Meetesh Barua , Pandele Stanescu , B. Anil Kumar , Eric K. Han , Artem Belkine , Jeroen Dirk Meijer , Winston Matthew Penfold Johnston
IPC分类号： G06T1/20 , G06F15/16
CPC分类号： G06T15/005 , G06F9/45558 , G06F2009/45579
摘要： The present invention extends to methods, systems, and computer program products for providing domain, hull, and geometry shaders in a para-virtualized environment. As such, a guest application executing in a child partition is enabled use a programmable GPU pipeline of a physical GPU. A vGPU (executing in the child partition) is presented to the guest application. The vGPU exposes DDIs of a rendering framework. The DDIs enable the guest application to send graphics commands to the vGPU, including commands for utilizing a domain shader, a hull shader, and/or a geometric shader at a physical GPU. A render component (executing within the root partition) receives physical GPU-specific commands from the vGPU, including commands for using the domain shader, the hull shader, and/or the geometric shader. The render component schedules the physical GPU-specific command(s) for execution at the physical GPU.
摘要翻译：本发明扩展到在对虚拟化环境中提供域，船体和几何着色器的方法，系统和计算机程序产品。因此，能够在子分区中执行的访客应用程序使用物理GPU的可编程GPU流水线。 vGPU（在子分区中执行）被呈现给客户应用程序。 vGPU暴露了渲染框架的DDI。 DDI使宾客应用程序能够向vGPU发送图形命令，包括在物理GPU上使用域着色器，船体着色器和/或几何着色器的命令。渲染组件（在根分区内执行）从vGPU接收特定于GPU的特定命令，包括使用域着色器，船体着色器和/或几何着色器的命令。渲染组件调度物理GPU特定命令以在物理GPU上执行。

3. 发明申请

US20130181999A1 PARA-VIRTUALIZED DOMAIN, HULL, AND GEOMETRY SHADERS 有权
标题翻译：域名虚拟域，HULL和几何阴影
公开(公告)号：US20130181999A1
公开(公告)日：2013-07-18
申请号：US13350246
申请日：2012-01-13
申请人： Meher Prasad Malakapalli , Hao Zhang , Lin Tan , Meetesh Barua , Pandele Stanescu , B. Anil Kumar , Eric K. Han , Artem Belkine , Jeroen Dirk Meijer , Winston Matthew Penfold Johnston
发明人： Meher Prasad Malakapalli , Hao Zhang , Lin Tan , Meetesh Barua , Pandele Stanescu , B. Anil Kumar , Eric K. Han , Artem Belkine , Jeroen Dirk Meijer , Winston Matthew Penfold Johnston
IPC分类号： G06T1/20
CPC分类号： G06T15/005 , G06F9/45558 , G06F2009/45579
摘要： The present invention extends to methods, systems, and computer program products for providing domain, hull, and geometry shaders in a para-virtualized environment. As such, a guest application executing in a child partition is enabled use a programmable GPU pipeline of a physical GPU. A vGPU (executing in the child partition) is presented to the guest application. The vGPU exposes DDIs of a rendering framework. The DDIs enable the guest application to send graphics commands to the vGPU, including commands for utilizing a domain shader, a hull shader, and/or a geometric shader at a physical GPU. A render component (executing within the root partition) receives physical GPU-specific commands from the vGPU, including commands for using the domain shader, the hull shader, and/or the geometric shader. The render component schedules the physical GPU-specific command(s) for execution at the physical GPU.
摘要翻译：本发明扩展到在对虚拟化环境中提供域，船体和几何着色器的方法，系统和计算机程序产品。因此，能够在子分区中执行的访客应用程序使用物理GPU的可编程GPU流水线。 vGPU（在子分区中执行）被呈现给客户应用程序。 vGPU暴露了渲染框架的DDI。 DDI使宾客应用程序能够向vGPU发送图形命令，包括在物理GPU上使用域着色器，船体着色器和/或几何着色器的命令。渲染组件（在根分区内执行）从vGPU接收特定于GPU的特定命令，包括使用域着色器，船体着色器和/或几何着色器的命令。渲染组件调度物理GPU特定命令以在物理GPU上执行。

4. 发明授权

US08941670B2 Para-virtualized high-performance computing and GDI acceleration 有权
标题翻译： Para虚拟化的高性能计算和GDI加速
公开(公告)号：US08941670B2
公开(公告)日：2015-01-27
申请号：US13352121
申请日：2012-01-17
申请人： Meher Prasad Malakapalli , Hao Zhang , Lin Tan
发明人： Meher Prasad Malakapalli , Hao Zhang , Lin Tan
IPC分类号： G06F15/16 , G06T1/20
CPC分类号： G06T15/005 , G06F9/4555 , G06F9/45558 , G06F2009/45579
摘要： The present invention extends to methods, systems, and computer program products for para-virtualized GPGPU computation and GDI acceleration. Some embodiments provide a compute shader to a guest application within a para-virtualized environment. A vGPU in a child partition presents compute shader DDIs for performing GPGPU computations to a guest application. A render component in a root partition receives compute shader commands from the vGPU and schedules the commands for execution at the physical GPU. Other embodiments provide GPU-accelerated GDI rendering capabilities to a guest application within a para-virtualized environment. A vGPU in a child partition provides an API for receiving GDI commands, and sends GDI commands and data to a render component in a root partition. The render component schedules the GDI commands on a 3D rendering device. The 3D rendering device executes the GDI commands at the physical GPU using a sharable GDI surface.
摘要翻译：本发明扩展到用于对虚拟GPGPU计算和GDI加速的方法，系统和计算机程序产品。一些实施例在对虚拟化环境内为访客应用提供计算着色器。子分区中的vGPU显示用于对客户机应用程序执行GPGPU计算的计算着色器DDI。根分区中的渲染组件从vGPU接收计算着色器命令，并调度命令以在物理GPU上执行。其他实施例在对虚拟化环境内为访客应用提供GPU加速的GDI呈现能力。子分区中的vGPU提供用于接收GDI命令的API，并将GDI命令和数据发送到根分区中的渲染组件。渲染组件在3D渲染设备上调度GDI命令。 3D渲染设备使用可共享的GDI表面在物理GPU上执行GDI命令。

5. 发明申请

US20130181998A1 PARA-VIRTUALIZED HIGH-PERFORMANCE COMPUTING AND GDI ACCELERATION 有权
标题翻译： PARA虚拟化高性能计算和GDI加速
公开(公告)号：US20130181998A1
公开(公告)日：2013-07-18
申请号：US13352121
申请日：2012-01-17
申请人： Meher Prasad Malakapalli , Hao Zhang , Lin Tan
发明人： Meher Prasad Malakapalli , Hao Zhang , Lin Tan
IPC分类号： G06T1/20
CPC分类号： G06T15/005 , G06F9/4555 , G06F9/45558 , G06F2009/45579
摘要： The present invention extends to methods, systems, and computer program products for para-virtualized GPGPU computation and GDI acceleration. Some embodiments provide a compute shader to a guest application within a para-virtualized environment. A vGPU in a child partition presents compute shader DDIs for performing GPGPU computations to a guest application. A render component in a root partition receives compute shader commands from the vGPU and schedules the commands for execution at the physical GPU. Other embodiments provide GPU-accelerated GDI rendering capabilities to a guest application within a para-virtualized environment. A vGPU in a child partition provides an API for receiving GDI commands, and sends GDI commands and data to a render component in a root partition. The render component schedules the GDI commands on a 3D rendering device. The 3D rendering device executes the GDI commands at the physical GPU using a sharable GDI surface.
摘要翻译：本发明扩展到用于对虚拟GPGPU计算和GDI加速的方法，系统和计算机程序产品。一些实施例在对虚拟化环境内为访客应用提供计算着色器。子分区中的vGPU显示用于对客户机应用程序执行GPGPU计算的计算着色器DDI。根分区中的渲染组件从vGPU接收计算着色器命令，并调度命令以在物理GPU上执行。其他实施例在对虚拟化环境内为访客应用提供GPU加速的GDI呈现能力。子分区中的vGPU提供用于接收GDI命令的API，并将GDI命令和数据发送到根分区中的渲染组件。渲染组件在3D渲染设备上调度GDI命令。 3D渲染设备使用可共享的GDI表面在物理GPU上执行GDI命令。

6. 发明授权

US09105647B2 Method of forming perforated opening in bottom substrate of flipchip pop assembly to reduce bleeding of underfill material 有权
标题翻译：在倒装芯片流行组件的底部基底中形成穿孔开口以减少底部填充材料渗出的方法
公开(公告)号：US09105647B2
公开(公告)日：2015-08-11
申请号：US12781754
申请日：2010-05-17
申请人： Junwei Hu , JaeHak Yee , Lin Tan , Wenbin Qu , YuFeng Feng
发明人： Junwei Hu , JaeHak Yee , Lin Tan , Wenbin Qu , YuFeng Feng
IPC分类号： H01L21/00 , H01L21/56 , H01L25/065 , H01L25/10 , H01L25/00 , H01L23/02 , H01L23/34 , H01L23/28 , H01L23/13 , H01L23/31 , H01L23/498 , H01L23/00
CPC分类号： H01L21/563 , H01L23/13 , H01L23/3128 , H01L23/49827 , H01L24/16 , H01L24/30 , H01L24/33 , H01L24/48 , H01L24/73 , H01L24/81 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/29007 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/92247 , H01L2225/0651 , H01L2225/06562 , H01L2225/1023 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/12041 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1433 , H01L2924/15151 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00 , H01L2924/00012 , H01L2224/81805 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device has a flipchip semiconductor die mounted to a first substrate using a plurality of first bumps. An opening or plurality of openings is formed in the first substrate in a location central to placement of the flipchip semiconductor die to the first substrate. A plurality of semiconductor die is mounted to a second substrate. The semiconductor die are electrically connected with bond wires. An encapsulant is over the plurality of semiconductor die and second substrate. The second substrate is mounted to the first substrate with a plurality of second bumps. An underfill material is dispensed through the opening in the first substrate between the flipchip semiconductor die and first substrate. The dispensing of the underfill material is discontinued as the underfill material approaches or reaches a perimeter of the flipchip semiconductor die to reduce bleeding of the underfill material. The underfill material is cured.
摘要翻译：半导体器件具有使用多个第一凸块安装到第一基板的倒装芯片半导体管芯。在第一基板中形成开口或多个开口，其中心位置是将倒装芯片半导体管芯放置到第一基板。多个半导体管芯安装到第二基板。半导体管芯与接合线电连接。密封剂在多个半导体管芯和第二衬底之上。第二基板用多个第二凸块安装到第一基板。通过第一衬底中的开口在倒装芯片半导体管芯和第一衬底之间分配底部填充材料。底部填充材料的分配由于底部填充材料接近或到达倒装芯片半导体管芯的周边而停止，以减少底部填充材料的渗出。底部填充材料固化。

7. 发明申请

US20120197146A1 METHODS, SYSTEMS, AND MONITORING DEVICES FOR MANAGING HEMODYNAMIC PARAMETERS 审中-公开
标题翻译：用于管理血液动力学参数的方法，系统和监测装置
公开(公告)号：US20120197146A1
公开(公告)日：2012-08-02
申请号：US13326056
申请日：2011-12-14
申请人： Lin Tan , Qiang Li , Qinglin Tao
发明人： Lin Tan , Qiang Li , Qinglin Tao
IPC分类号： A61B5/02
CPC分类号： A61B5/02028 , A61B5/742 , A61B5/7445
摘要： Methods, systems, and monitoring devices for managing hemodynamic parameters are disclosed.
摘要翻译：公开了用于管理血液动力学参数的方法，系统和监测装置。

8. 发明申请

US20100192194A1 EXTRACTION OF CODE LEVEL SECURITY SPECIFICATION 有权
标题翻译：提取代码级安全规范
公开(公告)号：US20100192194A1
公开(公告)日：2010-07-29
申请号：US12358580
申请日：2009-01-23
申请人： Lin Tan , Xiaolan Zhang , Yuanyuan Zhou
发明人： Lin Tan , Xiaolan Zhang , Yuanyuan Zhou
IPC分类号： G06F21/00
CPC分类号： G06F21/6218
摘要： A method comprising, receiving a source code, identifying a data structure access in the source code, determining whether the data structure access is associated with a security check function, defining the data structure access as a security sensitive operation responsive to determining that the data structure access is associated with the security check function, and defining a security specification to include the security check function and the security sensitive operation.
摘要翻译：一种方法，包括：接收源代码，识别源代码中的数据结构访问，确定数据结构访问是否与安全检查功能相关联，将数据结构访问定义为响应于确定数据结构的安全敏感操作访问与安全检查功能相关联，并且定义安全规范以包括安全检查功能和安全敏感操作。

9. 发明申请

US20090070054A1 WAVEFORM ANALYZING METHOD AND APPARATUS FOR PHYSIOLOGICAL PARAMETERS 有权
标题翻译：波形分析方法和生理参数设备
公开(公告)号：US20090070054A1
公开(公告)日：2009-03-12
申请号：US11965630
申请日：2007-12-27
申请人： Lingbo Zeng , Dazhi Teng , Saixin Zhou , Lin Tan , Qi Wang
发明人： Lingbo Zeng , Dazhi Teng , Saixin Zhou , Lin Tan , Qi Wang
IPC分类号： G06F19/00
CPC分类号： A61B5/7275 , A61B5/024 , A61B5/044 , A61B5/145 , A61B5/743 , A61B5/7435 , G06F19/00 , G16H40/63
摘要： A method and an apparatus are provided for performing waveform analysis on physiological parameters. In one embodiment, a method includes reading measurement values of a first physiological parameter relating to time, and displaying them as a trend display graph in a trend display area that includes first coordinates representing time and second coordinates representing the measurement values. The method also includes acquiring a time selected in the trend display graph, and displaying, in a waveform display area, waveform data of a second physiological parameter associated with formation of the first physiological parameter during periods before and after the selected time. The waveform display area includes time coordinates. The disclosed embodiments allow medical staff to view the curve of a patient's physiological parameters throughout a monitoring/therapy period. Medical staff may make a detailed analysis of the waveform data in real time, which may provide a basis for making decisions in the following therapy processes.
摘要翻译：提供了一种用于对生理参数进行波形分析的方法和装置。在一个实施例中，一种方法包括读取与时间相关的第一生理参数的测量值，并且在趋势显示区域中显示它们作为趋势显示图，其包括表示表示测量值的时间和第二坐标的第一坐标。该方法还包括获取在趋势显示图中选择的时间，并且在波形显示区域中，在所选择的时间之前和之后的周期期间，显示与形成第一生理参数相关联的第二生理参数的波形数据。波形显示区域包括时间坐标。所公开的实施例允许医务人员在整个监测/治疗期间观察患者生理参数的曲线。医务人员可以实时对波形数据进行详细分析，为以后治疗过程中的决策提供依据。

10. 发明申请

US20110278712A1 Semiconductor Device and Method of Forming Perforated Opening in Bottom Substrate of Flipchip POP Assembly to Reduce Bleeding of Underfill Material 有权
标题翻译：半导体装置及倒装芯片POP组件下底板穿孔的方法，以减少底层填充材料的渗出
公开(公告)号：US20110278712A1
公开(公告)日：2011-11-17
申请号：US12781754
申请日：2010-05-17
申请人： Junwei Hu , JaeHak Yee , Lin Tan , Wenbin Qu , YuFeng Feng
发明人： Junwei Hu , JaeHak Yee , Lin Tan , Wenbin Qu , YuFeng Feng
IPC分类号： H01L23/52 , H01L21/60
CPC分类号： H01L21/563 , H01L23/13 , H01L23/3128 , H01L23/49827 , H01L24/16 , H01L24/30 , H01L24/33 , H01L24/48 , H01L24/73 , H01L24/81 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/29007 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/92247 , H01L2225/0651 , H01L2225/06562 , H01L2225/1023 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/12041 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1433 , H01L2924/15151 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00 , H01L2924/00012 , H01L2224/81805 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device has a flipchip semiconductor die mounted to a first substrate using a plurality of first bumps. An opening or plurality of openings is formed in the first substrate in a location central to placement of the flipchip semiconductor die to the first substrate. A plurality of semiconductor die is mounted to a second substrate. The semiconductor die are electrically connected with bond wires. An encapsulant is over the plurality of semiconductor die and second substrate. The second substrate is mounted to the first substrate with a plurality of second bumps. An underfill material is dispensed through the opening in the first substrate between the flipchip semiconductor die and first substrate. The dispensing of the underfill material is discontinued as the underfill material approaches or reaches a perimeter of the flipchip semiconductor die to reduce bleeding of the underfill material. The underfill material is cured.
摘要翻译：半导体器件具有使用多个第一凸块安装到第一基板的倒装芯片半导体管芯。在第一基板中形成开口或多个开口，其中心位置是将倒装芯片半导体管芯放置到第一基板。多个半导体管芯安装到第二基板。半导体管芯与接合线电连接。密封剂在多个半导体管芯和第二衬底之上。第二基板用多个第二凸块安装到第一基板。通过第一衬底中的开口在倒装芯片半导体管芯和第一衬底之间分配底部填充材料。底部填充材料的分配由于底部填充材料接近或到达倒装芯片半导体管芯的周边而停止，以减少底部填充材料的渗出。底部填充材料固化。

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