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    • 2. 发明授权
    • Device for reconstructing the clock of an NRZ signal, and associated transmission system
    • 用于重构NRZ信号的时钟的装置以及相关联的传输系统
    • US08781046B2
    • 2014-07-15
    • US13123894
    • 2009-10-13
    • François Guillot
    • François Guillot
    • H04L7/00
    • H03L7/091H04L7/0083H04L7/033
    • The invention relates according to a first aspect to a device (1) for reconstructing a clock signal from a baseband serial signal (NRZ-D), comprising: —a pulse generating circuit (2) adapted for generating pulses at each transition, rising or falling, of the baseband serial signal (NRZ-D); —a phase-locked loop (5) comprising a voltage-controlled oscillator (6) which generates an oscillator output signal (VCO-S) and a filter (7) delivering a setpoint signal (VCO-E) to the oscillator (6), the phase-locked loop (5) furthermore comprising a breaker (8) interposed between the oscillator (6) and the filter (7), the switching of which is controlled by the output (Cde-S) of the pulse generating circuit (2), and in that the filter (7) is a low-pass filter, such that: —in the presence of a pulse generated by the pulse generating circuit (2), the breaker (8) is closed and the filter (7) then averages the oscillator output signal (VCO-S) passing through the breaker so as to deliver the setpoint signal (VCO-E) to the oscillator; —in the absence of a pulse generated by the pulse generating circuit (2) the breaker (8) is open and the filter (7) then stores a signal of constant level so as to deliver the setpoint signal (VCO-E) to the oscillator; the device being characterized in that it furthermore comprises a decision flip-flop (9) making it possible to resynchronize the baseband serial signal by copying said signal at each falling edge of the oscillator output signal (VCO-S).
    • 本发明涉及根据第一方面的用于从基带串行信号(NRZ-D)重构时钟信号的装置(1),包括: - 脉冲发生电路(2),适于在每个转变时产生脉冲,上升或 基带串行信号(NRZ-D)的下降; - 包括产生振荡器输出信号(VCO-S)的压控振荡器(6)和向所述振荡器(6)传送设定点信号(VCO-E)的滤波器(7)的锁相环(5) 所述锁相环(5)还包括插在所述振荡器(6)和所述滤波器(7)之间的断路器(8),所述断路器由所述脉冲发生电路的输出(Cde-S) 滤波器(7)是低通滤波器,使得:在由脉冲发生电路(2)产生的脉冲的存在下,断路器(8)闭合,滤波器(7) )然后平均通过断路器的振荡器输出信号(VCO-S),以将设定点信号(VCO-E)传送到振荡器; - 在没有由脉冲发生电路(2)产生的脉冲的情况下,断路器(8)断开,滤波器(7)然后存储恒定电平的信号,以将设定点信号(VCO-E)输送到 振荡器 该装置的特征在于它还包括一个判定触发器(9),使得可以通过在振荡器输出信号(VCO-S)的每个下降沿复制所述信号来重新同步基带串行信号。