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1. 发明授权

US06256617B1 Fuzzy logic electronic processor 失效
标题翻译：模糊逻辑电子处理器
公开(公告)号：US06256617B1
公开(公告)日：2001-07-03
申请号：US08904514
申请日：1997-08-01
申请人： Antonino Cuce' , Enrico Pelos
发明人： Antonino Cuce' , Enrico Pelos
IPC分类号： G06F1518
CPC分类号： G06N7/04 , Y10S706/90
摘要： A processor operating in a fizzy logic's mode and including a fuzzyfication unit receiving a plurality of input variables on its input and being adapted to compute a membership value of such variables in a membership function, a processing unit connected downstream of the fuzzyfication unit to produce a fuzzy set, i.e. the results of fuzzy logic inference operations performed on the plurality of variables, and a defuzzyfication unit operative to translate the inference results into a so-called crisp value. The processor further includes a first memory device connected to the fuzzyfication unit and containing the set of membership functions, a second memory device connected to the defuzzyfication unit and containing the set of crisp value which appear in the THEN part of the fizzy rules, and a further memory device connected to the defuzzyfication unit.
摘要翻译：一种处理器，其操作方式为虚拟逻辑模式，包括：模糊单元，在其输入端接收多个输入变量，并适于计算隶属度函数中的这些变量的隶属度值;连接在模糊单元下游的处理单元，模糊集合，即对多个变量执行的模糊逻辑推理操作的结果，以及可操作以将推论结果转换成所谓的清晰值的解模糊单元。所述处理器还包括连接到所述模糊单元并且包含所述一组隶属函数的第一存储器设备，连接到所述去模糊单元并且包含出现在所述闪烁规则的所述THEN部分中的一组清晰值的第二存储器设备，以及另外的存储器件连接到除颤模块。

2. 发明授权

US06385598B1 Fuzzy processor with architecture for non-fuzzy processing 失效
标题翻译：具有非模糊处理架构的模糊处理器
公开(公告)号：US06385598B1
公开(公告)日：2002-05-07
申请号：US08623617
申请日：1996-03-29
申请人： Biagio Giacalone , Francesco Pappalardo , Enrico Pelos , Vincenzo Catania
发明人： Biagio Giacalone , Francesco Pappalardo , Enrico Pelos , Vincenzo Catania
IPC分类号： G06F1518
CPC分类号： G06N7/04
摘要： A fuzzy processor with an improved architecture. The fuzzy processor includes a fuzzy rule processor, an internal fuzzy instruction memory, an internal knowledge base memory, an arithmetic-logic unit, a control unit that can execute non-fuzzy instructions that are typical of conventional microprocessors, and an internal memory for storing the non-fuzzy instructions. The improved fuzzy processor architecture has an ability to load other knowledge bases and other fuzzy rules from outside the processor concurrently and transparently with respect to instruction processing. The processor can also process both fuzzy instructions and non-fuzzy instructions, can perform conditional and unconditional jumps within a set of fuzzy rules that are being processed, and can conditionally swap the knowledge base or the set of rules that are to be processed.
摘要翻译：具有改进架构的模糊处理器。模糊处理器包括模糊规则处理器，内部模糊指令存储器，内部知识库存储器，算术逻辑单元，可以执行常规微处理器典型的非模糊指令的控制单元和用于存储的内部存储器非模糊指令。改进的模糊处理器架构具有相对于指令处理同时且透明地从处理器外部加载其他知识库和其他模糊规则的能力。处理器还可以处理模糊指令和非模糊指令，可以在正在处理的一组模糊规则内执行条件和无条件跳转，并且可以有条件地交换要处理的知识库或一组规则。

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