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1. 发明申请

US20050195654A1 Electrically word-erasable non-volatile memory device, and biasing method thereof 有权
标题翻译：电可擦除非易失性存储器件及其偏置方法
公开(公告)号：US20050195654A1
公开(公告)日：2005-09-08
申请号：US11067478
申请日：2005-02-25
申请人： Antonino Conte , Mario Micciche , Alberto Di Martino , Alfredo Signorello
发明人： Antonino Conte , Mario Micciche , Alberto Di Martino , Alfredo Signorello
IPC分类号： G11C11/34 , G11C16/16 , G11C16/24 , G11C16/34
CPC分类号： G11C16/24 , G11C16/16 , G11C16/34
摘要： A memory device formed by an array of memory cells extending in rows and columns. The device is formed by a plurality of N-type wells extending parallel to the rows; each N-type well houses a plurality of P-type wells extending in a direction transverse to the rows. A plurality of main bitlines extend along the columns. Each P-type well is associated to a set of local bitlines that extend along the respective P-type well and are coupled to the drain terminals of the cells accommodated in the respective P-type well. Local-bitlines managing circuits are provided for each P-type well and are located between the main bitlines and a respective set of local bitlines for controllably connecting each local bitline to a respective main bitline.
摘要翻译：由存储单元阵列形成的存储器件，其以行和列的形式延伸。该装置由平行于行的多个N型阱形成; 每个N型井容纳沿横向于行的方向延伸的多个P型井。多个主位线沿着列延伸。每个P型阱与沿着相应P型阱延伸的一组本地位线相关联，并且耦合到容纳在相应P型阱中的单元的漏极端子。为每个P型阱提供局部位线管理电路，并且位于主位线之间，并且位于相应的一组本地位线之间，用于可控地将每个本地位线连接到相应的主位线。

2. 发明授权

US07130219B2 Electrically word-erasable non-volatile memory device, and biasing method thereof 有权
标题翻译：电可擦除非易失性存储器件及其偏置方法
公开(公告)号：US07130219B2
公开(公告)日：2006-10-31
申请号：US11067478
申请日：2005-02-25
申请人： Antonino Conte , Mario Micciche′ , Alberto José Di Martino , Alfredo Signorello
发明人： Antonino Conte , Mario Micciche′ , Alberto José Di Martino , Alfredo Signorello
IPC分类号： G11C16/04
CPC分类号： G11C16/24 , G11C16/16 , G11C16/34
摘要： A memory device formed by an array of memory cells extending in rows and columns. The device is formed by a plurality of N-type wells extending parallel to the rows; each N-type well houses a plurality of P-type wells extending in a direction transverse to the rows. A plurality of main bitlines extend along the columns. Each P-type well is associated to a set of local bitlines that extend along the respective P-type well and are coupled to the drain terminals of the cells accommodated in the respective P-type well. Local-bitlines managing circuits are provided for each P-type well and are located between the main bitlines and a respective set of local bitlines for controllably connecting each local bitline to a respective main bitline.
摘要翻译：由存储单元阵列形成的存储器件，其以行和列的形式延伸。该装置由平行于行的多个N型阱形成; 每个N型井容纳沿横向于行的方向延伸的多个P型井。多个主位线沿着列延伸。每个P型阱与沿着相应P型阱延伸的一组本地位线相关联，并且耦合到容纳在相应P型阱中的单元的漏极端子。为每个P型阱提供局部位线管理电路，并且位于主位线之间，并且位于相应的一组本地位线之间，用于可控地将每个本地位线连接到相应的主位线。

3. 发明申请

US20050201169A1 Sensing circuit 有权
标题翻译：感应电路
公开(公告)号：US20050201169A1
公开(公告)日：2005-09-15
申请号：US11061104
申请日：2005-02-18
申请人： Nicolas Demange , Antonino Conte , Salvatore Preciso , Alfredo Signorello
发明人： Nicolas Demange , Antonino Conte , Salvatore Preciso , Alfredo Signorello
IPC分类号： G01N27/00 , G11C7/06 , G11C7/10 , G11C7/14 , G11C16/28
CPC分类号： G11C7/062 , G11C7/14 , G11C16/28
摘要： A sensing circuit (120) for sensing currents, including: a measure circuit branch (132i), having a measure node for receiving an input current (Ic) to be sensed, for converting the input current into a corresponding input voltage (V−); at least one comparison circuit branch (132o), having a comparison node for receiving a comparison current (Igs), for converting the comparison current into a corresponding comparison voltage (V+); and at least one voltage comparator (140) for comparing the input and comparison voltages, and a comparison current generating circuit (N3s, 135; N3s, 135′; N3s, 135″) for generating the comparison current based on a reference current (Ir). The comparison current generating circuit includes at least one voltage generator (135; 135′; 135″). A memory device using the sensing circuit and a method are also provided.
摘要翻译：一种用于感测电流的感测电路（120），包括：测量电路分支（132i），具有用于接收待感测的输入电流（Ic）的测量节点，用于将输入电流转换成对应的输入电压（V- ）; 至少一个比较电路分支（132o），具有用于接收比较电流（Igs）的比较节点，用于将比较电流转换成对应的比较电压（V +）; 以及用于比较输入和比较电压的至少一个电压比较器（140）和用于产生比较电流的比较电流产生电路（N 3 s，135; N 3 s，135'; N 3 s，135“）基于参考电流（Ir）。比较电流产生电路包括至少一个电压发生器（135; 135'; 135“）。还提供了使用感测电路的存储器件和方法。

4. 发明授权

US07170790B2 Sensing circuit 有权
标题翻译：感应电路
公开(公告)号：US07170790B2
公开(公告)日：2007-01-30
申请号：US11061104
申请日：2005-02-18
申请人： Nicolas Demange , Antonino Conte , Salvatore Preciso , Alfredo Signorello
发明人： Nicolas Demange , Antonino Conte , Salvatore Preciso , Alfredo Signorello
IPC分类号： G11C16/06
CPC分类号： G11C7/062 , G11C7/14 , G11C16/28
摘要： A sensing circuit (120) for sensing currents, including: a measure circuit branch (132i), having a measure node for receiving an input current (Ic) to be sensed, for converting the input current into a corresponding input voltage (V−); at least one comparison circuit branch (132o), having a comparison node for receiving a comparison current (Igs), for converting the comparison current into a corresponding comparison voltage (V+); and at least one voltage comparator (140) for comparing the input and comparison voltages, and a comparison current generating circuit (N3s, 135; N3s, 135′; N3s, 135″) for generating the comparison current based on a reference current (Ir). The comparison current generating circuit includes at least one voltage generator (135; 135′; 135″). A memory device using the sensing circuit and a method are also provided.
摘要翻译：一种用于感测电流的感测电路（120），包括：测量电路分支（132i），具有用于接收待感测的输入电流（Ic）的测量节点，用于将输入电流转换成对应的输入电压（V- ）; 至少一个比较电路分支（132o），具有用于接收比较电流（Igs）的比较节点，用于将比较电流转换成对应的比较电压（V +）; 以及用于比较输入和比较电压的至少一个电压比较器（140）和用于产生比较电流的比较电流产生电路（N 3 s，135; N 3 s，135'; N 3 s，135“）基于参考电流（Ir）。比较电流产生电路包括至少一个电压发生器（135; 135'; 135“）。还提供了使用感测电路的存储器件和方法。

5. 发明授权

US06906957B2 Sensing circuitry for reading and verifying the contents of electrically programmable and erasable non-volatile memory cells, useful in low supply-voltage technologies 有权
标题翻译：用于读取和验证电可编程和可擦除非易失性存储器单元的内容的感测电路，可用于低电源电压技术
公开(公告)号：US06906957B2
公开(公告)日：2005-06-14
申请号：US10662151
申请日：2003-09-12
申请人： Antonino Conte , Gianbattista Lo Giudice , Alfredo Signorello
发明人： Antonino Conte , Gianbattista Lo Giudice , Alfredo Signorello
IPC分类号： G11C16/28 , G11C7/00
CPC分类号： G11C16/28
摘要： Sensing circuitry for reading and verifying the contents of electrically programmable and erasable non-volatile memory cells, comprises a sense amplifier having a first sensing circuit portion connected to a cell to be read and provided with an output terminal for connection to a first input terminal of a comparator, and having a second reference circuit portion connected to a reference current generator and provided with an output terminal for connection to a second input terminal of said comparator, characterized in that said first and said second circuit portions comprise a series of first and second transistors, respectively, being connected between a first voltage reference and a second voltage reference and having respective points of interconnection connected to said output terminals of said first and second circuit portions.
摘要翻译：用于读取和验证电可编程和可擦除非易失性存储单元的内容的感测电路包括读出放大器，其具有连接到要读取的单元的第一感测电路部分，并且具有用于连接到第一输入端的第一输入端的输出端比较器，并具有连接到参考电流发生器的第二参考电路部分，并且具有用于连接到所述比较器的第二输入端子的输出端子，其特征在于，所述第一和所述第二电路部分包括一系列第一和第二晶体管分别连接在第一参考电压和第二电压基准之间，并且具有连接到所述第一和第二电路部分的所述输出端子的互连互连点。

6. 发明授权

US08587360B2 Level-shifter circuit using low-voltage transistors 有权
标题翻译：电平移位电路采用低压晶体管
公开(公告)号：US08587360B2
公开(公告)日：2013-11-19
申请号：US13435262
申请日：2012-03-30
申请人： Carmelo Ucciardello , Antonino Conte , Alfredo Signorello
发明人： Carmelo Ucciardello , Antonino Conte , Alfredo Signorello
IPC分类号： H03L5/00
CPC分类号： H03K17/102 , H03K3/356113
摘要： A level-shifter circuit may include a pair of inputs which receive a first and a second low-voltage phase signal having a first voltage dynamic with a first maximum value. The level-shifter circuit may also include a pair of outputs which supply a first high-voltage phase signal and a second high-voltage phase signal, level-shifted with respect to the low-voltage signals and having a second voltage dynamic with a second maximum value, higher than the first maximum value. The level-shifter circuit may further include transfer transistors coupled between one of a first reference terminal and a second reference terminal, which are set at one of a first reference voltage and a second reference voltage, and the first output or second output. Protection elements may be coupled to a respective transfer transistor to protect from overvoltages between at least one of the corresponding conduction terminals and control terminals.
摘要翻译：电平移动器电路可以包括一对输入，其接收具有第一最大值的具有第一电压动态的第一和第二低电压相位信号。电平移位器电路还可以包括一对输出，其提供相对于低电压信号电平移位的第一高电压相位信号和第二高电压相位信号，并且具有第二电压动态的第二高电压相位信号最大值，高于第一个最大值。电平移位器电路还可以包括耦合在第一参考端子和第二参考端子之一中的传输晶体管，其被设置为第一参考电压和第二参考电压之一以及第一输出或第二输出。保护元件可以耦合到相应的传输晶体管，以防止在相应的导电端子和控制端子中的至少一个之间的过电压。

7. 发明授权

US06704233B2 Sensing circuitry for reading and verifying the contents of electrically programmable and erasable non-volatile memory cells, useful in low supply-voltage technologies 有权
标题翻译：用于读取和验证电可编程和可擦除非易失性存储器单元的内容的感测电路，可用于低电源电压技术
公开(公告)号：US06704233B2
公开(公告)日：2004-03-09
申请号：US10171508
申请日：2002-06-12
申请人： Antonino Conte , Gianbattista Lo Giudice , Alfredo Signorello
发明人： Antonino Conte , Gianbattista Lo Giudice , Alfredo Signorello
IPC分类号： G11C700
CPC分类号： G11C16/28
摘要： Sensing circuitry for reading and verifying the contents of electrically programmable and erasable non-volatile memory cells including a sense amplifier having a first sensing circuit portion connected to a cell to be read and provided with an output terminal for connection to a first input terminal of a comparator, and having a second reference circuit portion connected to a reference current generator and provided with an output terminal for connection to a second input terminal of said comparator, characterized in that said first and said second circuit portions comprise a series of first and second transistors, respectively, being connected between a first voltage reference and a second voltage reference and having respective points of interconnection connected to said output terminals of said first and second circuit portions.
摘要翻译：用于读取和验证电可编程和可擦除非易失性存储单元的内容的感测电路，包括读出放大器，该读出放大器具有连接到要读取的单元的第一感测电路部分，并且具有用于连接到第一输入端的输出端比较器，并且具有连接到参考电流发生器的第二参考电路部分，并且具有用于连接到所述比较器的第二输入端的输出端，其特征在于，所述第一和所述第二电路部分包括一系列第一和第二晶体管分别连接在第一参考电压和第二电压基准之间，并且具有连接到所述第一和第二电路部分的所述输出端子的互连点。

8. 发明申请

US20110128070A1 CHARGE PUMP STAGE, METHOD FOR CONTROLLING A CHARGE PUMP STAGE AND MEMORY HAVING A CHARGE PUMP STAGE 有权
标题翻译：充电泵阶段，控制充电泵阶段的方法和具有充电泵阶段的存储器
公开(公告)号：US20110128070A1
公开(公告)日：2011-06-02
申请号：US12955809
申请日：2010-11-29
申请人： Santi Nunzio Antonino Pagano , Francesco La Rosa , Alfredo Signorello
发明人： Santi Nunzio Antonino Pagano , Francesco La Rosa , Alfredo Signorello
IPC分类号： G05F1/10
CPC分类号： G11C5/145 , H03K5/1534 , H03K5/2481
摘要： A charge pump having a supply terminal, for receiving a supply voltage, and an output terminal, for supplying an output voltage. The charge pump has a control block including a comparator having a first comparison input, for receiving the supply voltage, a second comparison input, for receiving the output voltage, and a comparison output, for generating a pump-switch-off signal depending upon a comparison between the input voltage and the output voltage; and a switch controlled in switching off by the pump-switch-off signal and configured for switching off the charge pump circuit. The control block has an activation input for receiving an activation signal that has a plurality of pulses and repeatedly activates the comparator-circuit block.
摘要翻译：具有用于接收电源电压的电源端子和用于提供输出电压的输出端子的电荷泵。电荷泵具有控制块，该控制块包括具有用于接收电源电压的第一比较输入的比较器，用于接收输出电压的第二比较输入和用于产生取决于所述输出电压的泵浦关闭信号的比较输出输入电压与输出电压的比较; 以及由泵关断信号切断并被配置为关闭电荷泵电路的开关。控制块具有用于接收具有多个脉冲的激活信号的激活输入并且重复地激活比较器电路块。

9. 发明授权

US08406068B2 Voltage shifter for high voltage operations 有权
标题翻译：电压转换器用于高压操作
公开(公告)号：US08406068B2
公开(公告)日：2013-03-26
申请号：US12884380
申请日：2010-09-17
申请人： Enrico Castaldo , Gianbattista Lo Giudice , Alfredo Signorello
发明人： Enrico Castaldo , Gianbattista Lo Giudice , Alfredo Signorello
IPC分类号： G11C7/00
CPC分类号： H03K3/35613 , H03K19/018528
摘要： A voltage shifter has a supply line receiving a supply voltage that varies between a first operating value in a first operating condition and a second high operating value, in a second operating condition. A latch stage is connected to an output branch and to a selection circuit, which receives a selection signal that controls switching of the latch stage. The latch stage is coupled to the supply line and to a reference potential line, which receives a reference voltage that can vary between a first reference value, when the supply voltage has the first operating value, and a second reference value, higher than the first reference value, when the supply voltage has the second operating value. An uncoupling stage is arranged between the latch stage and the selection circuit and uncouples them in the second operating condition, when the supply voltage and the reference voltage are at their second, high, value.
摘要翻译：电压移位器具有在第二操作状态下接收在第一操作状态下的第一操作值和第二高操作值之间变化的电源电压的电源线。锁存级连接到输出分支和选择电路，选择电路接收控制锁存级的切换的选择信号。锁存级耦合到电源线和参考电位线，该参考电位线接收参考电压，该参考电压可以在电源电压具有第一操作值时在第一参考值和第二参考值之间变化，第二参考值高于第一参考值参考值，当电源电压具有第二个工作值时。当电源电压和参考电压处于其第二，高值时，在锁存级和选择电路之间布置解耦级并且在第二操作条件下使它们断开。

10. 发明授权

US08390366B2 Charge pump stage, method for controlling a charge pump stage and memory having a charge pump stage 有权
标题翻译：电荷泵级，控制电荷泵级的方法和具有电荷泵级的存储器
公开(公告)号：US08390366B2
公开(公告)日：2013-03-05
申请号：US12955809
申请日：2010-11-29
申请人： Santi Nunzio Antonino Pagano , Francesco La Rosa , Alfredo Signorello
发明人： Santi Nunzio Antonino Pagano , Francesco La Rosa , Alfredo Signorello
IPC分类号： G05F1/10
CPC分类号： G11C5/145 , H03K5/1534 , H03K5/2481
摘要： A charge pump having a supply terminal, for receiving a supply voltage, and an output terminal, for supplying an output voltage. The charge pump has a control block including a comparator having a first comparison input, for receiving the supply voltage, a second comparison input, for receiving the output voltage, and a comparison output, for generating a pump-switch-off signal depending upon a comparison between the input voltage and the output voltage; and a switch controlled in switching off by the pump-switch-off signal and configured for switching off the charge pump circuit. The control block has an activation input for receiving an activation signal that has a plurality of pulses and repeatedly activates the comparator-circuit block.
摘要翻译：具有用于接收电源电压的电源端子和用于提供输出电压的输出端子的电荷泵。电荷泵具有控制块，该控制块包括具有用于接收电源电压的第一比较输入的比较器，用于接收输出电压的第二比较输入和用于产生取决于所述输出电压的泵浦关闭信号的比较输出输入电压与输出电压的比较; 以及由泵关断信号切断并被配置为关闭电荷泵电路的开关。控制块具有用于接收具有多个脉冲的激活信号的激活输入并且重复地激活比较器电路块。

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