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    • 7. 发明授权
    • I-shape floating gate for flash memory device and fabricating the same
    • 用于闪存器件的I形浮动栅极和制造它们
    • US08536639B2
    • 2013-09-17
    • US13498585
    • 2011-11-30
    • Yimao CaiSong MeiRu Huang
    • Yimao CaiSong MeiRu Huang
    • H01L29/788H01L21/336H01L21/3205H01L21/4763
    • H01L21/28273
    • The present invention discloses a floating gate structure of a flash memory device and a method for fabricating the same, which relates to a nonvolatile memory in a manufacturing technology of an ultra-large-scaled integrated circuit. In the invention, by modifying a manufacturing of a floating gate in the a standard process for the flash memory, that is, by adding three steps of deposition, two steps of etching and one step of CMP, an -shaped floating gate is formed. In addition to these steps, all the other steps are the same as those of the standard process for the flash memory process. By the invention, a coupling ratio may be improved effectively and a crosstalk between adjacent devices may be lowered, without adding additional photomasks and barely increasing a process complexity, which are very important to improve programming speed and reliability.
    • 本发明公开了一种闪存器件的浮动栅极结构及其制造方法,涉及超大规模集成电路的制造技术中的非易失性存储器。 在本发明中,通过在闪速存储器的标准处理中,即通过添加三个步骤的沉积,两个步骤的蚀刻和CMP的一个步骤来修改浮动栅极的制造,形成一个形状的浮动栅极。 除了这些步骤之外,所有其他步骤与闪存过程的标准过程相同。 通过本发明,可以有效地改善耦合比,并且可以降低相邻器件之间的串扰,而不增加额外的光掩模,并且几乎不增加工艺复杂性,这对于提高编程速度和可靠性非常重要。
    • 8. 发明申请
    • Floating Gate Structure of Flash Memory Device and Method for Fabricating the Same
    • 闪存设备的浮动门结构及其制造方法
    • US20130099300A1
    • 2013-04-25
    • US13498585
    • 2011-11-30
    • Yimao CaiSong MeiRu Huang
    • Yimao CaiSong MeiRu Huang
    • H01L29/788H01L21/283
    • H01L21/28273
    • The present invention discloses a floating gate structure of a flash memory device and a method for fabricating the same, which relates to a nonvolatile memory in a manufacturing technology of an ultra-large-scaled integrated circuit. In the invention, by modifying a manufacturing of a floating gate in the a standard process for the flash memory, that is, by adding three steps of deposition, two steps of etching and one step of CMP, an I-shaped floating gate is formed. In addition to these steps, all the other steps are the same as those of the standard process for the flash memory process. By the invention, a coupling ratio may be improved effectively and a crosstalk between adjacent devices may be lowered, without adding additional photomasks and barely increasing a process complexity, which are very important to improve programming speed and reliability.
    • 本发明公开了一种闪存器件的浮动栅极结构及其制造方法,涉及超大规模集成电路的制造技术中的非易失性存储器。 在本发明中,通过在闪速存储器的标准处理中,即通过添加三个步骤的沉积,两个步骤的蚀刻和CMP的一个步骤来修改浮动栅极的制造,形成I形的浮动栅极 。 除了这些步骤之外,所有其他步骤与闪存过程的标准过程相同。 通过本发明,可以有效地改善耦合比,并且可以降低相邻器件之间的串扰,而不增加额外的光掩模,并且几乎不增加工艺复杂性,这对于提高编程速度和可靠性非常重要。