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1. 发明申请

US20200067467A1 Voltage Buffer for Input Voltages Above a Supply Voltage or Below Ground Voltage 审中-公开
公开(公告)号：US20200067467A1
公开(公告)日：2020-02-27
申请号：US16111679
申请日：2018-08-24
申请人： Allegro MicroSystems, LLC
发明人： Soo-Chang Choe , Craig S. Petrie
IPC分类号： H03F3/16 , H03F3/45 , G01R19/25
摘要： A buffer amplifier comprises a source follower and a feedback amplifier. The feedback amplifier may be configured to control a drain current of the source follower to remain substantially constant independent of a load.

2. 发明授权

US10001519B2 Ground reference fault detection in circuits with multiple ground references 有权
公开(公告)号：US10001519B2
公开(公告)日：2018-06-19
申请号：US14738235
申请日：2015-06-12
申请人： Allegro Microsystems, LLC
发明人： Soo-Chang Choe , Craig Petrie
IPC分类号： G01R31/02 , H02H9/04 , G01R27/18 , G01R31/28
CPC分类号： G01R31/025 , G01R27/18 , G01R31/026 , G01R31/2829 , H02H9/04
摘要： A ground fault detection circuit is configured to detect a ground fault in a circuit or system that has more than one ground reference. In an embodiment, an electronic circuit includes a first circuit coupled to a first ground node. The first ground node is coupled to a first ground reference. The electronic circuit also includes a second circuit coupled to a second ground node. The second ground node is coupled to a second ground reference. The ground fault detection circuit is configured to detect an open circuit between the first ground node and the first ground reference or between the second ground node and the second ground reference by comparing a voltage at the first ground node to a voltage at the second ground reference or comparing a voltage at the second ground node to a voltage at the first ground reference.

3. 发明授权

US09804249B2 Dual-path analog to digital converter 有权
公开(公告)号：US09804249B2
公开(公告)日：2017-10-31
申请号：US14541454
申请日：2014-11-14
申请人： Allegro MicroSystems, LLC
发明人： Craig S. Petrie , Soo-Chang Choe
IPC分类号： H02M1/00 , G01R35/00 , G01D5/14 , G01R33/00 , G01R33/07 , G01R33/09 , H03M1/34 , H03M3/00
CPC分类号： G01R35/005 , G01D5/142 , G01R33/0017 , G01R33/0035 , G01R33/07 , G01R33/09 , H03M1/34 , H03M3/458
摘要： Methods and apparatus for processing a signal comprise at least one circuit configured to generate a measured signal during a measured time period and a reference signal during a reference time period. Also included is at least one dual- or multi-path analog-to-digital converter comprising at least a first processing circuit configured to process the measured signal, at least a second processing circuit configured to process the reference signal, and a third processing circuit configured to process both the measured signal and the reference signal.

4. 发明申请

US20160139229A1 Dual-Path Analog to Digital Converter 有权
标题翻译：双通道模数转换器
公开(公告)号：US20160139229A1
公开(公告)日：2016-05-19
申请号：US14541454
申请日：2014-11-14
申请人： Allegro MicroSystems, LLC
发明人： Craig S. Petrie , Soo-Chang Choe
IPC分类号： G01R35/00 , H03M1/34 , H03M3/00 , G01R33/07 , G01R33/09
CPC分类号： G01R35/005 , G01D5/142 , G01R33/0017 , G01R33/0035 , G01R33/07 , G01R33/09 , H03M1/34 , H03M3/458
摘要： Methods and apparatus for processing a signal comprise at least one circuit configured to generate a measured signal during a measured time period and a reference signal during a reference time period. Also included is at least one dual- or multi-path analog-to-digital converter comprising at least a first processing circuit configured to process the measured signal, at least a second processing circuit configured to process the reference signal, and a third processing circuit configured to process both the measured signal and the reference signal.
摘要翻译：用于处理信号的方法和装置包括被配置为在测量的时间段期间产生测量信号的至少一个电路和参考时间段期间的参考信号。还包括至少一个双路或多路模数转换器，至少包括配置成处理测量信号的第一处理电路，至少配置成处理参考信号的第二处理电路和第三处理电路被配置为处理所测量的信号和参考信号。

5. 发明申请

US20190293694A1 CURRENT FAULT DETECTION SYSTEMS AND METHODS FOR A CURRENT SENSOR 审中-公开
公开(公告)号：US20190293694A1
公开(公告)日：2019-09-26
申请号：US15928689
申请日：2018-03-22
申请人： Allegro MicroSystems, LLC
发明人： Craig S. Petrie , Soo-Chang Choe , Cory Voisine
IPC分类号： G01R19/165 , G01R15/20 , G01R19/25 , G01R19/252
摘要： Systems and methods described herein provide a current sensor having fault detection circuitry configured to detect over-current and/or current faults corresponding to current through a conductor being greater than a predetermined level. The current sensor can include a shared signal path, a main signal path, and a fault detection signal path to perform both fault detection and current detection signal processing. The current sensor can include one or more magnetic field sensing elements configured to generate a magnetic field signal indicative of the current through the conductor, an analog-to-digital converter (ADC) configured to receive the magnetic field signal and convert the magnetic field signal into a digital signal, and a fault detector responsive to the digital signal to generate a fault signal indicative of the current through the conductor being greater than a predetermined level.

6. 发明申请

US20160363620A1 GROUND REFERENCE FAULT DETECTION IN CIRCUITS WITH MULTIPLE GROUND REFERENCES 有权
标题翻译：具有多个地面参考的电路中的接地参考故障检测
公开(公告)号：US20160363620A1
公开(公告)日：2016-12-15
申请号：US14738235
申请日：2015-06-12
申请人： Allegro Microsystems, LLC
发明人： Soo-Chang Choe , Craig Petrie
IPC分类号： G01R31/02 , H02H9/04
CPC分类号： G01R31/025 , G01R27/18 , G01R31/026 , G01R31/2829 , H02H9/04
摘要： A ground fault detection circuit is configured to detect a ground fault in a circuit or system that has more than one ground reference. In an embodiment, an electronic circuit includes a first circuit coupled to a first ground node. The first ground node is coupled to a first ground reference. The electronic circuit also includes a second circuit coupled to a second ground node. The second ground node is coupled to a second ground reference. The ground fault detection circuit is configured to detect an open circuit between the first ground node and the first ground reference or between the second ground node and the second ground reference by comparing a voltage at the first ground node to a voltage at the second ground reference or comparing a voltage at the second ground node to a voltage at the first ground reference.
摘要翻译：接地故障检测电路被配置为检测具有多于一个接地参考的电路或系统中的接地故障。在一个实施例中，电子电路包括耦合到第一接地节点的第一电路。第一接地节点耦合到第一接地参考。电子电路还包括耦合到第二接地节点的第二电路。第二接地节点耦合到第二接地参考。接地故障检测电路被配置为通过将第一接地节点处的电压与第二接地参考点处的电压进行比较来检测第一接地节点和第一接地基准之间或第二接地节点与第二接地参考之间的开路或将第二接地节点处的电压与第一接地参考电压进行比较。

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