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1. 发明申请

US20080077930A1 Workload Partitioning in a Parallel System with Hetergeneous Alignment Constraints 有权
标题翻译：并联系统中的工作负载划分与Hetergene对齐约束
公开(公告)号：US20080077930A1
公开(公告)日：2008-03-27
申请号：US11535172
申请日：2006-09-26
申请人： Alexandre E. Eichenberger , John Kevin Patrick O'Brien , Kathryn M. O'Brien , Tong Chen
发明人： Alexandre E. Eichenberger , John Kevin Patrick O'Brien , Kathryn M. O'Brien , Tong Chen
IPC分类号： G06F9/46
CPC分类号： G06F8/456 , G06F8/452 , G06F9/5066
摘要： A process, compiler, computer program product and system for workload partitioning in a heterogeneous system. The process includes determining heterogeneous alignment constraints in the workload, partitioning a portion of tasks to a processing element sensitive to alignment constraints, and partitioning a remaining portion of tasks to a processing element not sensitive to alignment constraints.
摘要翻译：用于异构系统中工作负载划分的过程，编译器，计算机程序产品和系统。该过程包括确定工作负载中的异质对齐约束，将一部分任务划分为对准约束敏感的处理元素，以及将剩余部分任务划分为对准约束不敏感的处理元素。

2. 发明授权

US08006238B2 Workload partitioning in a parallel system with hetergeneous alignment constraints 有权
标题翻译：具有异构对齐约束的并行系统中的工作负载划分
公开(公告)号：US08006238B2
公开(公告)日：2011-08-23
申请号：US11535172
申请日：2006-09-26
申请人： Alexandre E. Eichenberger , John Kevin Patrick O'Brien , Kathryn M. O'Brien , Tong Chen
发明人： Alexandre E. Eichenberger , John Kevin Patrick O'Brien , Kathryn M. O'Brien , Tong Chen
IPC分类号： G06F9/45 , G06F9/40 , G06F9/46
CPC分类号： G06F8/456 , G06F8/452 , G06F9/5066
摘要： A process, compiler, computer program product and system for workload partitioning in a heterogeneous system. The process includes determining heterogeneous alignment constraints in the workload, partitioning a portion of tasks to a processing element sensitive to alignment constraints, and partitioning a remaining portion of tasks to a processing element not sensitive to alignment constraints.
摘要翻译：用于异构系统中工作负载划分的过程，编译器，计算机程序产品和系统。该过程包括确定工作负载中的异质对齐约束，将一部分任务划分为对准约束敏感的处理元素，以及将剩余部分任务划分为对准约束不敏感的处理元素。

3. 发明授权

US07493452B2 Method to efficiently prefetch and batch compiler-assisted software cache accesses 失效
标题翻译：有效预取和批量编译器辅助软件缓存访问的方法
公开(公告)号：US07493452B2
公开(公告)日：2009-02-17
申请号：US11465522
申请日：2006-08-18
申请人： Alexandre E. Eichenberger , John Kevin Patrick O'Brien , Kathryn M. O'Brien
发明人： Alexandre E. Eichenberger , John Kevin Patrick O'Brien , Kathryn M. O'Brien
IPC分类号： G06F12/00
CPC分类号： G06F12/0862 , G06F12/10 , G06F2212/6028 , G06F2212/6082
摘要： A method to efficiently pre-fetch and batch compiler-assisted software cache accesses is provided. The method reduces the overhead associated with software cache directory accesses. With the method, the local memory address of the cache line that stores the pre-fetched data is itself cached, such as in a register or well known location in local memory, so that a later data access does not need to perform address translation and software cache operations and can instead access the data directly from the software cache using the cached local memory address. This saves processor cycles that would otherwise be required to perform the address translation a second time when the data is to be used. Moreover, the system and method directly enable software cache accesses to be effectively decoupled from address translation in order to increase the overlap between computation and communication.
摘要翻译：提供了一种有效预取和批量编译器辅助的软件高速缓存访问的方法。该方法减少与软件缓存目录访问相关的开销。使用该方法，存储预取数据的高速缓存行的本地存储器地址本身被缓存，例如在本地存储器中的寄存器或公知位置中，使得稍后的数据访问不需要执行地址转换，软件缓存操作，可以使用缓存的本地内存地址直接从软件缓存访问数据。这节省了当使用数据时第二次执行地址转换所需的处理器周期。此外，系统和方法直接使得软件高速缓存访问能够有效地从地址转换中解耦，以增加计算和通信之间的重叠。

4. 发明申请

US20080046657A1 System and Method to Efficiently Prefetch and Batch Compiler-Assisted Software Cache Accesses 失效
标题翻译：有效预取和批量编译器辅助软件缓存访问的系统和方法
公开(公告)号：US20080046657A1
公开(公告)日：2008-02-21
申请号：US11465522
申请日：2006-08-18
申请人： Alexandre E. Eichenberger , John Kevin Patrick O'Brien , Kathryn M. O'Brien
发明人： Alexandre E. Eichenberger , John Kevin Patrick O'Brien , Kathryn M. O'Brien
IPC分类号： G06F12/00
CPC分类号： G06F12/0862 , G06F12/10 , G06F2212/6028 , G06F2212/6082
摘要： A system and method to efficiently pre-fetch and batch compiler-assisted software cache accesses are provided. The system and method reduce the overhead associated with software cache directory accesses. With the system and method, the local memory address of the cache line that stores the pre-fetched data is itself cached, such as in a register or well known location in local memory, so that a later data access does not need to perform address translation and software cache operations and can instead access the data directly from the software cache using the cached local memory address. This saves processor cycles that would otherwise be required to perform the address translation a second time when the data is to be used. Moreover, the system and method directly enable software cache accesses to be effectively decoupled from address translation in order to increase the overlap between computation and communication.
摘要翻译：提供了一种有效预取和批量编译器辅助的软件高速缓存访问的系统和方法。系统和方法减少与软件缓存目录访问相关的开销。使用系统和方法，存储预取数据的高速缓存行的本地存储器地址本身被缓存，例如在本地存储器中的寄存器或公知位置中，使得稍后的数据访问不需要执行地址翻译和软件缓存操作，并且可以使用缓存的本地存储器地址直接从软件缓存访问数据。这节省了当使用数据时第二次执行地址转换所需的处理器周期。此外，系统和方法直接使得软件高速缓存访问能够有效地从地址转换中解耦，以增加计算和通信之间的重叠。

5. 发明授权

US08527974B2 Data transfer optimized software cache for regular memory references 有权
标题翻译：数据传输优化的软件缓存用于常规内存引用
公开(公告)号：US08527974B2
公开(公告)日：2013-09-03
申请号：US12057447
申请日：2008-03-28
申请人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
发明人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
IPC分类号： G06F12/08
CPC分类号： G06F12/0837 , G06F8/4442 , G06F12/0848
摘要： Mechanisms are provided for optimizing regular memory references in computer code. These mechanisms may parse the computer code to identify memory references in the computer code. These mechanisms may further classify the memory references in the computer code as either regular memory references or irregular memory references. Moreover, the mechanisms may transform the computer code, by a compiler, to generate transformed computer code in which regular memory references access a storage of a software cache of a data processing system through a high locality cache mechanism of the software cache.
摘要翻译：提供机制用于优化计算机代码中的常规内存引用。这些机制可能解析计算机代码以识别计算机代码中的内存引用。这些机制可以将计算机代码中的存储器引用进一步分类为常规存储器引用或不规则存储器引用。此外，机制可以通过编译器转换计算机代码，以生成转换的计算机代码，其中常规内存引用通过软件高速缓存的高位置缓存机制访问数据处理系统的软件高速缓存的存储。

6. 发明申请

US20090248985A1 Data Transfer Optimized Software Cache for Regular Memory References 有权
标题翻译：数据传输优化的软件缓存用于常规内存引用
公开(公告)号：US20090248985A1
公开(公告)日：2009-10-01
申请号：US12057447
申请日：2008-03-28
申请人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
发明人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
IPC分类号： G06F12/08
CPC分类号： G06F12/0837 , G06F8/4442 , G06F12/0848
摘要： Mechanisms are provided for optimizing regular memory references in computer code. These mechanisms may parse the computer code to identify memory references in the computer code. These mechanisms may further classify the memory references in the computer code as either regular memory references or irregular memory references. Moreover, the mechanisms may transform the computer code, by a compiler, to generate transformed computer code in which regular memory references access a storage of a software cache of a data processing system through a high locality cache mechanism of the software cache.
摘要翻译：提供机制用于优化计算机代码中的常规内存引用。这些机制可能解析计算机代码以识别计算机代码中的内存引用。这些机制可以将计算机代码中的存储器引用进一步分类为常规存储器引用或不规则存储器引用。此外，机制可以通过编译器转换计算机代码，以生成转换的计算机代码，其中常规内存引用通过软件高速缓存的高位置缓存机制访问数据处理系统的软件高速缓存的存储。

7. 发明申请

US20100088673A1 Optimized Code Generation Targeting a High Locality Software Cache 失效
标题翻译：针对高位置软件缓存的优化代码生成
公开(公告)号：US20100088673A1
公开(公告)日：2010-04-08
申请号：US12246602
申请日：2008-10-07
申请人： Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
发明人： Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
IPC分类号： G06F9/44
CPC分类号： G06F8/4442
摘要： Mechanisms for optimized code generation targeting a high locality software cache are provided. Original computer code is parsed to identify memory references in the original computer code. Memory references are classified as either regular memory references or irregular memory references. Regular memory references are controlled by a high locality cache mechanism. Original computer code is transformed, by a compiler, to generate transformed computer code in which the regular memory references are grouped into one or more memory reference streams, each memory reference stream having a leading memory reference, a trailing memory reference, and one or more middle memory references. Transforming of the original computer code comprises inserting, into the original computer code, instructions to execute initialization, lookup, and cleanup operations associated with the leading memory reference and trailing memory reference in a different manner from initialization, lookup, and cleanup operations for the one or more middle memory references.
摘要翻译：提供了针对高位置软件缓存的优化代码生成机制。解析原始计算机代码以识别原始计算机代码中的内存引用。内存引用被分类为常规内存引用或不规则内存引用。常规内存引用由高位置缓存机制控制。原始计算机代码由编译器转换以生成转换的计算机代码，其中常规存储器引用被分组成一个或多个存储器参考流，每个存储器参考流具有前导存储器引用，尾随存储器引用和一个或多个中间内存引用。原始计算机代码的转换包括将原始计算机代码中的指令以不同于初始化，查找和清除操作的方式与前导存储器引用和尾随存储器引用相关联的执行初始化，查找和清除操作的指令进行插入或更多的中间内存引用。

8. 发明申请

US20090249318A1 Data Transfer Optimized Software Cache for Irregular Memory References 有权
标题翻译：数据传输优化软件缓存用于不规则内存引用
公开(公告)号：US20090249318A1
公开(公告)日：2009-10-01
申请号：US12057456
申请日：2008-03-28
申请人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
发明人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
IPC分类号： G06F9/45 , G06F12/08
CPC分类号： G06F8/4442
摘要： Mechanisms are provided for optimizing irregular memory references in computer code. These mechanisms may parse the computer code to identify memory references in the computer code. These mechanisms may further classify the memory references in the computer code as either regular memory references or irregular memory references. Moreover, the mechanisms may transform the computer code, by a compiler, to generate transformed computer code in which irregular memory references access a storage of a software cache of a data processing system through a transactional cache mechanism of the software cache.
摘要翻译：提供机制用于优化计算机代码中的不规则内存引用。这些机制可能解析计算机代码以识别计算机代码中的内存引用。这些机制可以将计算机代码中的存储器引用进一步分类为常规存储器引用或不规则存储器引用。此外，机制可以通过编译器转换计算机代码，以生成转换的计算机代码，其中不规则存储器引用通过软件高速缓存的事务高速缓存机制访问数据处理系统的软件高速缓存的存储。

9. 发明授权

US08561044B2 Optimized code generation targeting a high locality software cache 失效
标题翻译：针对高位置软件缓存的优化代码生成
公开(公告)号：US08561044B2
公开(公告)日：2013-10-15
申请号：US12246602
申请日：2008-10-07
申请人： Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
发明人： Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
IPC分类号： G06F9/44
CPC分类号： G06F8/4442
摘要： Mechanisms for optimized code generation targeting a high locality software cache are provided. Original computer code is parsed to identify memory references in the original computer code. Memory references are classified as either regular memory references or irregular memory references. Regular memory references are controlled by a high locality cache mechanism. Original computer code is transformed, by a compiler, to generate transformed computer code in which the regular memory references are grouped into one or more memory reference streams, each memory reference stream having a leading memory reference, a trailing memory reference, and one or more middle memory references. Transforming of the original computer code comprises inserting, into the original computer code, instructions to execute initialization, lookup, and cleanup operations associated with the leading memory reference and trailing memory reference in a different manner from initialization, lookup, and cleanup operations for the one or more middle memory references.
摘要翻译：提供了针对高位置软件缓存的优化代码生成机制。解析原始计算机代码以识别原始计算机代码中的内存引用。内存引用被分类为常规内存引用或不规则内存引用。常规内存引用由高位置缓存机制控制。原始计算机代码由编译器转换以生成转换的计算机代码，其中常规存储器引用被分组成一个或多个存储器参考流，每个存储器参考流具有前导存储器引用，尾随存储器引用和一个或多个中间内存引用。原始计算机代码的转换包括将原始计算机代码中的指令以不同于初始化，查找和清除操作的方式与前导存储器引用和尾随存储器引用相关联的执行初始化，查找和清除操作的指令进行插入或更多的中间内存引用。

10. 发明授权

US08561043B2 Data transfer optimized software cache for irregular memory references 有权
标题翻译：数据传输优化的软件缓存用于不规则内存引用
公开(公告)号：US08561043B2
公开(公告)日：2013-10-15
申请号：US12057456
申请日：2008-03-28
申请人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
发明人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
IPC分类号： G06F9/45 , G06F12/08
CPC分类号： G06F8/4442
摘要： Mechanisms are provided for optimizing irregular memory references in computer code. These mechanisms may parse the computer code to identify memory references in the computer code. These mechanisms may further classify the memory references in the computer code as either regular memory references or irregular memory references. Moreover, the mechanisms may transform the computer code, by a compiler, to generate transformed computer code in which irregular memory references access a storage of a software cache of a data processing system through a transactional cache mechanism of the software cache.
摘要翻译：提供机制用于优化计算机代码中的不规则内存引用。这些机制可能解析计算机代码以识别计算机代码中的内存引用。这些机制可以将计算机代码中的存储器引用进一步分类为常规存储器引用或不规则存储器引用。此外，机制可以通过编译器转换计算机代码，以生成转换的计算机代码，其中不规则存储器引用通过软件高速缓存的事务高速缓存机制访问数据处理系统的软件高速缓存的存储。

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