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1. 发明申请

US20080052711A1 HIGHLY COMPONENTIZED SYSTEM ARCHITECTURE WITH LOADABLE VIRTUAL MEMORY MANAGER 失效
标题翻译：具有可负载虚拟内存管理器的高度组合系统架构
公开(公告)号：US20080052711A1
公开(公告)日：2008-02-28
申请号：US11933198
申请日：2007-10-31
申请人： Alessandro Forin , Johannes Helander
发明人： Alessandro Forin , Johannes Helander
IPC分类号： G06F9/46 , G06F12/00
CPC分类号： G06F9/44521 , G06F8/41 , G06F9/4411 , G06F9/4413 , G06Q10/10 , G06Q40/00
摘要： The present invention is directed to a loadable virtual memory manager, and generally to a computer operating system capable of supporting application programs running in a computer having a working memory, the computer operating system including a kernel resident in the working memory at run time, and a loadable virtual memory manager resident at link time outside of the working memory and dynamically loadable into the working memory at run time upon demand of one of the application programs. The kernel includes a loader for loading the virtual memory manager into the working memory in response to a demand from one of the application programs. The computer is able to access a storage memory separate from the working memory, the loadable virtual memory manager residing at link time in the storage memory. The loader loads the virtual memory manager from the storage memory to the working memory. The loadable virtual memory manager is removable from the working memory upon lack of demand therefor by the application programs.
摘要翻译：本发明涉及一种可加载的虚拟存储器管理器，并且通常涉及能够支持在具有工作存储器的计算机中运行的应用程序的计算机操作系统，该计算机操作系统包括在运行时驻留在工作存储器中的内核，以及一个可加载的虚拟存储器管理器驻留在工作存储器之外的链接时间，并且在应用程序之一的需要时在运行时可动态地加载到工作存储器中。内核包括用于响应于来自应用程序之一的需求将虚拟内存管理器加载到工作存储器中的加载器。计算机能够访问与工作存储器分开的存储存储器，即存储在存储器中的链接时驻留的可加载虚拟存储器管理器。加载器将虚拟内存管理器从存储器加载到工作内存。由于应用程序的需求不足，可加载的虚拟内存管理器可从工作内存中移除。

2. 发明申请

US20070256087A1 Efficient linking and loading for late binding and platform retargeting 失效
标题翻译：有效的链接和加载用于晚期绑定和平台重定位
公开(公告)号：US20070256087A1
公开(公告)日：2007-11-01
申请号：US10923355
申请日：2004-08-20
申请人： Alessandro Forin , Johannes Helander
发明人： Alessandro Forin , Johannes Helander
IPC分类号： G06F13/00
CPC分类号： G06F9/44521 , G06F8/41 , G06F9/4411 , G06F9/4413 , G06Q10/10 , G06Q40/00
摘要： A method of producing an executable image from an object file without shared library support from the operating system, wherein the executable image requires a shared library file in order to resolve at least one of the symbols called for in the object file. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing an instruction to make an indirect jump to a location in a shared library through an import section of the file. A method for optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing plural sections with number-filled padding between the end of each section and a succeeding page boundary. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a memory sharable with other executables. This method includes selecting a portion of code in the previously linked file, removing the portion of code from the previously linked file, and constructing a dynamically linked library file containing the portion of the code, the dynamically linked library file being available to plural files including the previously linked file. A method of converting an image which has been previously linked for executing in an unshared memory into an image optimized for use with virtual memory.
摘要翻译：一种从对象文件生成可执行映象的方法，该操作系统没有共享库支持，其中可执行映像需要共享库文件，以便解析目标文件中调用的符号中的至少一个。一种优化将先前链接的文件加载到计算机中的工作存储器中以在工作存储器的单个地址空间中执行的方法，该文件包含通过导入部分间接跳转到共享库中的位置的指令的文件。一种用于优化先前链接的文件加载到计算机中的工作存储器中用于在工作存储器的单个地址空间中执行的方法，该文件包含在每个部分的末尾与后续页面边界之间具有填充填充填充的多个部分。优化将先前链接的文件加载到计算机中的工作存储器中以在与其他可执行文件共享的存储器中执行的方法。该方法包括选择先前链接的文件中的一部分代码，从先前链接的文件中移除部分代码，以及构建包含代码部分的动态链接的库文件，动态链接的库文件可用于多个文件，包括之前链接的文件。将先前链接的用于在非共享存储器中执行的图像转换为优化用于虚拟存储器的图像的方法。

3. 发明授权

US06175900B1 Hierarchical bitmap-based memory manager 失效
标题翻译：层次化的基于位图的内存管理器
公开(公告)号：US06175900B1
公开(公告)日：2001-01-16
申请号：US09023658
申请日：1998-02-09
申请人： Alessandro Forin , Johannes Helander
发明人： Alessandro Forin , Johannes Helander
IPC分类号： G06F1200
CPC分类号： G06F12/023 , Y10S707/99953 , Y10S707/99956
摘要： A hierarchical bitmap-based memory manager maintains a hierarchical bitmap having an entry for each memory block in a memory heap. Each bitmap entry contains a multi-bit value that represents an allocation state of the corresponding memory block. The memory manager manages allocation, deallocation, and reallocation of the memory blocks, and tracks the changes in allocation state via the hierarchical bitmap. Using a two-bit value, the bitmap can represent at most four different allocation states of the corresponding memory block, including a “free” state, a “sub-allocated” state in which the corresponding memory block is itself an allocated set of smaller memory blocks, a “continue” state in which the corresponding memory block is allocated and part of, but not last in, a larger allocation of plural blocks, and a “last” state in which the corresponding memory block is allocated and last in an allocation of one or more memory blocks.
摘要翻译：基于分层位图的存储器管理器维护具有针对存储器堆中的每个存储器块的条目的分层位图。每个位图条目包含表示相应存储器块的分配状态的多位值。存储器管理器管理存储器块的分配，释放和重新分配，并通过分层位图跟踪分配状态的变化。使用两位值，位图可以表示对应的存储器块的至多四个不同的分配状态，包括“空闲”状态，“分配”状态，其中对应的存储器块本身是分配的较小的一组存储块，分配对应的存储器块的“继续”状态，并且分配多个块的较大分配的一部分但不是最后，并且在其中分配相应的存储块并在其中持续最后的“最后”状态分配一个或多个内存块。

4. 发明申请

US20050226406A1 Efficient linking and loading for late binding and platform retargeting 失效
标题翻译：有效的链接和加载用于晚期绑定和平台重定位
公开(公告)号：US20050226406A1
公开(公告)日：2005-10-13
申请号：US11136278
申请日：2005-05-23
申请人： Alessandro Forin , Johannes Helander
发明人： Alessandro Forin , Johannes Helander
IPC分类号： G06F7/00 , G06F17/30 , G06Q40/00
CPC分类号： G06F9/44521 , G06Q10/10 , G06Q40/00
摘要： A method of producing an executable image from an object file without shared library support from the operating system, wherein the executable image requires a shared library file in order to resolve at least one of the symbols called for in the object file. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing an instruction to make an indirect jump to a location in a shared library through an import section of the file. A w method for optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing plural sections with number-filled padding between the end of each section and a succeeding page boundary. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a memory sharable with other executables. This method includes selecting a portion of code in the previously linked file, removing the portion of code from the previously linked file, and constructing a dynamically linked library file containing the portion of the code, the dynamically linked library file being available to plural files including the previously linked file. A method of converting an image which has been previously linked for executing in an unshared memory into an image optimized for use with virtual memory.
摘要翻译：一种从对象文件生成可执行映象的方法，该操作系统没有共享库支持，其中可执行映像需要共享库文件，以便解析目标文件中调用的符号中的至少一个。一种优化将先前链接的文件加载到计算机中的工作存储器中以在工作存储器的单个地址空间中执行的方法，该文件包含通过导入部分间接跳转到共享库中的位置的指令的文件。一种用于优化先前链接的文件加载到计算机中的工作存储器中以在工作存储器的单个地址空间中执行的方法，所述文件包含在每个部分的末尾与后续页面之间具有数字填充填充的多个部分边界。优化将先前链接的文件加载到计算机中的工作存储器中以在与其他可执行文件共享的存储器中执行的方法。该方法包括选择先前链接的文件中的一部分代码，从先前链接的文件中移除部分代码，以及构建包含代码部分的动态链接的库文件，动态链接的库文件可用于多个文件，包括之前链接的文件。将先前链接的用于在非共享存储器中执行的图像转换为优化用于虚拟存储器的图像的方法。

5. 发明授权

US06640290B1 Easily coalesced, sub-allocating, hierarchical, multi-bit bitmap-based memory manager 有权
标题翻译：易于合并，分配，分层，多位位图的内存管理器
公开(公告)号：US06640290B1
公开(公告)日：2003-10-28
申请号：US09724704
申请日：2000-11-28
申请人： Alessandro Forin , Johannes Helander
发明人： Alessandro Forin , Johannes Helander
IPC分类号： G06F1200
CPC分类号： G06F12/023 , Y10S707/99953 , Y10S707/99956
摘要： A hierarchical bitmap-based memory manager maintains a hierarchical bitmap having an entry for each memory block in a memory heap. Each bitmap entry contains a multi-bit value that represents an allocation state of the corresponding memory block. The memory manager manages allocation, deallocation, and reallocation of the memory blocks, and tracks the changes in allocation state via the hierarchical bitmap. Using a-two-bit value, the bitmap can represent at most four different allocation states of the corresponding memory block, including a “free” state, a “sub-allocated” state in which the corresponding memory block is itself an allocated set of smaller memory blocks, a “continue” state in which the corresponding memory block is allocated and part of, but not last in, a larger allocation of plural blocks, and a “last” state in which the corresponding memory block is allocated and last in an allocation of one or more memory blocks.
摘要翻译：基于分层位图的存储器管理器维护具有针对存储器堆中的每个存储器块的条目的分层位图。每个位图条目包含表示相应存储器块的分配状态的多位值。存储器管理器管理存储器块的分配，释放和重新分配，并通过分层位图跟踪分配状态的变化。使用二比特值，位图可以表示对应的存储器块的至多四个不同的分配状态，包括“空闲”状态，“分配”状态，其中对应的存储器块本身是分配的一组更小的存储块，分配对应的存储块并且分配多个块的较大分配的一部分但不是最后的“继续”状态，以及其中对应的存储块被分配并最后存在的“最后”状态一个或多个内存块的分配。

6. 发明申请

US20050223018A1 Efficient linking and loading for late binding and platform retargeting 有权
标题翻译：有效的链接和加载用于晚期绑定和平台重定位
公开(公告)号：US20050223018A1
公开(公告)日：2005-10-06
申请号：US11136246
申请日：2005-05-23
申请人： Alessandro Forin , Johannes Helander
发明人： Alessandro Forin , Johannes Helander
IPC分类号： G06F7/00 , G06F17/30 , G06Q40/00
CPC分类号： G06F9/44521 , G06F8/41 , G06F9/4411 , G06F9/4413 , G06Q10/10 , G06Q40/00
摘要： A method of producing an executable image from an object file without shared library support from the operating system, wherein the executable image requires a shared library file in order to resolve at least one of the symbols called for in the object file. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing an instruction to make an indirect jump to a location in a shared library through an import section of the file. A method for optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing plural sections with number-filled padding between the end of each section and a succeeding page boundary. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a memory sharable with other executables. This method includes selecting a portion of code in the previously linked file, removing the portion of code from the previously linked file, and constructing a dynamically linked library file containing the portion of the code, the dynamically linked library file being available to plural files including the previously linked-file. A method of converting an image which has been previously linked for executing in an unshared memory into an image optimized for use with virtual memory.
摘要翻译：一种从对象文件生成可执行映象的方法，该操作系统没有共享库支持，其中可执行映像需要共享库文件，以便解析目标文件中调用的符号中的至少一个。一种优化将先前链接的文件加载到计算机中的工作存储器中以在工作存储器的单个地址空间中执行的方法，该文件包含通过导入部分间接跳转到共享库中的位置的指令的文件。一种用于优化先前链接的文件加载到计算机中的工作存储器中用于在工作存储器的单个地址空间中执行的方法，该文件包含在每个部分的末尾与后续页面边界之间具有填充填充填充的多个部分。优化将先前链接的文件加载到计算机中的工作存储器中以在与其他可执行文件共享的存储器中执行的方法。该方法包括选择先前链接的文件中的一部分代码，从先前链接的文件中移除部分代码，以及构建包含代码部分的动态链接的库文件，动态链接的库文件可用于多个文件，包括先前链接的文件。将先前链接的用于在非共享存储器中执行的图像转换为优化用于虚拟存储器的图像的方法。

7. 发明申请

US20130179377A1 DECISION TREE COMPUTATION IN HARDWARE 有权
标题翻译：硬件中的决策树计算
公开(公告)号：US20130179377A1
公开(公告)日：2013-07-11
申请号：US13344473
申请日：2012-01-05
申请人： Jason Oberg , Ken Eguro , Victor Tirva , Padma Parthasarathy , Susan Carrie , Alessandro Forin , Jonathan Chow
发明人： Jason Oberg , Ken Eguro , Victor Tirva , Padma Parthasarathy , Susan Carrie , Alessandro Forin , Jonathan Chow
IPC分类号： G06F17/00
CPC分类号： G06K9/00986 , G06K9/6282 , G06N5/04 , G06N99/005
摘要： A computing device for use in decision tree computation is provided. The computing device may include a software program executed by a processor using portions of memory of the computing device, the software program being configured to receive user input from a user input device associated with the computing device, and in response, to perform a decision tree task. The computing device may further include a decision tree computation device implemented in hardware as a logic circuit distinct from the processor, and which is linked to the processor by a communications interface. The decision tree computation device may be configured to receive an instruction to perform a decision tree computation associated with the decision tree task from the software program, process the instruction, and return a result to the software program via the communication interface.
摘要翻译：提供了一种用于决策树计算的计算设备。计算设备可以包括由处理器执行的使用计算设备的存储器的部分的软件程序，该软件程序被配置为从与计算设备相关联的用户输入设备接收用户输入，并且响应于执行决策树任务。计算设备还可以包括在硬件中实现的与处理器不同的逻辑电路并且通过通信接口链接到处理器的决策树计算设备。决策树计算装置可以被配置为从软件程序接收执行与决策树任务相关联的决策树计算的指令，处理指令，并且经由通信接口将结果返回给软件程序。

8. 发明申请

US20130044798A1 Side Channel Communications 审中-公开
标题翻译：侧视频通信
公开(公告)号：US20130044798A1
公开(公告)日：2013-02-21
申请号：US13334054
申请日：2011-12-22
申请人： Kenneth Eguro , Alessandro Forin , Ray A. Bittner, JR. , Ji Sun
发明人： Kenneth Eguro , Alessandro Forin , Ray A. Bittner, JR. , Ji Sun
IPC分类号： H04B17/00
CPC分类号： G06F21/554 , G06F21/86 , G06F2221/2101 , H04L63/1425
摘要： A side channel communications system disclosed herein includes a receiver device with an internal circuitry where the operational speed of the internal circuitry changes in response to an external signal. When the receiver device receives an external signal, the operational speed of the internal circuitry changes. A detector detects the change in the operational speed of the internal circuitry to generate an output value, which is decoded to determine the information communicated by the external signal. In one implementation of the side channel communications system, the external transmitter communicates the external signal in the form of a temperature signal. Alternatively, the external transmitter communicates the external signal in the form of a change in the supply voltage.
摘要翻译：本文公开的侧通道通信系统包括具有内部电路的接收机设备，其中内部电路的操作速度响应于外部信号而改变。当接收机设备接收到外部信号时，内部电路的运行速度发生变化。检测器检测内部电路的操作速度的变化以产生输出值，该输出值被解码以确定由外部信号传送的信息。在侧信道通信系统的一个实施方式中，外部发射机以温度信号的形式来传送外部信号。或者，外部发射机以电源电压变化的形式来传送外部信号。

9. 发明申请

US20130044003A1 Intrusion Detection and Communication 有权
标题翻译：入侵检测与通信
公开(公告)号：US20130044003A1
公开(公告)日：2013-02-21
申请号：US13334057
申请日：2011-12-22
申请人： Kenneth Eguro , Alessandro Forin , Ray A. Bittner, JR. , Ji Sun
发明人： Kenneth Eguro , Alessandro Forin , Ray A. Bittner, JR. , Ji Sun
IPC分类号： G08B21/00 , G01R27/28
CPC分类号： G06F21/554 , G06F21/86 , G06F2221/2101 , H04L63/1425
摘要： An intrusion detection system disclosed herein includes a detector circuit that measures a change in value of impedance of an interconnection circuitry. A decoder coupled to the detector decodes the measured value of the change in the impedance of the interconnection circuitry to determine existence of an abnormal condition. In an example implementation of the intrusion detection system, the change in the value of the impedance of the interconnection circuitry is represented by a change in the phase delay on the interconnection circuitry. An implementation of the intrusion detection circuit terminates communication using the interconnection circuitry upon detection of the abnormal condition. The intrusion detection system is further configured to interpret the abnormal condition as a communication signal to the interconnection circuitry.
摘要翻译：本文公开的入侵检测系统包括检测器电路，其测量互连电路的阻抗值的变化。耦合到检测器的解码器解码互连电路的阻抗的变化的测量值，以确定异常状况的存在。在入侵检测系统的示例实现中，互连电路的阻抗值的变化由互连电路上的相位延迟的变化来表示。入侵检测电路的实现在检测到异常情况时终止使用互连电路的通信。入侵检测系统还被配置为将异常状况解释为互连电路的通信信号。

10. 发明申请

US20090177865A1 Extensible Microcomputer Architecture 有权
标题翻译：可扩展的微机架构
公开(公告)号：US20090177865A1
公开(公告)日：2009-07-09
申请号：US12407016
申请日：2009-03-19
申请人： Richard Neil Pittman , Alessandro Forin , Nathaniel L. Lynch
发明人： Richard Neil Pittman , Alessandro Forin , Nathaniel L. Lynch
IPC分类号： G06F15/76 , G06F9/06
CPC分类号： G06F9/30181 , G06F9/3822 , G06F9/3897 , G06F15/7867 , Y02D10/12 , Y02D10/13
摘要： Described is microprocessor architecture that includes at least one reconfigurable execution path (e.g., implemented via FPGAs or CPLDs). When an instruction is fetched, a mechanism determines whether the reconfigurable execution path (and/or which path) will handle that instruction. A content addressable memory may be used to determine the execution path when fed the instruction's operational code, or an arbiter and multiplexer may resolve conflicts if multiple instruction decode blocks recognize the same instruction. The execution path may be dynamically reconfigured, activated or deactivated as needed, such as to extend an instruction set, to optimize instructions for a particular application program, to implement a peripheral device, to provide parallel computing, and/or based on power consumption and/or processing power needs. Security may be provided by having the reconfigurable execution path loaded from an extension file that is associated with metadata, including security information.
摘要翻译：描述的是包括至少一个可重构执行路径（例如，通过FPGA或CPLD实现）的微处理器架构。当获取指令时，机制确定可重构执行路径（和/或哪个路径）是否将处理该指令。内容可寻址存储器可以用于在馈送指令的操作代码时确定执行路径，或者如果多个指令解码块识别相同的指令，仲裁器和多路复用器可以解决冲突。可以根据需要动态地重新配置，激活或去激活执行路径，例如扩展指令集，优化特定应用程序的指令，实现外围设备，提供并行计算和/或基于功耗和 /或处理电源需求。可以通过使可重新配置的执行路径从与元数据相关联的扩展文件（包括安全信息）加载来提供安全性。

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