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1. 发明申请

US20070170350A1 Microelectronic imagers with optical devices and methods of manufacturing such microelectronic imagers 有权
公开(公告)号：US20070170350A1
公开(公告)日：2007-07-26
申请号：US11727545
申请日：2007-03-27
申请人： Warren Farnworth , Sidney Rigg , William Hiatt , Alan Wood , Peter Benson , James Wark , David Hembree , Kyle Kirby , Charles Watkins , Salman Akram
发明人： Warren Farnworth , Sidney Rigg , William Hiatt , Alan Wood , Peter Benson , James Wark , David Hembree , Kyle Kirby , Charles Watkins , Salman Akram
IPC分类号： H01L27/00
CPC分类号： H01L27/00 , B33Y80/00 , H01L27/14618 , H01L27/14625 , H01L27/14683 , H01L27/14687 , H01L2224/48091 , H01L2224/48227 , H01L2924/01077 , H01L2924/01078 , H01L2924/00014
摘要： Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.

2. 发明申请

US20060243889A1 Microelectronic imagers with optical devices and methods of manufacturing such microelectronic imagers 有权
公开(公告)号：US20060243889A1
公开(公告)日：2006-11-02
申请号：US11476015
申请日：2006-06-28
申请人： Warren Farnworth , Sidney Rigg , William Hiatt , Alan Wood , Peter Benson , James Wark , David Hembree , Kyle Kirby , Charles Watkins , Salman Akram
发明人： Warren Farnworth , Sidney Rigg , William Hiatt , Alan Wood , Peter Benson , James Wark , David Hembree , Kyle Kirby , Charles Watkins , Salman Akram
IPC分类号： H01L27/00
CPC分类号： H01L27/00 , B33Y80/00 , H01L27/14618 , H01L27/14625 , H01L27/14683 , H01L27/14687 , H01L2224/48091 , H01L2224/48227 , H01L2924/01077 , H01L2924/01078 , H01L2924/00014
摘要： Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.

3. 发明申请

US20060035415A1 Frame structure and semiconductor attach process for use therewith for fabrication of image sensor packages and the like, and resulting packages 有权
标题翻译：用于制造图像传感器封装等的框架结构和半导体附着工艺以及所产生的封装
公开(公告)号：US20060035415A1
公开(公告)日：2006-02-16
申请号：US10919604
申请日：2004-08-16
申请人： Alan Wood , Kyle Kirby , Warren Farnworth , Salman Akram
发明人： Alan Wood , Kyle Kirby , Warren Farnworth , Salman Akram
IPC分类号： H01L21/50
CPC分类号： H01L27/14618 , B33Y80/00 , H01L27/14625 , H01L2224/48091 , H01L2924/00014
摘要： A semiconductor package such as an image sensor package, and methods for fabrication. A frame structure includes an array of frames, each having an aperture therethrough, into which an image sensor die in combination with a cover glass, filter, lens or other components may be installed in precise mutual alignment. Singulated image sensor dice and other components may be picked and placed into each frame of the frame structure. Alternatively, the frame structure may be configured to be aligned with and joined to a wafer bearing a plurality of image sensor dice, wherein optional, downwardly protruding skirts along peripheries of the frames may be received into kerfs cut along streets between die locations on the wafer, followed by installation of other package components. In either instance, the frame structure in combination with singulated image sensor dice or a joined wafer is singulated into individual image sensor packages. Various external connection approaches may be used for the packages.
摘要翻译：诸如图像传感器封装的半导体封装以及制造方法。框架结构包括每个具有穿过其中的孔的框架阵列，图像传感器与盖玻片，过滤器，透镜或其它部件组合的模具可以精确相互对准地安装在该框架中。单片图像传感器骰子和其他组件可以被拾取并放置在框架结构的每个帧中。或者，框架结构可以被配置为与承载多个图像传感器骰子的晶片对准并且连接到其上，其中沿着框架的周边的任选的向下突出的裙边可以被接收到沿着晶片上的模具位置之间沿着街道切割的切口，然后安装其他包装组件。在任一情况下，将帧结构与单独的图像传感器芯片或连接的晶片组合成单独的图像传感器封装。各种外部连接方法可用于包装。

4. 发明申请

US20060261340A1 Microelectronic imagers and methods of packaging microelectronic imagers 有权
标题翻译：微电子成像器和包装微电子成像器的方法
公开(公告)号：US20060261340A1
公开(公告)日：2006-11-23
申请号：US11494453
申请日：2006-07-28
申请人： Warren Farnworth , Sidney Rigg , William Hiatt , Kyle Kirby , Peter Benson , James Wark , Alan Wood , David Hembree , Salman Akram , Charles Watkins
发明人： Warren Farnworth , Sidney Rigg , William Hiatt , Kyle Kirby , Peter Benson , James Wark , Alan Wood , David Hembree , Salman Akram , Charles Watkins
IPC分类号： H01L29/04 , H01L33/00 , H01L29/768 , H01L27/148 , H01L31/0203
CPC分类号： H01L27/14618 , H01L23/481 , H01L24/48 , H01L31/0203 , H01L31/02325 , H01L2224/48227 , H01L2924/00014 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/04941 , H01L2924/12042 , H01L2924/14 , H01L2924/15174 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Microelectronic imagers and methods for packaging microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging unit can include a microelectronic die, an image sensor, an integrated circuit electrically coupled to the image sensor, and a bond-pad electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the die and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad with conductive fill material at least partially disposed in the passage. An electrically conductive support member is carried by and projects from the bond-pad. A cover over the image sensor is coupled to the support member.
摘要翻译：本文公开了微电子成像器和用于封装微电子成像器的方法。在一个实施例中，微电子成像单元可以包括微电子管芯，图像传感器，电耦合到图像传感器的集成电路以及电耦合到集成电路的接合焊盘。导电晶片互连延伸穿过管芯并且与焊盘接触。互连可以包括完全延伸穿过基底的通道和具有至少部分地设置在通道中的导电填充材料的接合垫。导电支撑构件由接合垫承载和突出。图像传感器上的盖连接到支撑构件。

5. 发明申请

US20060192230A1 Image sensor packages and frame structure thereof 有权
标题翻译：图像传感器封装及其框架结构
公开(公告)号：US20060192230A1
公开(公告)日：2006-08-31
申请号：US11411265
申请日：2006-04-26
申请人： Alan Wood , Kyle Kirby , Warren Farnworth , Salman Akram
发明人： Alan Wood , Kyle Kirby , Warren Farnworth , Salman Akram
IPC分类号： H01L27/148 , H01L31/0203
CPC分类号： H01L27/14618 , B33Y80/00 , H01L27/14625 , H01L2224/48091 , H01L2924/00014
摘要： A semiconductor package such as an image sensor package. A frame structure includes an array of frames, each having an aperture therethrough, into which an image sensor die in combination with a cover glass, filter, lens or other components may be installed in precise mutual alignment. Singulated image sensor dice and other components may be picked and placed into each frame of the frame structure. Alternatively, the frame structure may be configured to be aligned with and joined to a wafer bearing a plurality of image sensor dice, wherein optional, downwardly protruding skirts along peripheries of the frames may be received into kerfs cut along streets between die locations on the wafer, followed by installation of other package components. In either instance, the frame structure in combination with singulated image sensor dice or a joined wafer is singulated into individual image sensor packages. Various external connection approaches may be used.
摘要翻译：诸如图像传感器封装的半导体封装。框架结构包括每个具有穿过其中的孔的框架阵列，图像传感器与盖玻片，过滤器，透镜或其它部件组合的模具可以精确相互对准地安装在该框架中。单片图像传感器骰子和其他组件可以被拾取并放置在框架结构的每个帧中。或者，框架结构可以被配置为与承载多个图像传感器骰子的晶片对准并且连接到其上，其中沿着框架的周边的任选的向下突出的裙边可以被接收到沿着晶片上的模具位置之间沿着街道切割的切口，然后安装其他包装组件。在任一情况下，将帧结构与单独的图像传感器芯片或连接的晶片组合成单独的图像传感器封装。可以使用各种外部连接方法。

6. 发明申请

US20050275048A1 Microelectronic imagers and methods of packaging microelectronic imagers 有权
标题翻译：微电子成像器和包装微电子成像器的方法
公开(公告)号：US20050275048A1
公开(公告)日：2005-12-15
申请号：US10867352
申请日：2004-06-14
申请人： Warren Farnworth , Sidney Rigg , William Hiatt , Kyle Kirby , Peter Benson , James Wark , Alan Wood , David Hembree , Salman Akram , Charles Watkins
发明人： Warren Farnworth , Sidney Rigg , William Hiatt , Kyle Kirby , Peter Benson , James Wark , Alan Wood , David Hembree , Salman Akram , Charles Watkins
IPC分类号： H01L21/00 , H01L23/02 , H01L23/48 , H01L27/14 , H01L27/146 , H01L31/00 , H01L31/0203 , H01L31/0232
CPC分类号： H01L27/14618 , H01L23/481 , H01L24/48 , H01L31/0203 , H01L31/02325 , H01L2224/48227 , H01L2924/00014 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/04941 , H01L2924/12042 , H01L2924/14 , H01L2924/15174 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Microelectronic imagers and methods for packaging microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging unit can include a microelectronic die, an image sensor, an integrated circuit electrically coupled to the image sensor, and a bond-pad electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the die and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad with conductive fill material at least partially disposed in the passage. An electrically conductive support member is carried by and projects from the bond-pad. A cover over the image sensor is coupled to the support member.
摘要翻译：本文公开了微电子成像器和用于封装微电子成像器的方法。在一个实施例中，微电子成像单元可以包括微电子管芯，图像传感器，电耦合到图像传感器的集成电路以及电耦合到集成电路的接合焊盘。导电晶片互连延伸穿过管芯并且与焊盘接触。互连可以包括完全延伸穿过基底的通道和具有至少部分地设置在通道中的导电填充材料的接合垫。导电支撑构件由接合垫承载和突出。图像传感器上的盖连接到支撑构件。

7. 发明申请

US20110233777A1 THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS 失效
标题翻译：用于光电子和存储器波形的通过波形互连
公开(公告)号：US20110233777A1
公开(公告)日：2011-09-29
申请号：US13154550
申请日：2011-06-07
申请人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
发明人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
IPC分类号： H01L23/498 , H01L23/48
CPC分类号： H01L21/76877 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L24/45 , H01L27/14634 , H01L27/14636 , H01L2221/6834 , H01L2224/02166 , H01L2224/0554 , H01L2224/05567 , H01L2224/05573 , H01L2224/16 , H01L2224/45144 , H01L2224/48463 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
摘要翻译：公开了一种用于成像器，存储器和其他集成电路应用的透晶片互连，从而消除了对引线接合的需要，使得结合这种互连的器件可堆叠并且实现成像器件的晶片级封装。此外，实现了更小且更可靠的管芯封装，并且由于信号路径长度的减小，电路寄生（例如，L和R）被减小。

8. 发明申请

US20070262464A1 METHOD OF FORMING VIAS IN SEMICONDUCTOR SUBSTRATES AND RESULTING STRUCTURES 有权
标题翻译：在半导体衬底和结构结构中形成VIAS的方法
公开(公告)号：US20070262464A1
公开(公告)日：2007-11-15
申请号：US11781083
申请日：2007-07-20
申请人： Charles Watkins , Kyle Kirby , Alan Wood , Salman Akram , Warren Farnworth
发明人： Charles Watkins , Kyle Kirby , Alan Wood , Salman Akram , Warren Farnworth
IPC分类号： H01L21/302 , H01L23/48 , H01L21/461 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76898
摘要： Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from the active surface through a conductive element thereon and a portion of the substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from the back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by laser ablation or drilling from the back surface of the substrate followed by dry etching to complete the through via.
摘要翻译：公开了在半导体衬底中形成贯通孔的方法和所得到的结构。在一个实施例中，通孔可以通过从其上的导电元件和导电元件下面的基底的一部分从活性表面形成部分通孔来形成通孔。然后可以通过从后表面的激光烧蚀或钻孔来完成通孔。在另一个实施例中，部分通孔可以通过激光烧蚀或从衬底的背面钻孔到其中的预定距离来形成。通孔可以通过形成延伸通过导电元件和下面的衬底以与激光钻孔的部分通孔相交的部分通孔从活性表面完成。在另一个实施例中，可以首先通过激光烧蚀或从衬底的背面进行钻孔形成部分通孔，然后通过干蚀刻来完成通孔。

9. 发明申请

US20060046463A1 Method of forming vias in semiconductor substrates without damaging active regions thereof and resulting structures 有权
公开(公告)号：US20060046463A1
公开(公告)日：2006-03-02
申请号：US11140402
申请日：2005-05-27
申请人： Charles Watkins , Kyle Kirby , Alan Wood , Salman Akram , Warren Farnworth
发明人： Charles Watkins , Kyle Kirby , Alan Wood , Salman Akram , Warren Farnworth
IPC分类号： H01L21/4763
CPC分类号： H01L21/76898
摘要： Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from the active surface through a conductive element thereon and a portion of the semiconductor substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from the back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a semiconductor substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying semiconductor substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by ablation or drilling from the back surface of the semiconductor substrate followed by dry etching to complete the through via and expose the underside of the conductive element.

10. 发明申请

US20060008739A1 Materials for use in programmed material consolidation processes 审中-公开
标题翻译：用于程序化材料合并流程的材料
公开(公告)号：US20060008739A1
公开(公告)日：2006-01-12
申请号：US11216938
申请日：2005-08-31
申请人： Alan Wood , Warren Farnworth , David Hembree , Sidney Rigg , William Hiatt , Peter Benson , Kyle Kirby , Salman Akram
发明人： Alan Wood , Warren Farnworth , David Hembree , Sidney Rigg , William Hiatt , Peter Benson , Kyle Kirby , Salman Akram
IPC分类号： G03C1/00
CPC分类号： G03F7/0037 , B33Y30/00 , B33Y70/00 , B33Y80/00 , G03F7/0047
摘要： Materials for use in programmed material consolidation processes, such as stereolithography, include a selectively consolidatable material and a filler. The filler may be included to optimize one or more physical properties of the material. The material is both selectively consolidatable and includes the desired physical property. Examples of physical properties that may optimized in a selectively consolidatable compound by mixing a filler material with a selectively consolidatable material include, without limitation, coefficient of thermal expansion, rigidity, fracture toughness, thermal stability, and strength.
摘要翻译：用于程序化材料固结方法（例如立体光刻）的材料包括可选择的可固结材料和填料。可以包括填料以优化材料的一种或多种物理性质。该材料既可选择性地整合，并且包括所需的物理性质。通过将填充材料与可选择性地可固结的材料混合可以在可选择地可固化的化合物中优化的物理性质的实例包括但不限于热膨胀系数，刚性，断裂韧性，热稳定性和强度。

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