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1. 发明授权

US08482631B2 Image processing apparatus, camera module and electronic device 失效
标题翻译：图像处理装置，相机模块和电子装置
公开(公告)号：US08482631B2
公开(公告)日：2013-07-09
申请号：US13049466
申请日：2011-03-16
申请人： Akira Yoshino , Keiichiro Yanagida , Teppei Nakano
发明人： Akira Yoshino , Keiichiro Yanagida , Teppei Nakano
IPC分类号： H04N9/73
CPC分类号： H04N9/735
摘要： According to one embodiment, a false color mask signal generation circuit generates a false color pixel mask signal to exclude false color component pixels based on an edge component signal from an edge component extraction circuit. A white balance gain calculation circuit calculates a white balance gain from an integrated value calculated by the false color component pixels being excluded based on the false color pixel mask signal.
摘要翻译：根据一个实施例，假彩色掩模信号产生电路根据来自边缘分量提取电路的边缘分量信号产生假彩色像素掩码信号以排除伪色成分像素。白平衡增益计算电路根据由假彩色像素掩模信号排除的假颜色分量像素计算出的积分值来计算白平衡增益。

2. 发明申请

US20120288144A1 IMAGE PROCESSING APPARATUS, IMAGE PROCESSING METHOD, AND MOTION DETECTION SYSTEM 审中-公开
标题翻译：图像处理设备，图像处理方法和运动检测系统
公开(公告)号：US20120288144A1
公开(公告)日：2012-11-15
申请号：US13414033
申请日：2012-03-07
申请人： Keiichiro Yanagida , Akira Yoshino , Teppei Nakano
发明人： Keiichiro Yanagida , Akira Yoshino , Teppei Nakano
IPC分类号： G06K9/00
CPC分类号： H04N5/144
摘要： According to one embodiment, an image processing apparatus includes an integrator and a motion determination unit. The motion determination unit determines movement of an object. The integrator integrates information on a first frame in a unit domain in the image of each frame, and integrates information on a second frame while inverting a sign of a signal level in the integration of the first frame. The motion determination unit makes the motion determination in the unit domain according to the integration result of the integrator.
摘要翻译：根据一个实施例，图像处理装置包括积分器和运动确定单元。运动确定单元确定物体的运动。积分器将每个帧的图像中的单位域中的第一帧的信息进行积分，并且在第一帧的积分中反转信号电平的符号的同时对第二帧的信息进行积分。运动确定单元根据积分器的积分结果在单位域中进行运动确定。

3. 发明授权

US08917348B2 Solid-state imaging device, camera module, and illuminance detection method 有权
标题翻译：固态成像装置，相机模块和照度检测方法
公开(公告)号：US08917348B2
公开(公告)日：2014-12-23
申请号：US13557548
申请日：2012-07-25
申请人： Naoto Mihara , Teppei Nakano
发明人： Naoto Mihara , Teppei Nakano
IPC分类号： H04N5/235 , G03B7/00 , H04N5/228
CPC分类号： H04N5/2351 , H04N5/2353
摘要： According to one embodiment, a solid-state imaging device includes a luminance integrating unit, a luminance observation value calculating unit, and an illuminance value conversion unit. The luminance integrating unit integrates a luminance value detected for every pixel. The luminance observation value calculating unit calculates a luminance observation value based on an integration result in the luminance integrating unit. The luminance observation value is an observation result of the luminance for an entire imaging screen. The illuminance value conversion unit converts the luminance observation value to an illuminance value. The luminance integrating unit integrates the luminance value discriminated in accordance with a condition set with respect to a luminance level.
摘要翻译：根据一个实施例，固态成像装置包括亮度积分单元，亮度观察值计算单元和照度值转换单元。亮度积分单元对每个像素进行检测的亮度值进行积分。亮度观测值计算单元基于亮度积分单元中的积分结果来计算亮度观测值。亮度观测值是整个成像画面的亮度的观察结果。照度值转换单元将亮度观测值转换为照度值。亮度积分单元对根据与亮度水平设定的条件相鉴别的亮度值进行积分。

4. 发明授权

US07272585B2 Operation circuit and operation control method thereof 有权
标题翻译：操作电路及其操作控制方法
公开(公告)号：US07272585B2
公开(公告)日：2007-09-18
申请号：US11434779
申请日：2006-05-17
申请人： Osamu Nomura , Takashi Morie , Teppei Nakano
发明人： Osamu Nomura , Takashi Morie , Teppei Nakano
IPC分类号： G06N3/00 , G06N3/02 , G06J1/00
CPC分类号： G06N3/049 , G06N3/063 , H03K7/08 , H03K9/08 , H03M5/08
摘要： A product-sum operation circuit includes a pulse width/digital conversion circuit (9) which converts a pulse signal having a pulse width representing an operand value into a digital signal, a sorting circuit (4) which outputs, in descending or ascending order of magnitude, a plurality of operand values Xi converted into digital signals by the pulse width/digital conversion circuit (9), and an accumulated sum circuit (1) which multiplies each operand value output from the sorting circuit (4) by a corresponding operand value Wi and calculates the accumulated sum of multiplication results. The pulse width/digital conversion circuit (9) includes a counter (10) which counts a clock and outputs a count value as a digital signal, and n trailing edge latch circuits (11-0-11-(n−1)) each of which latches a common count value output from the counter at the trailing edge of the input pulse signal.
摘要翻译：产品总和运算电路包括将具有表示操作数值的脉冲宽度的脉冲信号转换为数字信号的脉冲宽度/数字转换电路（9），分选电路（4），按照下列或者升序排列由脉冲宽度/数字转换电路（9）转换为数字信号的多个操作数值Xi以及将从分选电路（4）输出的每个操作数值乘以相应的操作数值的累积和电路（1） Wi并计算乘积结果的累加和。脉冲宽度/数字转换电路（9）包括对时钟进行计数的计数器（10），并输出作为数字信号的计数值，以及n个后沿锁存电路（11〜0-11〜（n-1））其在输入脉冲信号的后沿锁存从计数器输出的公共计数值。

5. 发明授权

US08330838B2 Shading correcting device and imaging apparatus 失效
标题翻译：阴影校正装置和成像装置
公开(公告)号：US08330838B2
公开(公告)日：2012-12-11
申请号：US12556741
申请日：2009-09-10
申请人： Teppei Nakano , Keizo Tashiro
发明人： Teppei Nakano , Keizo Tashiro
IPC分类号： H04N9/64
CPC分类号： H04N9/646 , H04N5/3572
摘要： A shading correcting device includes a correction-coefficient interpolation unit that calculates a color shading correction coefficient used at a position of a pixel at which the color shading correction coefficient is not set among pixels in an image signal by an interpolation process using a color shading correction coefficient set at a predetermined position. A color shading correction coefficient sent to the correction-coefficient interpolation unit is a color shading correction coefficient that is for a first color and corresponds to a pixel value of a second color adjacent to a pixel of the first color.
摘要翻译：阴影校正装置包括：校正系数插值单元，其通过使用着色校正的内插处理来计算在图像信号中的像素之间未设置色调校正系数的像素的位置处使用的色彩阴影校正系数系数设定在预定位置。发送到校正系数内插单元的色彩阴影校正系数是针对第一颜色并对应于与第一颜色的像素相邻的第二颜色的像素值的色调校正系数。

6. 发明授权

US08711262B2 Solid-state image sensing device and control method of solid-state image sensing device 失效
标题翻译：固态影像感测装置及固态摄像装置的控制方法
公开(公告)号：US08711262B2
公开(公告)日：2014-04-29
申请号：US12699288
申请日：2010-02-03
申请人： Teppei Nakano , Motohiro Morisaki
发明人： Teppei Nakano , Motohiro Morisaki
IPC分类号： H04N3/14
CPC分类号： H04N5/376 , H04N5/3454 , H04N5/3456 , H04N5/347
摘要： A solid-state image sensing device includes an image sensing region having pixels arranged in a two-dimensional array. A vertical shift register circuit selects a desired pixel row of the pixels by changing the number of one or more clock signals supplied and timing thereof in one horizontal period. A pulse selector circuit supplies a drive pulse to the desired pixel row selected by the vertical shift register circuit.
摘要翻译：固态图像感测装置包括具有以二维阵列排列的像素的图像感测区域。垂直移位寄存器电路通过在一个水平周期中改变提供的一个或多个时钟信号的数量及其定时来选择像素的期望像素行。脉冲选择器电路将驱动脉冲提供给由垂直移位寄存器电路选择的期望像素行。

7. 发明授权

US08451357B2 Solid-state imaging device 失效
标题翻译：固态成像装置
公开(公告)号：US08451357B2
公开(公告)日：2013-05-28
申请号：US12787681
申请日：2010-05-26
申请人： Teppei Nakano
发明人： Teppei Nakano
IPC分类号： H04N3/14 , H04N5/335
CPC分类号： H04N5/335 , H04N5/3456 , H04N5/3594 , H04N5/3765
摘要： According to one embodiment, a solid-state imaging sensor includes an imaging area, a vertical selector circuit, a pulse selector circuit and a timing generator circuit. The vertical selector circuit is provided with one row address comparator circuit corresponding to each of pixel rows. The row address comparator circuit is supplied with a row address in time division within one horizontal scanning interval with respect to the imaging area. Based on the comparison result of the row address comparator circuit, the vertical selector circuit outputs an electronic shutter row select signal and a read row select signal for setting an electronic shutter state and a read state of the corresponding pixel row.
摘要翻译：根据一个实施例，固态成像传感器包括成像区域，垂直选择器电路，脉冲选择器电路和定时发生器电路。垂直选择器电路设置有与每个像素行相对应的一行行地址比较器电路。行地址比较器电路在相对于成像区域的一个水平扫描间隔内以时分方式提供行地址。基于行地址比较器电路的比较结果，垂直选择器电路输出电子快门行选择信号和用于设置电子快门状态的读取行选择信号和对应的像素行的读取状态。

8. 发明授权

US07120617B2 Operation circuit and operation control method thereof 有权
标题翻译：操作电路及其操作控制方法
公开(公告)号：US07120617B2
公开(公告)日：2006-10-10
申请号：US11036001
申请日：2005-01-18
申请人： Osamu Nomura , Takashi Morie , Teppei Nakano
发明人： Osamu Nomura , Takashi Morie , Teppei Nakano
IPC分类号： G06N3/00 , H03K23/00
CPC分类号： G06N3/049 , G06N3/063 , H03K7/08 , H03K9/08 , H03M5/08
摘要： A product-sum operation circuit includes a pulse width/digital conversion circuit (9) which converts a pulse signal having a pulse width representing an operand value into a digital signal, a sorting circuit (4) which outputs, in descending or ascending order of magnitude, a plurality of operand values Xi converted into digital signals by the pulse width/digital conversion circuit (9), and an accumulated sum circuit (1) which multiplies each operand value output from the sorting circuit (4) by a corresponding operand value Wi and calculates the accumulated sum of multiplication results. The pulse width/digital conversion circuit (9) includes a counter (10) which counts a clock and outputs a count value as a digital signal, and n trailing edge latch circuits (11-0–11-(n−1)) each of which latches a common count value output from the counter at the trailing edge of the input pulse signal.
摘要翻译：产品总和运算电路包括将具有表示操作数值的脉冲宽度的脉冲信号转换为数字信号的脉冲宽度/数字转换电路（9），分选电路（4），按照下列或者升序排列由脉冲宽度/数字转换电路（9）转换为数字信号的多个操作数值Xi以及将从分选电路（4）输出的每个操作数值乘以相应的操作数值的累积和电路（1） Wi并计算乘积结果的累加和。脉冲宽度/数字转换电路（9）包括对时钟进行计数的计数器（10），并输出作为数字信号的计数值，以及n个后沿锁存电路（11〜0-11〜（n-1））其在输入脉冲信号的后沿锁存从计数器输出的公共计数值。

9. 发明授权

US08077253B2 Solid-state device having digital signal processing circuit 失效
标题翻译：具有数字信号处理电路的固态器件
公开(公告)号：US08077253B2
公开(公告)日：2011-12-13
申请号：US12485381
申请日：2009-06-16
申请人： Junichi Hosokawa , Yuuki Koguchi , Keizo Tashiro , Teppei Nakano
发明人： Junichi Hosokawa , Yuuki Koguchi , Keizo Tashiro , Teppei Nakano
IPC分类号： H04N5/232 , H04N5/217
CPC分类号： H04N9/045 , H04N5/367
摘要： An analog signal photo-electrically converted in a pixel of a light receiving area is converted to a digital signal by an ADC. The digital signal is processed by a digital signal processing circuit, and then, successively output as a digital video signal. The digital signal processing circuit has a first signal processing block for detecting and correcting a pixel defect and preventing a noise, and a second signal processing block for restoring apparent resolution lost by the processing by the first signal processing block.
摘要翻译：在光接收区域的像素中光电转换的模拟信号由ADC转换成数字信号。数字信号由数字信号处理电路处理，然后连续输出为数字视频信号。数字信号处理电路具有用于检测和校正像素缺陷并防止噪声的第一信号处理块，以及用于恢复由第一信号处理块的处理丢失的表观分辨率的第二信号处理块。

10. 发明申请

US20100201858A1 SOLID-STATE IMAGE SENSING DEVICE AND CONTROL METHOD OF SOLID-STATE IMAGE SENSING DEVICE 失效
标题翻译：固态图像感测装置及固态图像传感装置的控制方法
公开(公告)号：US20100201858A1
公开(公告)日：2010-08-12
申请号：US12699288
申请日：2010-02-03
申请人： Teppei Nakano , Motohiro Morisaki
发明人： Teppei Nakano , Motohiro Morisaki
IPC分类号： H04N5/335
CPC分类号： H04N5/376 , H04N5/3454 , H04N5/3456 , H04N5/347
摘要： A solid-state image sensing device includes an image sensing region having pixels arranged in a two-dimensional array. A vertical shift register circuit selects a desired pixel row of the pixels by changing the number of one or more clock signals supplied and timing thereof in one horizontal period. A pulse selector circuit supplies a drive pulse to the desired pixel row selected by the vertical shift register circuit.
摘要翻译：固态图像感测装置包括具有以二维阵列排列的像素的图像感测区域。垂直移位寄存器电路通过在一个水平周期中改变提供的一个或多个时钟信号的数量及其定时来选择像素的期望像素行。脉冲选择器电路将驱动脉冲提供给由垂直移位寄存器电路选择的期望像素行。

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