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1. 发明授权

US4725878A Semiconductor device 失效
公开(公告)号：US4725878A
公开(公告)日：1988-02-16
申请号：US844943
申请日：1986-03-27
申请人： Akira Miyauchi , Hiroshi Nishimoto , Tadashi Okiyama , Hiroo Kitasagami , Masahiro Sugimoto , Haruo Tamada , Shinji Emori
发明人： Akira Miyauchi , Hiroshi Nishimoto , Tadashi Okiyama , Hiroo Kitasagami , Masahiro Sugimoto , Haruo Tamada , Shinji Emori
IPC分类号： H01L23/057 , H01L23/48 , H01L23/498 , H01L23/66 , H05K1/02 , H05K1/18 , H05K3/32 , H05K3/34 , H01L39/02
CPC分类号： H01L23/66 , H01L23/057 , H01L23/49822 , H01L24/49 , H05K1/0243 , H01L2223/6627 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48235 , H01L2224/49109 , H01L2224/49171 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01078 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15174 , H01L2924/16195 , H01L2924/1903 , H01L2924/3011 , H01L2924/30111 , H01L2924/3025 , H05K1/0219 , H05K1/0237 , H05K1/182 , H05K1/184 , H05K2201/09236 , H05K2201/10409 , H05K2201/10689 , H05K2201/10969 , H05K3/325 , H05K3/3421
摘要： A semiconductor device provided with signal lines which connect a chip, provided at a top portion of a package, with external terminals provided at a bottom portion of the package. The signal lines have portions formed along side surfaces of the package. Ground surfaces are formed at predetermined distances on two sides of the high-speed signal lines. A coplanar waveguide is formed by the high-speed signal lines and the ground surfaces, so the impedance of vertical portions of the high-speed signal lines is matched to the circuits connected thereto.

2. 发明授权

US4827327A Integrated circuit device having stacked conductive layers connecting circuit elements therethrough 失效
标题翻译：集成电路器件，其具有通过其连接电路元件的堆叠导电层
公开(公告)号：US4827327A
公开(公告)日：1989-05-02
申请号：US214838
申请日：1988-07-05
申请人： Akira Miyauchi , Hiroshi Nishimoto , Tadashi Okiyama , Hiroo Kitasagami , Masahiro Sugimoto , Haruo Tamada , Shinji Emori
发明人： Akira Miyauchi , Hiroshi Nishimoto , Tadashi Okiyama , Hiroo Kitasagami , Masahiro Sugimoto , Haruo Tamada , Shinji Emori
IPC分类号： H01L23/12 , H01L21/60 , H01L23/057 , H01L23/498 , H01L23/64 , H01P1/00 , H01P3/08 , H01P5/00 , H01P5/02 , H01P5/08 , H05K1/02 , H05K1/18 , H05K3/32 , H05K3/40 , H01L23/14 , H01L23/52
CPC分类号： H05K1/184 , H01L23/057 , H01L23/49822 , H01L23/645 , H01L24/49 , H05K1/0243 , H01L2224/48091 , H01L2224/48227 , H01L2224/48235 , H01L2224/4903 , H01L2224/49051 , H01L2224/49175 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01019 , H01L2924/01023 , H01L2924/01031 , H01L2924/01033 , H01L2924/01042 , H01L2924/0105 , H01L2924/01057 , H01L2924/01061 , H01L2924/01072 , H01L2924/01074 , H01L2924/01082 , H01L2924/10329 , H01L2924/12041 , H01L2924/1306 , H01L2924/14 , H01L2924/16195 , H01L2924/19041 , H01L2924/19043 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/3025 , H05K2201/10265 , H05K2201/10409 , H05K2201/10689 , H05K3/325 , H05K3/4046
摘要： An integrated circuit device including a stacked layer unit having a plurality of stacked layers each having an insulation layer and at least one conductive layer strip formed on a surface of the insulation layer, and at least one chip mounted on the top of the insulation layer and having a plurality of circuit elements. The IC device also includes at least one first conductive member formed in the stacked layer unit, having a low inductance for first signals applied thereto and operatively connecting the first signals to be transferred between the circuit elements. The IC device further includes at least one second conductive member formed in the stacked layer unit, having a higher inductance for the first signals than that of the first conductive member and operatively connecting second signals to be transferred between the circuit elements the stacked layer unit, the chip, and the first and second conductive members are enclosed by a package and sealed with a hermetic seal.
摘要翻译：一种集成电路器件，包括具有多个堆叠层的堆叠层单元，每个堆叠层具有绝缘层和形成在所述绝缘层的表面上的至少一个导电层条，以及安装在所述绝缘层的顶部上的至少一个芯片，具有多个电路元件。该IC器件还包括形成在堆叠层单元中的至少一个第一导电构件，对施加到其上的第一信号具有低电感，并可操作地连接要在电路元件之间传输的第一信号。 IC器件还包括形成在层叠单元中的至少一个第二导电构件，其具有比第一导电构件的第一信号更高的电感，并可操作地连接要在层叠单元的电路元件之间传输的第二信号，芯片和第一和第二导电构件被封装封装并用气密密封密封。

3. 发明授权

US4875087A Integrated circuit device having strip line structure therein 失效
标题翻译：具有带状线结构的集成电路装置
公开(公告)号：US4875087A
公开(公告)日：1989-10-17
申请号：US222303
申请日：1988-07-22
申请人： Akira Miyauchi , Hiroshi Nishimoto , Tadashi Okiyama , Hiroo Kitasagami , Masahiro Sugimoto , Haruo Tamada , Shinji Emori
发明人： Akira Miyauchi , Hiroshi Nishimoto , Tadashi Okiyama , Hiroo Kitasagami , Masahiro Sugimoto , Haruo Tamada , Shinji Emori
IPC分类号： H01L23/02 , H01L23/04 , H01L23/12 , H01L23/50 , H01L23/64 , H01L23/66 , H01P3/08 , H01P5/02 , H01P5/08 , H05K1/02 , H05K3/32
CPC分类号： H01L23/642 , H01L23/66 , H01P5/028 , H01P5/08 , H01L2223/6616 , H01L2224/48091 , H01L2224/48227 , H01L24/48 , H01L2924/00014 , H01L2924/01014 , H01L2924/01039 , H01L2924/01057 , H01L2924/14 , H01L2924/16152 , H01L2924/16195 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H05K1/0237 , H05K3/325
摘要： An integrated circuit device including: at least one semiconductor chip (3) having a plurality of circuit elements; a package (21 to 24) enclosing the semiconductor chip with a hermetic seal; and a strip line unit (15-2, 11-1b, 11-2, 20 and 23:15-1, 11-1, 11-2, 11-3, 12-1 and 20) for connecting the circuit elements in the semiconductor chip to circuit outside of the package. The stripline unit having a microstrip line structure and a triplate strip line structure serial-connected to the microstrip line structure and connecting the outside circuits. The triplate strip line structure has a characteristic impedance equal to that of the microstrip line structure so that the strip line unit satisfies the required impedance matching.A center of the conductive layer strip line of the triplate strip line structure has a smaller width than that of a microstrip line of the microstrip line structure to have a predetermined impedance so that the triplate strip line structure has a same characteristic impedance as that of the microstrip line structure.
摘要翻译：一种集成电路装置，包括：具有多个电路元件的至少一个半导体芯片（3）包封（21至24），封装具有气密密封的半导体芯片; 以及用于连接电路元件的带状线单元（15-2,11-1b，11-2,20和23：15-1,11-1,11-2,11-3,12-1和20）半导体芯片到电路外部封装。带状线单元具有微带线结构和串联连接到微带线结构并连接外部电路的三板条带线结构。三板条线结构具有与微带线结构相同的特性阻抗，使得带状线单元满足所需的阻抗匹配。三板条带线结构的导电层带状线的中心具有比微带线结构的微带线更小的宽度以具有预定的阻抗，使得三板条带线结构具有与微带线结构。

4. 发明授权

US5510745A High-speed electronic circuit having a cascode configuration 失效
标题翻译：具有共源共栅配置的高速电子电路
公开(公告)号：US5510745A
公开(公告)日：1996-04-23
申请号：US170997
申请日：1993-12-21
申请人： Hiroshi Hamano , Izumi Amemiya , Takuji Yamamoto , Hiroo Kitasagami , Takeshi Ihara
发明人： Hiroshi Hamano , Izumi Amemiya , Takuji Yamamoto , Hiroo Kitasagami , Takeshi Ihara
IPC分类号： H03F1/22 , H03F3/45 , H03K5/15 , H03K19/018 , H03K19/082
CPC分类号： H03K19/01806 , H03F1/22 , H03F3/45089 , H03K19/01825 , H03K5/15
摘要： A high speed electronic circuit has a cascode circuit configuration and is provided with a bias current source (CS.sub.0) between an emitter and a base of a load transistor (Q) in the cascode circuit configuration for compensating a base-emitter voltage (V.sub.BE) of the transistor to eliminate an adverse effect of charging and discharging at a stray capacitor (C) which can be connected between the base and the emitter of the transistor. The high speed electronic circuit can be applied to an; circuit, a level shift circuit, a level shift discrimination circuit, a signal distribution circuit, a signal synthesization circuit and a frequency band control circuit.
摘要翻译：高速电子电路具有共源共栅电路结构，并且在共源共栅电路配置中在负载晶体管（Q）的发射极和基极之间提供偏置电流源（CS0），用于补偿基极 - 发射极电压（VBE）该晶体管消除了可以连接在晶体管的基极和发射极之间的杂散电容器（C）的充电和放电的不利影响。高速电子电路可应用于; 电平，电平移位电路，电平移位鉴别电路，信号分配电路，信号合成电路和频带控制电路。

5. 发明授权

US5812295A Optical subscriber transmission system and subscriber unit used in such 失效
标题翻译：光用户传输系统和用户单元使用
公开(公告)号：US5812295A
公开(公告)日：1998-09-22
申请号：US342310
申请日：1994-11-18
申请人： Hiroo Kitasagami
发明人： Hiroo Kitasagami
IPC分类号： H04B10/00 , H04B10/07 , H04B10/272
CPC分类号： H04B10/272
摘要： An optical subscriber transmission system is formed of an office center unit and a plurality of subscriber units connected to the office center unit in parallel via an optical fiber, in which system a downward signal is transmitted from the office center unit to the plurality of subscriber units via the optical fiber and upward signals are transmitted from the plurality of subscriber units to the office center unit. The optical subscriber transmission system includes a signal level detecting unit for detecting a level of the downward signal from the office center unit which is received by a subscriber unit, and a control circuit for controlling, based on a detected signal level obtained by the signal level detecting unit, an upward signal to be transmitted from the subscriber unit to the office center unit so that a level of the upward signal is decreased in accordance with an increasing of the detected signal level.
摘要翻译：光用户传输系统由办公中心单元和多个用户单元组成，多个用户单元经由光纤并行连接到办公室中心单元，在该系统中向下信号从办公中心单元发送到多个用户单元经由光纤将上行信号从多个用户单元发送到办公中心单元。光用户传输系统包括：信号电平检测单元，用于检测由用户单元接收的来自办公中心单元的向下信号的电平;以及控制电路，用于基于由信号电平获得的检测信号电平检测单元，将从用户单元发送到办公室中心单元的向上信号，使得根据检测到的信号电平的增加来降低上行信号的电平。

6. 发明授权

US5636048A Equalizing amplifier, receiver using the same and preamplifier 失效
标题翻译：均衡放大器，接收器使用相同的前置放大器
公开(公告)号：US5636048A
公开(公告)日：1997-06-03
申请号：US406200
申请日：1995-03-16
申请人： Kazuhisa Kogure , Hirokazu Osada , Yasuhiro Tanaka , Hiroo Kitasagami , Makoto Miyoshi , Kakuji Inoue , Takayoshi Ikegami , Kenichi Kobayashi , Shinichiro Sano , Setsuo Misaizu , Masahiko Yamashita , Tatsuya Nishimura
发明人： Kazuhisa Kogure , Hirokazu Osada , Yasuhiro Tanaka , Hiroo Kitasagami , Makoto Miyoshi , Kakuji Inoue , Takayoshi Ikegami , Kenichi Kobayashi , Shinichiro Sano , Setsuo Misaizu , Masahiko Yamashita , Tatsuya Nishimura
IPC分类号： H03G3/20 , H03F3/08 , H03F3/34 , H03F3/45 , H03G3/30 , H04B3/04 , H04B10/07 , H04B10/2507 , H04B10/293 , H04B10/294 , H04B10/299 , H04B10/564 , H04B10/572 , H04L25/03 , H04B10/06
CPC分类号： H04B10/6933 , H03F3/08 , H03G3/3084 , H04B10/6931 , H04L25/063
摘要： In an equalizing amplifier that equalizes an electric signal obtained from a light signal received via an optical transmission path, an AGC circuit generates first and second signals from the electric signal by referring to a threshold voltage. The first and second signals are complementary signals. An offset compensation circuit generates a first difference signal based on a difference between the first and second signals, compares the first difference signal with a first reference signal, and outputs, as the threshold voltage, a resultant error signal to the AGC circuit. The threshold voltage is varied so that it is located in the center of an amplitude of the electric signal whereby an offset of the AGC circuit can be compensated for.
摘要翻译：在均衡放大器中，均衡从经由光传输路径接收的光信号获得的电信号，AGC电路通过参考阈值电压从电信号产生第一和第二信号。第一和第二信号是互补信号。偏移补偿电路基于第一和第二信号之间的差产生第一差分信号，将第一差分信号与第一参考信号进行比较，并将所得到的误差信号作为阈值电压输出到AGC电路。阈值电压变化，使其位于电信号幅度的中心，从而可以补偿AGC电路的偏移。

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