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1. 发明申请

US20120291704A1 ELECTRODE MANUFACTURING APPARATUS 审中-公开
标题翻译：电极制造设备
公开(公告)号：US20120291704A1
公开(公告)日：2012-11-22
申请号：US13575666
申请日：2011-03-02
申请人： Akihiro Nozaki , Koji Imasaka , Atsushi Tanaka
发明人： Akihiro Nozaki , Koji Imasaka , Atsushi Tanaka
IPC分类号： B05C11/11 , B05C11/10
CPC分类号： H01M4/0402 , B01D19/0057 , H01M4/04
摘要： Provided is an electrode manufacturing apparatus having a manufacturing unit mixing a plurality of materials and manufacturing an electrode slurry, a reservoir tank connected to the manufacturing unit and storing the manufactured electrode slurry that is manufactured, a coarse particle removal filter connected to the reservoir tank and removing coarse particles in a stored electrode slurry, a defoamer connected to the coarse particle removal filter and removing bubbles in the electrode slurry from which the coarse particles are removed and then returning the electrode slurry, from which the bubbles are removed, to a position below a liquid level of the electrode slurry stored in the reservoir tank, and a coating unit connected to the reservoir tank and coating the stored electrode slurry to a base material.
摘要翻译：提供一种电极制造装置，具有混合多种材料并制造电极浆料的制造单元，连接到制造单元的储存罐，并且储存制造的制造的电极浆料，连接到储存罐的粗颗粒除去过滤器和除去存储的电极浆料中的粗颗粒，连接到粗颗粒去除过滤器上的消泡剂，并去除去除粗颗粒的电极浆料中的气泡，然后将除去气泡的电极浆料返回到下面的位置存储在储存罐中的电极浆料的液面，以及连接到储存罐的涂布单元，并将储存的电极浆料涂覆到基材上。

2. 发明授权

US5937024A Counter for counting high frequency 失效
标题翻译：计数高频计数器
公开(公告)号：US5937024A
公开(公告)日：1999-08-10
申请号：US30780
申请日：1998-02-26
申请人： Akihiro Nozaki
发明人： Akihiro Nozaki
IPC分类号： H03K21/00
CPC分类号： H03K21/00
摘要： To implement a counter which can count clocks at high frequency exceeding the maximum operating frequency of the counter circuit, with a circuit with smaller circuit scale and lower power consumption, the present invention divides an externally set value HDB indicative of a count completion value into upper and lower bits, the upper bits being counted by using a counter circuit 12 with small circuit scale and power consumption, match being detected by a comparator 13. The clock signal is frequency divided to accommodate supply of high frequency clocks, and supplies it to the counter circuit 12. Then, the match detection signal of the upper bits is shifted in the number corresponding to the value of lower bits by a shift register 14 operating at a high frequency, and a count completion signal OUT is output.
摘要翻译：为了实现能够以超过计数器电路的最大工作频率的高频时钟计数的计数器，具有较小电路规模和较低功耗的电路，本发明将表示计数完成值的外部设定值HDB分为上限低位，高位通过使用具有小电路规模和功耗的计数器电路12进行计数，匹配由比较器13检测。时钟信号被分频以适应高频时钟的供应，并将其提供给计数器电路12.然后，通过以高频工作的移位寄存器14，将与高位的匹配检测信号相对应的数字相对应的数字移位，并输出计数完成信号OUT。

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