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    • 1. 发明授权
    • Digital signal multiplexing apparatus
    • 数字信号复用装置
    • US4970719A
    • 1990-11-13
    • US233095
    • 1988-08-17
    • Akihiko TakaseYoshitaka Takasaki
    • Akihiko TakaseYoshitaka Takasaki
    • H04J3/16
    • H04J3/1641Y10S370/916
    • A digital signal multiplexing apparatus comprising variable multiplexers each of which can alter a multiplexed channel format every call in compliance with a subscriber's request, a fixed multiplexer which has a multiplexing capacity integral times as large as the total multiplexing capacity of the variable multiplexers and the multiplexed channel format of which is fixed, and fixed multiplexed signal demultiplexers each of which fixedly demultiplexes signals in a capacity integral times as large as that of each of the variable multiplexers into signals in a capacity equal to the total capacity of the variable multiplexers, wherein the outputs of the fixed multiplexed signal demultiplexers are distributed to the variable multiplexers through a distributing switch network, and the outputs of the variable multiplexers are multiplexed by the fixed multiplexer.
    • 一种数字信号复用装置,包括可变多路复用器,每个可以根据用户的请求改变每个呼叫的多路复用信道格式,固定多路复用器具有与可变多路复用器的总复用容量一样大的复用容量, 信道格式固定的固定多路复用信号解复用器,其中固定多路复用信号解复用器固定地将电容量与每个可变多路复用器的整数倍的电容多路分解成等于可变多路复用器的总容量的信号,其中, 固定复用信号解复用器的输出通过分配交换网络分配给可变多路复用器,并且可变多路复用器的输出由固定多路复用器复用。
    • 5. 发明授权
    • Method of multiplexing digital signals and apparatus therefor
    • 数字信号复用方法及其设备
    • US4967410A
    • 1990-10-30
    • US324656
    • 1989-03-17
    • Akihiko TakaseYoshitaka Takasaki
    • Akihiko TakaseYoshitaka Takasaki
    • H04J3/00H04J3/06
    • H04J3/0623
    • A high speed digital signal multiplexing method and apparatus are provided wherein a plurality of first higher bit rate transmission frames are provided, each first higher bit rate transmission frame being multiplexed therein with lower bit rate signals in an n-byte (n is an integer) interleave manner, and the lower bit rate signals are selectively derived from the plurality of first higher bit rate transmission frames and multiplexed into a second higher bit rate transmission frame. When a phase conflict is detected among the derived lower bit rate signals, all the data columns of at least one of the derived lower bit rate signals are given a predetermined delay by means of a shift register, and the derived signals are multiplexed into the second higher bit rate transmission frame. When a first higher bit rate transmission frame asynchronous with the system frame is detected, a pointer is derived which pointer represents a predetermined information unit within the derived lower bit rate signal. The derived pointer is inserted into a time slot corresponding to the frame pattern position of the second higher bit rate transmission frame for the lower bit rate signal. Thereafter, the derived signals are multiplexed.
    • 提供了一种高速数字信号复用方法和装置,其中提供多个第一较高比特率传输帧,每个第一高比特率传输帧在其中复用,其中n字节(n为整数)的较低比特率信号, 并且从多个第一较高比特率传输帧中选择性地导出较低比特率信号,并被多路复用为第二较高比特率传输帧。 当在导出的较低比特率信号中检测到相位冲突时,通过移位寄存器给出所导出的较低比特率信号中的至少一个的所有数据列,并将导出的信号复用到第二 较高的比特率传输帧。 当检测到与系统帧异步的第一较高比特率传输帧时,导出指针,该指针表示所导出的较低比特率信号内的预定信息单元。 导出的指针被插入到与较低比特率信号的第二较高比特率传输帧的帧模式位置相对应的时隙中。 此后,导出的信号被多路复用。
    • 7. 发明授权
    • Method of searching fault locations in digital transmission line
    • 数字传输线故障位置检索方法
    • US4604745A
    • 1986-08-05
    • US578791
    • 1984-02-10
    • Yoshitaka TakasakiKiichi YamashitaYasushi Takahashi
    • Yoshitaka TakasakiKiichi YamashitaYasushi Takahashi
    • H04B17/40H04L1/24H04B3/46
    • H04L1/24H04B17/40
    • A method of searching fault locations which is employed in a transmission system comprising a transmitting terminal having a transmitter for transmitting a digital signal; a receiving terminal having a receiver for receiving the digital signal; a plurality of repeaters which are placed between the transmitting and receiving terminals, and each of which receives and amplifies the digital signal from a preceding repeater section and deliver it to a subsequent repeater section; and a plurality of transmission lines for connecting the transmitter with the first repeater, the repeaters with each other and the final repeater with each other and the final repeater with the receiver, respectively. This method comprises the steps of coding an original signal to be transmitted in terms of two kinds of error detecting codes at the transmitting terminal to send out them from the transmitter; detecting an error of a received signal using one of the two kinds of error detecting codes at each repeater thereby to measure the error rate at one repeater section corresponding to each repeater; recoding a decoded received signal using the error detecting code employed to detect the error, and delivering it to a subsequent repeater section, and transmitting signals each of which represents the error rate at each repeater section measured at each repeater, to the transmitting terminal or receiving terminal.
    • 一种搜索故障位置的方法,该传输系统包括具有用于发送数字信号的发射机的发射终端; 接收终端,具有接收数字信号的接收机; 放置在发送和接收终端之间的多个中继器,每个中继器从前一个中继器部分接收和放大数字信号,并将其传送到后续中继器部分; 以及多个传输线,用于将发射机与第一中继器连接,中继器彼此相连,最后中继器彼此相连,最后中继器分别与接收机相连。 该方法包括以下步骤:在发送终端根据两种错误检测码对要发送的原始信号进行编码,以从发送器发送出来; 使用每个中继器的两种错误检测码之一检测接收信号的误差,从而测量与每个中继器对应的一个中继器部分的错误率; 使用用于检测误差的检错码重新编码解码的接收信号,并将其传送到后续中继器部分,并且将发送信号分别表示在每个中继器测量的每个转发器部分处的错误率,发送到发送终端或接收 终奌站。
    • 8. 发明授权
    • Bit synchronizing system for pulse signal transmission
    • 位同步系统用于脉冲信号传输
    • US4320527A
    • 1982-03-16
    • US66643
    • 1979-08-15
    • Yoshitaka Takasaki
    • Yoshitaka Takasaki
    • H04L7/02H04L7/033H04L7/04H03B3/04H03K5/00
    • H04L7/033H04L7/007H04L7/041
    • A bit synchronizing system for generating a timing signal corresponding to a transmitted pulse signal is disclosed in which the transmitted pulse signal is converted into a signal in which the number of pulses successively assuming the same polarity is limited to permit detection of frequency, the converted signal is integrated, a peak of integrated values is detected, the output of a voltage-controlled clock generator for generating the timing signal is processed in a similar manner to detect a peak with respect to the output, and the clock generator is controlled by a voltage corresponding to a difference between these two peaks, whereby the frequency of clock signal coincides with the bit rate of the transmitted pulse signal.
    • 公开了一种用于产生与发送的脉冲信号相对应的定时信号的位同步系统,其中发送的脉冲信号被转换成其中连续假设相同极性的脉冲数被限制以允许检测频率的信号,转换的信号 被集成,检测到积分值的峰值,以类似的方式处理用于产生定时信号的电压控制时钟发生器的输出,以检测相对于输出的峰值,并且时钟发生器由电压 对应于这两个峰值之间的差值,由此时钟信号的频率与发送的脉冲信号的比特率一致。