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1. 发明授权

US6167350A Method and apparatus for selecting information signal range and editing apparatus for information signal 失效
标题翻译：用于选择信息信号范围的方法和装置以及用于信息信号的编辑装置
公开(公告)号：US6167350A
公开(公告)日：2000-12-26
申请号：US999551
申请日：1997-12-12
申请人： Akihiko Hiramatsu , Toshiyuki Yamazaki
发明人： Akihiko Hiramatsu , Toshiyuki Yamazaki
IPC分类号： G11B27/034 , G11B27/34 , G10L15/02
CPC分类号： G11B27/34 , G11B27/034 , G11B2220/20 , G11B2220/2525
摘要： A method for selecting a range of an information signal comprises the steps of detecting the area in which the information signal is specified among a plurality of range-specifying areas displayed on a display device and selecting the information signal range in a unit of the information signal determined in accordance with the range-specifying area in which the specification is executed. The unit of information signal to be selected is different according to which area is selected, so that at least two units of information signal are available for selection.
摘要翻译：用于选择信息信号的范围的方法包括以下步骤：在显示装置上显示的多个范围指定区域中检测指定信息信号的区域，并以信息信号为单位选择信息信号范围根据执行说明书的范围指定区域确定。要选择的信息信号的单位根据哪个区域被选择是不同的，使得至少两个信息信号单元可供选择。

2. 发明授权

US4873588A Apparatus for storing digital data 失效
标题翻译：用于存储数字数据的装置
公开(公告)号：US4873588A
公开(公告)日：1989-10-10
申请号：US137344
申请日：1987-12-23
申请人： Akihiko Hiramatsu
发明人： Akihiko Hiramatsu
IPC分类号： G11B20/10 , G11B20/12 , G11B20/18 , G11B5/09
CPC分类号： G11B20/1833 , G11B20/12 , G11B20/18 , G11B2020/10546 , G11B2220/90
摘要： An apparatus for storing digital data which is applied to a PCM audio tape recorder incorporates a data input circuit to receive data blocks each having block address data identifying the block, main data, and redundancy data forming an error detection/correction code together with data including block address data for detecting the presence/absence of errors in the block address data; an error detector to detect the presence/absence of errors in the block address data by use of the redundancy data and to produce an error detection signal when any error is detected; a first write address generator to generate first write address data; a first RAM to store the main data among the data block address to the first write address data; a second write address generator to generate second write address data; a second RAM to store the first write address data from the first write address generator according to the second write address data when the address data is determined to have no error by the error detector; a second read address generator to generate second read address data, whereby the first write address data in the second RAM is read out according to the second read address data; and a first read address generator to generate first read address data according to the first write address data read out from the second RAM, whereby the main data in the first RAM is read out according to the first read address data.

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