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    • 1. 发明授权
    • System and method for ESD protection
    • ESD保护的系统和方法
    • US08405152B2
    • 2013-03-26
    • US13268386
    • 2011-10-07
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • H01L29/72
    • H03J3/08H01L27/0251H03D1/22H03G1/0005H03H11/1291H03J2200/10H03J2200/18H03K17/164H03K2217/96015H03L7/095H03L7/18
    • An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range.
    • 描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合,以提供足够的图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 使用本地振荡器调整滤波器以调整替代滤波器,以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。 结合滤波,频率规划提供了额外的镜像抑制。 片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中,使调谐电容范围居中。
    • 2. 发明申请
    • System and Method for ESD Protection
    • ESD保护系统和方法
    • US20100172060A1
    • 2010-07-08
    • US12729040
    • 2010-03-22
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • H02H9/02
    • H03L7/23H01F17/0006H01F17/0013H01F2017/0053H01F2021/125H01L23/5227H01L24/06H01L27/0248H01L2224/05554H01L2924/12034H01L2924/12035H01L2924/14H01L2924/3011H03B5/364H03D7/161H03D7/18H03G1/0029H03H11/1291H03J3/08H03J3/185H03J2200/10H03L7/10H01L2924/00
    • An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.
    • 描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合,以提供足够的图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 滤波器采用多轨螺旋电感。 使用本地振荡器调整滤波器以调整替代滤波器,以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。 结合滤波,频率规划提供了额外的镜像抑制。 片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中,使调谐电容范围居中。 差分晶体振荡器有利地用作频率参考。 差分信号传输有利地用于整个接收机。 ESD保护由保护信号完整性的焊盘环和ESD钳位结构提供。 还提供每个引脚上的分流器,以放电ESD积聚。 分流器利用栅极升压结构来提供足够的小信号RF性能和最小的寄生负载。
    • 4. 发明授权
    • System and method for ESD protection
    • US07687858B2
    • 2010-03-30
    • US12003929
    • 2008-01-03
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • H01L29/7235
    • H01L27/0251H03D1/22H03G1/0005H03H11/1291H03J3/08H03J2200/10H03J2200/18H03K17/164H03K2217/96015H03L7/095H03L7/18
    • An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.
    • 6. 发明授权
    • System and method for ESD protection
    • ESD保护的系统和方法
    • US08035162B2
    • 2011-10-11
    • US12729040
    • 2010-03-22
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • H01L29/72
    • H03L7/23H01F17/0006H01F17/0013H01F2017/0053H01F2021/125H01L23/5227H01L24/06H01L27/0248H01L2224/05554H01L2924/12034H01L2924/12035H01L2924/14H01L2924/3011H03B5/364H03D7/161H03D7/18H03G1/0029H03H11/1291H03J3/08H03J3/185H03J2200/10H03L7/10H01L2924/00
    • An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.
    • 描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合,以提供足够的图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 滤波器采用多轨螺旋电感。 使用本地振荡器调整滤波器以调整替代滤波器,以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。 结合滤波,频率规划提供了额外的镜像抑制。 片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中,使调谐电容范围居中。 差分晶体振荡器有利地用作频率参考。 差分信号传输有利地用于整个接收机。 ESD保护由保护信号完整性的焊盘环和ESD钳位结构提供。 还提供每个引脚上的分流器,以放电ESD积聚。 分流器利用栅极升压结构来提供足够的小信号RF性能和最小的寄生负载。
    • 7. 发明授权
    • System and method for ESD protection
    • ESD保护的系统和方法
    • US07692247B2
    • 2010-04-06
    • US11878750
    • 2007-07-26
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • H01L29/72
    • H01L23/50H01F17/0006H01F17/0013H01F2017/0053H01F2021/125H01L23/5227H01L23/60H01L27/0248H01L27/0251H01L27/08H01L2924/0002H01L2924/3011H03B5/1212H03B5/1228H03B5/1243H03B5/364H03D7/161H03D7/18H03G1/0029H03H11/1291H03J1/0075H03J3/04H03J3/08H03J3/185H03J2200/10H03L7/10H03L7/23H04B1/28H01L2924/00
    • An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.
    • 描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合,以提供足够的图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 滤波器采用多轨螺旋电感。 使用本地振荡器调整滤波器以调整替代滤波器,以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。 结合滤波,频率规划提供了额外的镜像抑制。 片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中,使调谐电容范围居中。 差分晶体振荡器有利地用作频率参考。 差分信号传输有利地用于整个接收机。 ESD保护由保护信号完整性的焊盘环和ESD钳位结构提供。 还提供每个引脚上的分流器,以放电ESD积聚。 分流器利用栅极升压结构来提供足够的小信号RF性能和最小的寄生负载。
    • 8. 发明授权
    • System and method for ESD protection
    • ESD保护的系统和方法
    • US07417303B2
    • 2008-08-26
    • US11521361
    • 2006-09-15
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • H01L29/72
    • H01L23/50H01F17/0006H01F17/0013H01F2017/0053H01F2021/125H01L23/5227H01L23/60H01L27/0248H01L27/0251H01L27/08H01L2924/0002H01L2924/3011H03B5/1212H03B5/1228H03B5/1243H03B5/364H03D7/161H03D7/18H03G1/0029H03H11/1291H03J1/0075H03J3/04H03J3/08H03J3/185H03J2200/10H03L7/10H03L7/23H04B1/28H01L2924/00
    • An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.
    • 描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合,以提供足够的图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 滤波器采用多轨螺旋电感。 使用本地振荡器调整滤波器以调整替代滤波器,以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。 结合滤波,频率规划提供了额外的镜像抑制。 片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中,使调谐电容范围居中。 差分晶体振荡器有利地用作频率参考。 差分信号传输有利地用于整个接收机。 ESD保护由保护信号完整性的焊盘环和ESD钳位结构提供。 还提供每个引脚上的分流器,以放电ESD积聚。 分流器利用栅极升压结构来提供足够的小信号RF性能和最小的寄生负载。
    • 10. 发明授权
    • System and method for ESD Protection
    • ESD保护的系统和方法
    • US06445039B1
    • 2002-09-03
    • US09483551
    • 2000-01-14
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • Agnes N. WooKenneth R. KindsfaterFang Lu
    • H01L2972
    • H01L23/50H01F17/0006H01F17/0013H01F2017/0053H01F2021/125H01L23/5227H01L23/60H01L27/0248H01L27/0251H01L27/08H01L2924/0002H01L2924/3011H03B5/1212H03B5/1228H03B5/1243H03B5/364H03D7/161H03D7/18H03G1/0029H03H11/1291H03J1/0075H03J3/04H03J3/08H03J3/185H03J2200/10H03L7/10H03L7/23H04B1/28H01L2924/00
    • An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.
    • 描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合,以提供足够的图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 滤波器采用多轨螺旋电感。 使用本地振荡器调整滤波器以调整替代滤波器,以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。 结合滤波,频率规划提供了额外的镜像抑制。 片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中,使调谐电容范围居中。 差分晶体振荡器有利地用作频率参考。 差分信号传输有利地用于整个接收机。 ESD保护由保护信号完整性的焊盘环和ESD钳位结构提供。 还提供每个引脚上的分流器,以放电ESD积聚。 分流器利用栅极升压结构来提供足够的小信号RF性能和最小的寄生负载。