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1. 发明授权

US07974337B2 High speed receive equalizer architecture 有权
标题翻译：高速接收均衡器架构
公开(公告)号：US07974337B2
公开(公告)日：2011-07-05
申请号：US12606751
申请日：2009-10-27
申请人： Afshin Momtaz , Mario Caresosa , David Kyong-Sik Chung , Davide Tonietto , Guangming Yin , Bruce Currivan , Thomas Kolze , Ichiro Fujimori
发明人： Afshin Momtaz , Mario Caresosa , David Kyong-Sik Chung , Davide Tonietto , Guangming Yin , Bruce Currivan , Thomas Kolze , Ichiro Fujimori
IPC分类号： H03H7/30
CPC分类号： H04L7/033 , H03G3/3084 , H03L7/091 , H04L25/03057 , H04L2025/03375 , H04L2025/03617
摘要： Various example embodiments are disclosed. According to an example embodiment, an apparatus may include a continuous time filter, a decision feedback equalizer, a clock and data recovery circuit, and an adaptation circuit. The adaptation circuit may be configured to adapt equalization according to at least one dithering algorithm by adjusting a delay adjust signal based on a mean square error of equalized data signals.
摘要翻译：公开了各种示例性实施例。根据示例实施例，设备可以包括连续时间滤波器，判决反馈均衡器，时钟和数据恢复电路以及适配电路。适配电路可以被配置为通过基于均衡数据信号的均方误差调整延迟调整信号来根据至少一个抖动算法来适应均衡。

2. 发明申请

US20100046601A1 HIGH SPEED RECEIVE EQUALIZER ARCHITECTURE 有权
标题翻译：高速接收均衡器结构
公开(公告)号：US20100046601A1
公开(公告)日：2010-02-25
申请号：US12606751
申请日：2009-10-27
申请人： Afshin Momtaz , Mario Caresosa , David Chung , Davide Tonietto , Guangming Yin , Bruce Currivan , Thomas Kolze , Ichiro Fujimori
发明人： Afshin Momtaz , Mario Caresosa , David Chung , Davide Tonietto , Guangming Yin , Bruce Currivan , Thomas Kolze , Ichiro Fujimori
IPC分类号： H03K5/159
CPC分类号： H04L7/033 , H03G3/3084 , H03L7/091 , H04L25/03057 , H04L2025/03375 , H04L2025/03617
摘要： Various example embodiments are disclosed. According to an example embodiment, an apparatus may include a continuous time filter, a decision feedback equalizer, a clock and data recovery circuit, and an adaptation circuit. The adaptation circuit may be configured to adapt equalization according to at least one dithering algorithm by adjusting a delay adjust signal based on a mean square error of equalized data signals.
摘要翻译：公开了各种示例性实施例。根据示例实施例，设备可以包括连续时间滤波器，判决反馈均衡器，时钟和数据恢复电路以及适配电路。适配电路可以被配置为通过基于均衡数据信号的均方误差调整延迟调整信号来根据至少一个抖动算法来适应均衡。

3. 发明授权

US07623600B2 High speed receive equalizer architecture 有权
标题翻译：高速接收均衡器架构
公开(公告)号：US07623600B2
公开(公告)日：2009-11-24
申请号：US10880959
申请日：2004-06-30
申请人： Afshin Momtaz , Mario Caresosa , David Chung , Davide Tonietto , Guangming Yin , Bruce Currivan , Thomas Kolze , Ichiro Fujimori
发明人： Afshin Momtaz , Mario Caresosa , David Chung , Davide Tonietto , Guangming Yin , Bruce Currivan , Thomas Kolze , Ichiro Fujimori
IPC分类号： H04L27/08
CPC分类号： H04L7/033 , H03G3/3084 , H03L7/091 , H04L25/03057 , H04L2025/03375 , H04L2025/03617
摘要： Equalization is provided in a high speed communication receiver that includes in various aspects an automatic gain control input stage, a decision feedback equalizer, a clock and data recovery circuit and equalization control circuits. The automatic gain control stage may include a continuous time filter with an adjustable bandwidth. A threshold adjust signal may be applied to the output of the automatic gain control stage. The equalization control circuits may be implemented in the digital domain and operate at a lower clock speed than the data path.
摘要翻译：在高速通信接收机中提供均衡，其包括各种方面的自动增益控制输入级，判决反馈均衡器，时钟和数据恢复电路以及均衡控制电路。自动增益控制级可以包括具有可调节带宽的连续时间滤波器。阈值调整信号可以应用于自动增益控制级的输出。均衡控制电路可以在数字域中实现并且以比数据路径更低的时钟速度工作。

4. 发明申请

US20050271169A1 High speed receive equalizer architecture 有权
标题翻译：高速接收均衡器架构
公开(公告)号：US20050271169A1
公开(公告)日：2005-12-08
申请号：US10880959
申请日：2004-06-30
申请人： Afshin Momtaz , Mario Caresosa , David Chung , Davide Tonietto , Guangming Yin , Bruce Currivan , Thomas Kolze , Ichiro Fujimori
发明人： Afshin Momtaz , Mario Caresosa , David Chung , Davide Tonietto , Guangming Yin , Bruce Currivan , Thomas Kolze , Ichiro Fujimori
IPC分类号： H03G3/30 , H03L7/091 , H04L7/02 , H04L7/033 , H04L25/03 , H04L27/08
CPC分类号： H04L7/033 , H03G3/3084 , H03L7/091 , H04L25/03057 , H04L2025/03375 , H04L2025/03617
摘要： Equalization is provided in a high speed communication receiver that includes in various aspects an automatic gain control input stage, a decision feedback equalizer, a clock and data recovery circuit and equalization control circuits. The automatic gain control stage may include a continuous time filter with an adjustable bandwidth. A threshold adjust signal may be applied to the output of the automatic gain control stage. The equalization control circuits may be implemented in the digital domain and operate at a lower clock speed than the data path.
摘要翻译：在高速通信接收机中提供均衡，其包括各种方面的自动增益控制输入级，判决反馈均衡器，时钟和数据恢复电路以及均衡控制电路。自动增益控制级可以包括具有可调节带宽的连续时间滤波器。阈值调整信号可以应用于自动增益控制级的输出。均衡控制电路可以在数字域中实现并且以比数据路径更低的时钟速度工作。

5. 发明授权

US07961823B2 System and method for adjusting multiple control loops using common criteria 有权
标题翻译：使用常用标准调整多个控制回路的系统和方法
公开(公告)号：US07961823B2
公开(公告)日：2011-06-14
申请号：US10879673
申请日：2004-06-29
申请人： Thomas Kolze , Bruce Currivan , Afshin Momtaz
发明人： Thomas Kolze , Bruce Currivan , Afshin Momtaz
IPC分类号： H04B1/10 , H04B7/04 , H04L1/00
CPC分类号： H04L25/03006 , H04L7/033
摘要： Data error such as mean square error may be reduced in a system such as a communication receiver using a dithering algorithm that adjusts one or more parameters in the system. The dithering algorithm may be applied to more than one parameter in a nested manner. The dithering algorithm may be modified to immediately check the MSE after a parameter has been adjusted.
摘要翻译：在诸如使用调整系统中的一个或多个参数的抖动算法的通信接收机的系统中，诸如均方误差之类的数据误差可能会降低。抖动算法可以以嵌套方式应用于多个参数。可以修改抖动算法，以便在调整参数后立即检查MSE。

6. 发明申请

US20050271137A1 System and method for adjusting multiple control loops using common criteria 有权
标题翻译：使用常用标准调整多个控制回路的系统和方法
公开(公告)号：US20050271137A1
公开(公告)日：2005-12-08
申请号：US10879673
申请日：2004-06-29
申请人： Thomas Kolze , Bruce Currivan , Afshin Momtaz
发明人： Thomas Kolze , Bruce Currivan , Afshin Momtaz
IPC分类号： H04L25/03 , H04B1/10
CPC分类号： H04L25/03006 , H04L7/033
摘要： Data error such as mean square error may be reduced in a system such as a communication receiver using a dithering algorithm that adjusts one or more parameters in the system. The dithering algorithm may be applied to more than one parameter in a nested manner. The dithering algorithm may be modified to immediately check the MSE after a parameter has been adjusted.
摘要翻译：在诸如使用调整系统中的一个或多个参数的抖动算法的通信接收机的系统中，诸如均方误差之类的数据误差可能会降低。抖动算法可以以嵌套方式应用于多个参数。可以修改抖动算法，以便在调整参数后立即检查MSE。

7. 发明申请

US20050163196A1 Cancellation of burst noise in a communication system with application to S-CDMA 有权
标题翻译：在应用于S-CDMA的通信系统中消除突发噪声
公开(公告)号：US20050163196A1
公开(公告)日：2005-07-28
申请号：US11089139
申请日：2005-03-24
申请人： Bruce Currivan , Nabil Yousef , Thomas Kolze , Gottfried Ungerboeck
发明人： Bruce Currivan , Nabil Yousef , Thomas Kolze , Gottfried Ungerboeck
IPC分类号： H04B1/707 , H04B7/216 , H04L25/03 , H04L25/49 , H04L27/34
CPC分类号： H04B7/216 , H04B1/71 , H04B1/7107 , H04J13/0003 , H04J13/16 , H04L25/03038 , H04L25/03343 , H04L25/49 , H04L27/3405 , H04L2025/03375 , H04L2025/03477
摘要： A communication system performs burst noise cancellation. A transmitter produces and transmits a spread signal that comprises at least one known-value symbol spread by a plurality of non data-carrying orthogonal codes and data symbols spread by at least one data-carrying orthogonal code. The transmitter transmits the spread signal across a communication link that introduces burst noise. A burst noise detector determines burst noise affected chips of the orthogonal codes. A weight computation functional block calculates a plurality of complex-valued combining weights based upon the burst noise affected chips. A vector de-spreader and a linear combiner operate in combination to use the plurality of non data-carrying orthogonal codes, the at least one data-carrying orthogonal code, and the plurality of complex-valued combining weights to de-spread the received spread signal to produce the data symbols with the burst noise substantially removed.
摘要翻译：通信系统执行突发噪声消除。发射机产生并发射扩展信号，该扩展信号包括由多个非数据携带正交码扩展的至少一个已知值符号和由至少一个携带数据的正交码扩展的数据符号。发射机通过引入突发噪声的通信链路发送扩展信号。突发噪声检测器确定正交码的突发噪声影响码片。权重计算功能块基于突发噪声影响的码片计算多个复值组合权重。向量解扩器和线性组合器组合操作以使用多个非数据携带正交码，所述至少一个数据携带正交码和多个复值组合权重来对接收到的扩展进行解扩展信号以产生具有基本去除的突发噪声的数据符号。

8. 发明授权

US07978795B2 Fast automatic gain control 有权
标题翻译：快速自动增益控制
公开(公告)号：US07978795B2
公开(公告)日：2011-07-12
申请号：US11945288
申请日：2007-11-27
申请人： Bruce Currivan , Loke Tan , Thomas Kolze
发明人： Bruce Currivan , Loke Tan , Thomas Kolze
IPC分类号： H04L27/08
CPC分类号： H04L27/22 , H04L25/03038 , H04L25/03057 , H04L25/061 , H04L2025/03401 , H04L2025/0342 , H04L2025/03687
摘要： An apparatus comprising a slicer configured to produce a symbol decision value and a symbol error value utilizing, at least in part, a slicer input signal; and an automatic gain controller configured to facilitate the automatic control of a gain applied to the slicer input signal by producing a gain control signal, the automatic gain controller comprising a decision-directed amplitude error detector configured to utilize, at least in part, the symbol decision value and the symbol error value to produce an amplitude error signal, and a loop filter configured to utilize the amplitude error signal to produce the gain control signal.
摘要翻译：一种包括限幅器的装置，其被配置为至少部分地利用限幅器输入信号产生符号判定值和符号误差值; 以及自动增益控制器，其被配置为通过产生增益控制信号来促进对施加到限幅器输入信号的增益的自动控制，所述自动增益控制器包括判决导向的幅度误差检测器，其被配置为至少部分地使用符号决定值和符号误差值，以产生振幅误差信号;以及环路滤波器，其被配置为利用所述振幅误差信号来产生所述增益控制信号。

9. 发明申请

US20090135896A1 FAST AUTOMATIC GAIN CONTROL 有权
标题翻译：快速自动增益控制
公开(公告)号：US20090135896A1
公开(公告)日：2009-05-28
申请号：US11945288
申请日：2007-11-27
申请人： Bruce Currivan , Loke Tan , Thomas Kolze
发明人： Bruce Currivan , Loke Tan , Thomas Kolze
IPC分类号： H04L27/08 , H03H7/30 , H03K5/159
CPC分类号： H04L27/22 , H04L25/03038 , H04L25/03057 , H04L25/061 , H04L2025/03401 , H04L2025/0342 , H04L2025/03687
摘要： An apparatus comprising a slicer configured to produce a symbol decision value and a symbol error value utilizing, at least in part, a slicer input signal; and an automatic gain controller configured to facilitate the automatic control of a gain applied to the slicer input signal by producing a gain control signal, the automatic gain controller comprising a decision-directed amplitude error detector configured to utilize, at least in part, the symbol decision value and the symbol error value to produce an amplitude error signal, and a loop filter configured to utilize the amplitude error signal to produce the gain control signal.
摘要翻译：一种包括限幅器的装置，其被配置为至少部分地利用限幅器输入信号产生符号判定值和符号误差值; 以及自动增益控制器，其被配置为通过产生增益控制信号来促进对施加到限幅器输入信号的增益的自动控制，所述自动增益控制器包括判决导向的幅度误差检测器，其被配置为至少部分地使用符号决定值和符号误差值，以产生振幅误差信号;以及环路滤波器，其被配置为利用所述振幅误差信号来产生所述增益控制信号。

10. 发明授权

US07308050B2 Detection and mitigation of temporary impairments in a communications channel 有权
标题翻译：检测和缓解通信信道中的临时损伤
公开(公告)号：US07308050B2
公开(公告)日：2007-12-11
申请号：US10000415
申请日：2001-11-02
申请人： Thomas Kolze , Bruce Currivan , Jonathan Min
发明人： Thomas Kolze , Bruce Currivan , Jonathan Min
IPC分类号： H04L27/01
CPC分类号： H04L1/005 , H04B1/71 , H04B1/7102 , H04B1/7103 , H04B1/71055 , H04B1/71072 , H04B2201/709709 , H04L1/0009 , H04L1/0045 , H04L1/0057 , H04N21/6168
摘要： Systems and methods are disclosed for detecting temporary high level impairments, such as noise or interference, for example, in a communications channel, and subsequently, mitigating the deleterious effects of the dynamic impairments. In one embodiment, the method not only performs dynamic characterization of channel fidelity against impairments, but also uses this dynamic characterization of the channel fidelity to adapt the receiver processing and to affect an improvement in the performance of the receiver. For example, in this embodiment, the method increases the accuracy of the estimation of the transmitted information, or similarly, increases the probability of making the correct estimates of the transmitted information, even in the presence of temporary severe levels of impairment. The channel fidelity history may also be stored and catalogued for use in, for example, future optimization of the transmit waveform.
摘要翻译：公开了用于检测临时高级损伤（例如噪声或干扰）的系统和方法，例如在通信信道中，并且随后减轻动态损伤的有害影响。在一个实施例中，该方法不仅执行对损伤的信道保真度的动态表征，而且还使用信道保真度的动态表征来适应接收机处理并影响接收机性能的改善。例如，在本实施例中，该方法提高了所发送信息的估计的准确性，或者类似地，即使存在临时严重的损伤水平，也增加了发送信息的正确估计的可能性。信道保真度历史也可以存储和编目，以用于例如发射波形的未来优化。

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