专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20090020829A1 PRINTING OF CONTACT METAL AND INTERCONNECT METAL VIA SEED PRINTING AND PLATING 有权
标题翻译：通过种子印刷和镀层印刷接触金属和互连金属
公开(公告)号：US20090020829A1
公开(公告)日：2009-01-22
申请号：US12175450
申请日：2008-07-17
申请人： Aditi CHANDRA , Arvind KAMATH , James Montague CLEEVES , Joerg ROCKENBERGER , Mao Takashima , Erik SCHER
发明人： Aditi CHANDRA , Arvind KAMATH , James Montague CLEEVES , Joerg ROCKENBERGER , Mao Takashima , Erik SCHER
IPC分类号： H01L21/768 , H01L21/28 , H01L29/78
CPC分类号： H01L21/288 , H01L21/28518 , H01L21/32051 , H01L21/32053 , H01L21/76838 , H01L21/76873 , H01L21/76895 , H01L27/1285 , H01L27/1292 , H01L29/458 , H01L29/78618 , H01L2924/0002 , H01L2924/00
摘要： Methods of forming contacts (and optionally, local interconnects) using an ink comprising a silicide-forming metal, electrical devices such as diodes and/or transistors including such contacts and (optional) local interconnects, and methods for forming such devices are disclosed. The method of forming contacts includes depositing an ink of a silicide-forming metal onto an exposed silicon surface, drying the ink to form a silicide-forming metal precursor, and heating the silicide-forming metal precursor and the silicon surface to form a metal silicide contact. Optionally, the metal precursor ink may be selectively deposited onto a dielectric layer adjacent to the exposed silicon surface to form a metal-containing interconnect. Furthermore, one or more bulk conductive metal(s) may be deposited on remaining metal precursor ink and/or the dielectric layer. Electrical devices, such as diodes and transistors may be made using such printed contact and/or local interconnects. A metal ink may be printed for contacts as well as for local interconnects at the same time, or in the alternative, the printed metal can act as a seed for electroless deposition of other metals if different metals are desired for the contact and the interconnect lines. This approach advantageously reduces the number of processing steps and does not necessarily require any etching.
摘要翻译：公开了使用包含硅化物形成金属的油墨形成触点（和任选的局部互连）的方法，诸如二极管和/或包括这种触点的晶体管的电气器件，（可选的）局部互连）以及用于形成这种器件的方法。形成接触的方法包括将硅化物形成金属的油墨沉积到暴露的硅表面上，干燥油墨以形成形成硅化物的金属前体，以及加热形成硅化物的金属前体和硅表面以形成金属硅化物联系。任选地，可以将金属前体油墨选择性地沉积到与暴露的硅表面相邻的电介质层上，以形成含金属互连。此外，一个或多个体导电金属可以沉积在剩余的金属前体油墨和/或介电层上。可以使用这种印刷的接触和/或局部互连来制造电子器件，例如二极管和晶体管。金属墨水可以同时印刷以用于接触以及局部互连，或者替代地，如果需要用于接触和互连线的不同金属，印刷金属可以用作其它金属的无电沉积的种子。这种方法有利地减少了处理步骤的数量，并且不一定需要任何蚀刻。

2. 发明申请

US20090065776A1 Print Processing for Patterned Conductor, Semiconductor and Dielectric Materials 有权
标题翻译：图案导体，半导体和电介质材料的印刷加工
公开(公告)号：US20090065776A1
公开(公告)日：2009-03-12
申请号：US12114741
申请日：2008-05-02
申请人： Erik SCHER , Steven Molesa , Joerg Rockenberger , Arvind Kamath , Ikuo Mori
发明人： Erik SCHER , Steven Molesa , Joerg Rockenberger , Arvind Kamath , Ikuo Mori
IPC分类号： H01L29/04 , C08L83/00 , H01L29/06 , H01L29/16 , H01L21/208
CPC分类号： C09D5/24 , C09D11/101 , C09D11/322 , C09D11/36 , C09D11/54 , H01B3/02 , H01L21/02532 , H01L21/02601 , H01L21/02628 , H01L21/28008 , H01L27/1292 , H01L29/6675 , H01L29/78696 , Y10T428/24802
摘要： Embodiments relate to printing features from an ink containing a material precursor. In some embodiments, the material includes an electrically active material, such as a semiconductor, a metal, or a combination thereof. In another embodiment, the material includes a dielectric. The embodiments provide improved printing process conditions that allow for more precise control of the shape, profile and dimensions of a printed line or other feature. The composition(s) and/or method(s) improve control of pinning by increasing the viscosity and mass loading of components in the ink. An exemplary method thus includes printing an ink comprising a material precursor and a solvent in a pattern on the substrate; precipitating the precursor in the pattern to form a pinning line; substantially evaporating the solvent to form a feature of the material precursor defined by the pinning line; and converting the material precursor to the patterned material.
摘要翻译：实施例涉及从含有材料前体的油墨印刷特征。在一些实施例中，材料包括电活性材料，例如半导体，金属或其组合。在另一个实施例中，该材料包括电介质。这些实施例提供改进的印刷工艺条件，其允许更精确地控制印刷线或其它特征的形状，轮廓和尺寸。组合物和/或方法通过增加油墨中组分的粘度和质量负载来改善对钉扎的控制。因此，示例性方法包括在基板上以图案印刷包含材料前体和溶剂的油墨; 以图案沉淀前体以形成钉扎线; 基本上蒸发溶剂以形成由钉扎线限定的材料前体的特征; 并将材料前体转化成图案化材料。

3. 发明申请

US20130344301A1 PRINT PROCESSING FOR PATTERNED CONDUCTOR, SEMICONDUCTOR AND DIELECTRIC MATERIALS 有权
标题翻译：图形导体，半导体和电介质材料的印刷加工
公开(公告)号：US20130344301A1
公开(公告)日：2013-12-26
申请号：US13975231
申请日：2013-08-23
申请人： Erik SCHER , Steven MOLESA , Joerg ROCKENBERGER , Arvind KAMATH , Ikuo MORI , Wenzhuo GUO , Dmitry KARSHTEDT , Vladimir DIOUMAEV
发明人： Erik SCHER , Steven MOLESA , Joerg ROCKENBERGER , Arvind KAMATH , Ikuo MORI , Wenzhuo GUO , Dmitry KARSHTEDT , Vladimir DIOUMAEV
IPC分类号： C09D5/24 , H01B3/02
CPC分类号： C09D5/24 , C09D11/101 , C09D11/322 , C09D11/36 , C09D11/54 , H01B3/02 , H01L21/02532 , H01L21/02601 , H01L21/02628 , H01L21/28008 , H01L27/1292 , H01L29/6675 , H01L29/78696 , Y10T428/24802
摘要： Embodiments relate to printing features from an ink containing a material precursor. In some embodiments, the material includes an electrically active material, such as a semiconductor, a metal, or a combination thereof. In another embodiment, the material includes a dielectric. The embodiments provide improved printing process conditions that allow for more precise control of the shape, profile and dimensions of a printed line or other feature. The composition(s) and/or method(s) improve control of pinning by increasing the viscosity and mass loading of components in the ink. An exemplary method thus includes printing an ink comprising a material precursor and a solvent in a pattern on the substrate; precipitating the precursor in the pattern to form a pinning line; substantially evaporating the solvent to form a feature of the material precursor defined by the pinning line; and converting the material precursor to the patterned material.
摘要翻译：实施例涉及从含有材料前体的油墨印刷特征。在一些实施例中，材料包括电活性材料，例如半导体，金属或其组合。在另一个实施例中，该材料包括电介质。这些实施例提供改进的印刷工艺条件，其允许更精确地控制印刷线或其它特征的形状，轮廓和尺寸。组合物和/或方法通过增加油墨中组分的粘度和质量负载来改善对钉扎的控制。因此，示例性方法包括在基板上以图案印刷包含材料前体和溶剂的油墨; 以图案沉淀前体以形成钉扎线; 基本上蒸发溶剂以形成由钉扎线限定的材料前体的特征; 并将材料前体转化成图案化材料。

4. 发明申请

US20130189823A1 Profile Engineered Thin Film Devices and Structures 有权
公开(公告)号：US20130189823A1
公开(公告)日：2013-07-25
申请号：US13791721
申请日：2013-03-08
申请人： Arvind KAMATH , Erik SCHER , Patrick SMITH , Aditi CHANDRA , Steven MOLESA
发明人： Arvind KAMATH , Erik SCHER , Patrick SMITH , Aditi CHANDRA , Steven MOLESA
IPC分类号： H01L21/36
CPC分类号： H01L21/36 , C23C18/08 , C23C18/122 , C23C18/1245 , C23C18/1295 , H01L21/02532 , H01L21/02601 , H01L21/02628 , H01L21/28273 , H01L21/28518 , H01L21/288 , H01L21/76871 , H01L21/76895 , H01L27/1285 , H01L27/1292 , H01L28/40 , H01L29/0657 , H01L29/66143 , H01L29/6675 , H01L29/7881 , H01L29/872 , H05K1/16 , H05K1/162 , H05K3/125 , H05K2201/098
摘要： The present invention relates to electrically active devices (e.g., capacitors, transistors, diodes, floating gate memory cells, etc.) having dielectric, conductor, and/or semiconductor layers with smooth and/or dome-shaped profiles and methods of forming such devices by depositing or printing (e.g., inkjet printing) an ink composition that includes a semiconductor, metal, or dielectric precursor. The smooth and/or dome-shaped cross-sectional profile allows for smooth topological transitions without sharp steps, preventing feature discontinuities during deposition and allowing for more complete step coverage of subsequently deposited structures. The inventive profile allows for both the uniform growth of oxide layers by thermal oxidation, and substantially uniform etching rates of the structures. Such oxide layers may have a uniform thickness and provide substantially complete coverage of the underlying electrically active feature. Uniform etching allows for an efficient method of reducing a critical dimension of an electrically active structure by simple isotropic etch.

5. 发明申请

US20090085095A1 Profile Engineered Thin Film Devices and Structures 有权
标题翻译：简介工程薄膜器件和结构
公开(公告)号：US20090085095A1
公开(公告)日：2009-04-02
申请号：US12243880
申请日：2008-10-01
申请人： Arvind KAMATH , Erik SCHER , Patrick SMITH , Aditi CHANDRA , Steven MOLESA
发明人： Arvind KAMATH , Erik SCHER , Patrick SMITH , Aditi CHANDRA , Steven MOLESA
IPC分类号： H01L29/788 , H01L29/786 , H01L29/00 , H01L21/208
CPC分类号： H01L21/36 , C23C18/08 , C23C18/122 , C23C18/1245 , C23C18/1295 , H01L21/02532 , H01L21/02601 , H01L21/02628 , H01L21/28273 , H01L21/28518 , H01L21/288 , H01L21/76871 , H01L21/76895 , H01L27/1285 , H01L27/1292 , H01L28/40 , H01L29/0657 , H01L29/66143 , H01L29/6675 , H01L29/7881 , H01L29/872 , H05K1/16 , H05K1/162 , H05K3/125 , H05K2201/098
摘要： The present invention relates to electrically active devices (e.g., capacitors, transistors, diodes, floating gate memory cells, etc.) having dielectric, conductor, and/or semiconductor layers with smooth and/or dome-shaped profiles and methods of forming such devices by depositing or printing (e.g., inkjet printing) an ink composition that includes a semiconductor, metal, or dielectric precursor. The smooth and/or dome-shaped cross-sectional profile allows for smooth topological transitions without sharp steps, preventing feature discontinuities during deposition and allowing for more complete step coverage of subsequently deposited structures. The inventive profile allows for both the uniform growth of oxide layers by thermal oxidation, and substantially uniform etching rates of the structures. Such oxide layers may have a uniform thickness and provide substantially complete coverage of the underlying electrically active feature. Uniform etching allows for an efficient method of reducing a critical dimension of an electrically active structure by simple isotropic etch.
摘要翻译：本发明涉及具有平滑和/或圆顶形轮廓的电介质，导体和/或半导体层的电活性器件（例如，电容器，晶体管，二极管，浮动栅极存储单元等）和形成这种器件的方法通过沉积或印刷（例如喷墨印刷）包括半导体，金属或电介质前体的油墨组合物。平滑和/或圆顶形的横截面轮廓允许平滑的拓扑转变而没有尖锐的步骤，防止沉积期间的特征不连续性，并允许随后沉积的结构的更完整的阶梯覆盖。本发明的轮廓允许通过热氧化均匀生长氧化物层，以及基本均匀的结构蚀刻速率。这样的氧化物层可以具有均匀的厚度并且提供基本的电活性特征的基本上完整的覆盖。均匀蚀刻允许通过简单的各向同性蚀刻来降低电活性结构的临界尺寸的有效方法。

6. 发明申请

US20130252407A1 SILICON POLYMERS, METHODS OF POLYMERIZING SILICON COMPOUNDS, AND METHODS OF FORMING THIN FILMS FROM SUCH SILICON POLYMERS 有权
标题翻译：硅聚合物，聚硅氧烷化合物的方法，以及从这种硅聚合物形成薄膜的方法
公开(公告)号：US20130252407A1
公开(公告)日：2013-09-26
申请号：US13897296
申请日：2013-05-17
申请人： Dmitry KARSHTEDT , Joerg ROCKENBERGER , Fabio ZURCHER , Brent RIDLEY , Erik SCHER
发明人： Dmitry KARSHTEDT , Joerg ROCKENBERGER , Fabio ZURCHER , Brent RIDLEY , Erik SCHER
IPC分类号： H01L21/02
CPC分类号： H01L21/02628 , C08G77/60 , C09D183/16 , H01L21/02282 , H01L27/1214 , H01L27/1292
摘要： Compositions and methods for controlled polymerization and/or oligomerization of hydrosilanes compounds including those of the general formulae SinH2n and SinH2n+2 as well as alkyl- and arylsilanes, to produce soluble silicon polymers as a precursor to silicon films having low carbon content.
摘要翻译：含有通式SinH2n和SinH2n + 2以及烷基和芳基硅烷的氢化硅烷化合物的受控聚合和/或低聚的组合物和方法，以生产可溶性硅聚合物作为具有低碳含量的硅膜的前体。

7. 发明申请

US20120061679A1 Silicon Polymers, Methods of Polymerizing Silicon Compounds, and Methods of Forming Thin Films From Such Silicon Polymers 有权
标题翻译：硅聚合物，聚合硅化合物的方法和从这种硅聚合物形成薄膜的方法
公开(公告)号：US20120061679A1
公开(公告)日：2012-03-15
申请号：US13299318
申请日：2011-11-17
申请人： Dmitry KARSHTEDT , Joerg ROCKENBERGER , Fabio ZÜRCHER , Brent RIDLEY , Erik SCHER
发明人： Dmitry KARSHTEDT , Joerg ROCKENBERGER , Fabio ZÜRCHER , Brent RIDLEY , Erik SCHER
IPC分类号： H01L21/20 , C08L83/00 , C08G77/08 , B05D7/00 , C07F7/30 , H01B1/12 , H01L29/04 , B05D3/04 , C08G77/00 , C07F7/08
CPC分类号： H01L21/02628 , C08G77/60 , C09D183/16 , H01L21/02282 , H01L27/1214 , H01L27/1292
摘要： Compositions and methods for controlled polymerization and/or oligomerization of hydrosilanes compounds including those of the general formulae SinH2n and SinH2n+2 as well as alkyl- and arylsilanes, to produce soluble silicon polymers as a precursor to silicon films having low carbon content.
摘要翻译：含有通式SinH2n和SinH2n + 2以及烷基和芳基硅烷的氢化硅烷化合物的受控聚合和/或低聚的组合物和方法，以生产可溶性硅聚合物作为具有低碳含量的硅膜的前体。

8. 发明申请

US20170098508A1 Methods for Forming Electrically Precise Capacitors, and Structures Formed Therefrom 审中-公开
公开(公告)号：US20170098508A1
公开(公告)日：2017-04-06
申请号：US15385727
申请日：2016-12-20
申请人： Arvind KAMATH , Criswell CHOI , Patrick SMITH , Erik SCHER , Jiang LI
发明人： Arvind KAMATH , Criswell CHOI , Patrick SMITH , Erik SCHER , Jiang LI
IPC分类号： H01G4/40 , H01L23/66 , H01G4/12 , H01Q1/38 , H01G4/008 , H01G4/01 , H01G4/224 , H01Q1/22 , H01L49/02 , H01G4/30
CPC分类号： H01G4/40 , H01G4/002 , H01G4/005 , H01G4/008 , H01G4/01 , H01G4/10 , H01G4/1209 , H01G4/224 , H01G4/30 , H01G4/306 , H01G4/33 , H01G13/00 , H01L23/66 , H01L27/016 , H01L28/60 , H01L2223/6677 , H01Q1/22 , H01Q1/2283 , H01Q1/38 , Y10T29/43 , Y10T29/435 , Y10T29/49002 , Y10T29/49016
摘要： High precision capacitors and methods for forming the same utilizing a precise and highly conformal deposition process for depositing an insulating layer on substrates of various roughness and composition. The method generally comprises the steps of depositing a first insulating layer on a metal substrate by atomic layer deposition (ALD); (b) forming a first capacitor electrode on the first insulating layer; and (c) forming a second insulating layer on the first insulating layer and on or adjacent to the first capacitor electrode. Embodiments provide an improved deposition process that produces a highly conformal insulating layer on a wide range of substrates, and thereby, an improved capacitor.

9. 发明申请

US20150146345A1 Methods for Forming Electrically Precise Capacitors, and Structures Formed Therefrom 审中-公开
标题翻译：形成电精密电容器的方法及其结构
公开(公告)号：US20150146345A1
公开(公告)日：2015-05-28
申请号：US14613178
申请日：2015-02-03
申请人： Arvind KAMATH , Criswell CHOI , Patrick SMITH , Erik SCHER , Jiang LI
发明人： Arvind KAMATH , Criswell CHOI , Patrick SMITH , Erik SCHER , Jiang LI
IPC分类号： H01G4/10 , H01Q1/22 , H01G4/005 , H01G4/30
CPC分类号： H01G4/40 , H01G4/002 , H01G4/005 , H01G4/008 , H01G4/01 , H01G4/10 , H01G4/1209 , H01G4/224 , H01G4/30 , H01G4/306 , H01G4/33 , H01G13/00 , H01L23/66 , H01L27/016 , H01L28/60 , H01L2223/6677 , H01Q1/22 , H01Q1/2283 , H01Q1/38 , Y10T29/43 , Y10T29/435 , Y10T29/49002 , Y10T29/49016
摘要： High precision capacitors and methods for forming the same utilizing a precise and highly conformal deposition process for depositing an insulating layer on substrates of various roughness and composition. The method generally comprises the steps of depositing a first insulating layer on a metal substrate by atomic layer deposition (ALD); (b) forming a first capacitor electrode on the first insulating layer; and (c) forming a second insulating layer on the first insulating layer and on or adjacent to the first capacitor electrode. Embodiments provide an improved deposition process that produces a highly conformal insulating layer on a wide range of substrates, and thereby, an improved capacitor.
摘要翻译：高精度电容器及其形成方法采用精确且高度保形的沉积工艺，用于在各种粗糙度和组成的基底上沉积绝缘层。该方法通常包括以下步骤：通过原子层沉积（ALD）在金属衬底上沉积第一绝缘层; （b）在所述第一绝缘层上形成第一电容器电极; 和（c）在所述第一绝缘层上形成第二绝缘层，并且在所述第一电容器电极上或与所述第一电容器电极相邻。实施例提供了一种改进的沉积工艺，其在宽范围的衬底上产生高度保形的绝缘层，从而产生改进的电容器。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式