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1. 发明授权

US06407637B1 Differential current mirror and method 有权
标题翻译：差分电流镜和方法
公开(公告)号：US06407637B1
公开(公告)日：2002-06-18
申请号：US09569964
申请日：2000-05-12
申请人： Abhijit M. Phanse , Michael X. Maida
发明人： Abhijit M. Phanse , Michael X. Maida
IPC分类号： H03F345
CPC分类号： H03F3/45183 , H03F3/45632 , H03F2203/45344 , H03F2203/45571 , H03F2203/45702
摘要： There is disclosed a differential current mirror system and method for providing differential output current signals that are proportional to differential input current signals in which common mode current signals are rejected. The system comprises a pair of diode connected transistors and a differential amplifier. The pair of diode connected transistors comprises a first and second transistor coupled together. The differential amplifier comprises a third and fourth transistor coupled together in a differential amplifier configuration. The gate of the third transistor receives a first input current signal from the drain of the first transistor and the gate of the fourth transistor receives a second input current signal from the drain of the second transistor.
摘要翻译：公开了一种差分电流镜系统和方法，用于提供差分输出电流信号，其中差分输入电流信号与共模电流信号被拒绝。该系统包括一对二极管连接的晶体管和差分放大器。一对二极管连接的晶体管包括耦合在一起的第一和第二晶体管。差分放大器包括以差分放大器配置耦合在一起的第三和第四晶体管。第三晶体管的栅极接收来自第一晶体管的漏极的第一输入电流信号，第四晶体管的栅极从第二晶体管的漏极接收第二输入电流信号。

2. 发明授权

US06590454B2 System and method for current splitting for variable gain control 有权
公开(公告)号：US06590454B2
公开(公告)日：2003-07-08
申请号：US10100433
申请日：2002-03-18
申请人： Abhijit M. Phanse , Michael X. Maida
发明人： Abhijit M. Phanse , Michael X. Maida
IPC分类号： H03F345
CPC分类号： H03F3/345 , H03F1/301 , H03F3/45713 , H03F2200/456 , H03G1/00
摘要： There is disclosed a system and method for current splitting for variable gain control. The system comprises a current splitting circuit that splits an input current into a first current portion that is proportional to a first scale factor that has a value between zero and one. The remainder of the current is a second current portion that is proportional to a second scale factor that has a value that is equal to one minus the first scale factor. The current splitting circuit comprises a differential current mirror circuit that rejects common mode input current signals.

3. 发明授权

US06373338B1 Differential current mirror system and methods 有权
标题翻译：差分电流镜系统及方法
公开(公告)号：US06373338B1
公开(公告)日：2002-04-16
申请号：US09569958
申请日：2000-05-12
申请人： Abhijit M. Phanse , Michael X. Maida
发明人： Abhijit M. Phanse , Michael X. Maida
IPC分类号： H03F345
CPC分类号： H03F3/45183 , H03F2203/45344 , H03F2203/45544
摘要： There is disclosed a differential current mirror system and method for providing differential output current signals that are proportional to differential input current signals in which common mode current signals are rejected. The system comprises a pair of diode connected transistors and a differential amplifier. The pair of diode connected transistors comprises a first and second transistor coupled together. The differential amplifier comprises a third and fourth transistor coupled together in a differential amplifier configuration. The gate of the third transistor receives a first input current signal from the drain of the first transistor and the gate of the fourth transistor receives a second input current signal from the drain of the second transistor.
摘要翻译：公开了一种差分电流镜系统和方法，用于提供差分输出电流信号，其中差分输入电流信号与共模电流信号被拒绝。该系统包括一对二极管连接的晶体管和差分放大器。一对二极管连接的晶体管包括耦合在一起的第一和第二晶体管。差分放大器包括以差分放大器配置耦合在一起的第三和第四晶体管。第三晶体管的栅极接收来自第一晶体管的漏极的第一输入电流信号，第四晶体管的栅极从第二晶体管的漏极接收第二输入电流信号。

4. 发明授权

US06359511B1 System and method for current splitting for variable gain control 有权
标题翻译：用于可变增益控制的电流分配的系统和方法
公开(公告)号：US06359511B1
公开(公告)日：2002-03-19
申请号：US09570082
申请日：2000-05-12
申请人： Abhijit M. Phanse , Michael X. Maida
发明人： Abhijit M. Phanse , Michael X. Maida
IPC分类号： H03F345
CPC分类号： H03F3/345 , H03F1/301 , H03F3/45713 , H03F2200/456 , H03G1/00
摘要： There is disclosed a system and method for current splitting for variable gain control. The system comprises a current splitting circuit that splits an input current into a first current portion that is proportional to a first scale factor that has a value between zero and one. The remainder of the current is a second current portion that is proportional to a second scale factor that has a value that is equal to one minus the first scale factor. The current splitting circuit comprises a differential current mirror circuit that rejects common mode input current signals.
摘要翻译：公开了用于可变增益控制的电流分配的系统和方法。该系统包括电流分流电路，其将输入电流分成与第一比例因子成比例的第一电流部分，该第一比例因子具有在零和一之间的值。电流的剩余部分是与具有等于1的值减去第一比例因子的第二比例因子成比例的第二电流部分。电流分流电路包括抑制共模输入电流信号的差分电流镜电路。

5. 发明授权

US06642793B2 Differential current mirror system and method 有权
公开(公告)号：US06642793B2
公开(公告)日：2003-11-04
申请号：US10122770
申请日：2002-04-11
申请人： Abhijit M. Phanse , Michael X. Maida
发明人： Abhijit M. Phanse , Michael X. Maida
IPC分类号： H03F345
CPC分类号： H03F3/45183 , H03F2203/45344 , H03F2203/45544
摘要： There is disclosed a differential current mirror system and method for providing differential output current signals that are proportional to differential input current signals in which common mode current signals are rejected. The system comprises a pair of diode connected transistors and a differential amplifier. The pair of diode connected transistors comprises a first and second transistor coupled together. The differential amplifier comprises a third and fourth transistor coupled together in a differential amplifier configuration. The gate of the third transistor receives a first input current signal from the drain of the first transistor and the gate of the fourth transistor receives a second input current signal from the drain of the second transistor.

6. 发明授权

US06486735B1 Adaptive equalizer filter with variable gain control 有权
标题翻译：具有可变增益控制的自适应均衡器滤波器
公开(公告)号：US06486735B1
公开(公告)日：2002-11-26
申请号：US09570330
申请日：2000-05-12
申请人： Abhijit M. Phanse , Michael X. Maida
发明人： Abhijit M. Phanse , Michael X. Maida
IPC分类号： H03F345
CPC分类号： H03G1/0023
摘要： There is disclosed an adaptive equalizer filter with a current splitting system for variable gain control. The system comprises a current splitting circuit that splits an input current into a first current portion that is proportional to a first scale factor that has a value between zero and one. The remainder of the current is a second current portion that is proportional to a second scale factor that has a value that is equal to one minus the first scale factor. The current splitting circuit comprises a differential current mirror circuit that rejects common mode input current signals.
摘要翻译：公开了一种具有用于可变增益控制的电流分配系统的自适应均衡器滤波器。该系统包括电流分流电路，其将输入电流分成与第一比例因子成比例的第一电流部分，该第一比例因子具有在零和一之间的值。电流的剩余部分是与具有等于1的值减去第一比例因子的第二比例因子成比例的第二电流部分。电流分流电路包括抑制共模输入电流信号的差分电流镜电路。

7. 发明授权

US06798827B1 System and method for correcting offsets in an analog receiver front end 有权
标题翻译：用于校正模拟接收机前端偏移量的系统和方法
公开(公告)号：US06798827B1
公开(公告)日：2004-09-28
申请号：US09569828
申请日：2000-05-12
申请人： Abhijit M. Phanse
发明人： Abhijit M. Phanse
IPC分类号： H04B138
CPC分类号： H04L25/0296 , H04B3/23
摘要： A method corrects an input DC offset signal generated in front-end analog signal processing circuitry in a transceiver capable of operating in a high frequency local area network. An output signal from the front-end analog signal processing circuitry of the transceiver is received in a DC offset correction controller. A DC offset signal component in the output signal from the front-end analog signal processing circuitry due to an accrued DC offset is detected. A DC offset correction signal is sent from the DC offset correction controller to an adjustable biasing circuit coupled to a differential amplifier of a receiver line driver of the transceiver to modify the DC offset signal component.
摘要翻译：一种方法校正在能够在高频局域网中操作的收发机中的前端模拟信号处理电路中产生的输入DC偏移信号。在DC偏移校正控制器中接收来自收发器的前端模拟信号处理电路的输出信号。检测来自前端模拟信号处理电路的输出信号中由于累积DC偏移引起的DC偏移信号分量。 DC偏移校正信号从DC偏移校正控制器发送到可调偏置电路，该可调偏置电路耦合到收发器的接收器线路驱动器的差分放大器，以修改DC偏移信号分量。

8. 发明授权

US08447000B2 Transceiver system with analog and digital signal echo cancellation having adaptably adjustable filter characteristics 有权
标题翻译：具有模拟和数字信号回波消除的收发器系统具有可调节的滤波器特性
公开(公告)号：US08447000B2
公开(公告)日：2013-05-21
申请号：US12319985
申请日：2009-01-12
申请人： Tulsi Manickam , Peter J. Sallaway , Sreen A. Raghavan , Abhijit M. Phanse , James B. Wieser
发明人： Tulsi Manickam , Peter J. Sallaway , Sreen A. Raghavan , Abhijit M. Phanse , James B. Wieser
IPC分类号： H04B1/10 , H04B15/00
CPC分类号： H04L25/03057 , H04L25/03254
摘要： A receiver that easily receives signals from transmission channels having long cable lengths is presented. The receiver includes an analog pre-filter that removes distortions and intersymbol interference from a predetermined transmission channel. The analog pre-filter is coupled with a digital receiver that provides digital equalization. The combination of analog equalization with digital equalization allows for simplified digital equalization while retaining the versatility of digital signal processing.
摘要翻译：提出了一种容易从具有长电缆长度的传输通道接收信号的接收机。接收机包括一个模拟预滤波器，用于消除来自预定传输信道的失真和符号间干扰。模拟预滤波器与提供数字均衡的数字接收机耦合。模拟均衡与数字均衡的组合允许简化的数字均衡，同时保持数字信号处理的通用性。

9. 发明授权

US07756228B1 Transceiver system with analog and digital signal echo cancellation having adaptably adjustable filter characteristics 有权
标题翻译：具有模拟和数字信号回波消除的收发器系统具有可调节的滤波器特性
公开(公告)号：US07756228B1
公开(公告)日：2010-07-13
申请号：US11542532
申请日：2006-10-02
申请人： Tulsi Manickam , Peter J. Sallaway , Sreen A. Raghavan , Abhijit M. Phanse , James B. Wieser
发明人： Tulsi Manickam , Peter J. Sallaway , Sreen A. Raghavan , Abhijit M. Phanse , James B. Wieser
IPC分类号： H04B1/10 , H04B15/00
CPC分类号： H04L25/03057 , H04L25/03254
摘要： Analog echo-cancelling circuitry (611 and 627) operates on an input analog signal that includes an echo of an output signal, or on an analog signal generated from the input signal, to produce an analog signal with reduced echo. An analog-to-digital converter (210) converts the echo-reduced analog signal, or an analog signal generated therefrom, into a digital signal. Digital echo-cancelling circuitry (615 and 621) operates on the digital signal, or on a digital signal generated therefrom, to produce a digital signal with further reduced echo. An output decoder (605) decodes the echo-reduced digital signal, or a digital signal generated therefrom, into a stream of symbols. The echo-filtering characteristics of both echo-cancelling circuitries are typically adaptively adjusted during generation of the symbol stream. The analog echo-filtering characteristics may be adapted in response to information provided by operating on the echo-reduced digital signal or on a digital signal generated therefrom.
摘要翻译：模拟回波消除电路（611和627）对包括输出信号的回波或输入信号产生的模拟信号的输入模拟信号进行操作，以产生具有降低回波的模拟信号。模数转换器（210）将回波减小的模拟信号或由其产生的模拟信号转换为数字信号。数字回波消除电路（615和621）对数字信号或由其产生的数字信号进行操作以产生具有进一步降低的回波的数字信号。输出解码器（605）将回波减小的数字信号或由其产生的数字信号解码成符号流。两个回波消除电路的回波滤波特性通常在符号流生成期间进行自适应调整。模拟回波滤波特性可以响应于通过对回波减小的数字信号或由其产生的数字信号进行操作而提供的信息而被适配。

10. 发明授权

US07457386B1 System and method for cancelling signal echoes in a full-duplex transceiver front end 有权
标题翻译：用于在全双工收发器前端消除信号回波的系统和方法
公开(公告)号：US07457386B1
公开(公告)日：2008-11-25
申请号：US11602484
申请日：2006-11-20
申请人： Abhijit M. Phanse
发明人： Abhijit M. Phanse
IPC分类号： H04B1/10
CPC分类号： H04B3/23
摘要： There is disclosed an echo canceller circuit for use in a full duplex transceiver of the type comprising a line driver capable of sending analog transmit signals through a cable and comprising a line receiver capable of receiving analog receive signals from the cable. An echo canceller impedance model circuit is coupled to an output of the line driver and is coupled to an input of the line receiver. The echo canceller impedance model circuit generates an echo canceller current that is equal in magnitude and opposite in phase to a current that represents signal echoes that are present in the analog receive signals. The echo canceller impedance model circuit has a variable impedance for generating the echo canceller current. The variable impedance has at least one variable resistor and at least one variable capacitor. The values of resistance and capacitance in the echo canceller impedance model circuit are varied in response to control signals from a echo canceller control circuit to compensate for and cancel signal echoes.
摘要翻译：公开了一种用于全双工收发器的回波消除器电路，其包括能够通过电缆发送模拟发射信号的线路驱动器并且包括能够从电缆接收模拟接收信号的线路接收器的线路接收机。回波消除器阻抗模型电路耦合到线路驱动器的输出端并耦合到线路接收机的输入。回波消除器阻抗模型电路产生质量相等并且与表示模拟接收信号中存在的信号回波的电流相位相反的回波消除器电流。回波消除器阻抗模型电路具有用于产生回波消除器电流的可变阻抗。可变阻抗具有至少一个可变电阻和至少一个可变电容。回波消除器阻抗模型电路中的电阻和电容值响应于来自回波消除器控制电路的控制信号而变化，以补偿和消除信号回波。

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