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1. 发明授权

US08183846B2 Method and apparatus for controlling a DC/DC converter 有权
标题翻译：用于控制DC / DC转换器的方法和装置
公开(公告)号：US08183846B2
公开(公告)日：2012-05-22
申请号：US12723867
申请日：2010-03-15
申请人： Runsheng He , Zhipei Chi
发明人： Runsheng He , Zhipei Chi
IPC分类号： G05F1/40
CPC分类号： H02M3/1584 , H02M2001/0032 , Y02B70/16
摘要： A control system including a DC/DC converter and a control module. The DC/DC converter includes a first inductor and a second inductor. The DC/DC converter is configured to i) receive a first DC voltage and ii) output a second DC voltage. The control module is configured to, during a first operation mode, charge the first inductor while discharging the second inductor, and, during a second operation mode, one of i) charge the first inductor while charging the second inductor and ii) discharge the first inductor while discharging the second inductor. The control module is further configured to initiate the second operation mode in response to detecting a current transient in the DC/DC converter.
摘要翻译：一种包括DC / DC转换器和控制模块的控制系统。 DC / DC转换器包括第一电感器和第二电感器。 DC / DC转换器被配置为i）接收第一DC电压并且ii）输出第二DC电压。控制模块被配置为在第一操作模式期间对第一电感器进行充电，同时放电第二电感器，并且在第二操作模式期间，i）对第一电感器充电，同时为第二电感器充电，以及ii）同时放电第二电感器。控制模块还被配置为响应于检测DC / DC转换器中的电流瞬变而启动第二操作模式。

2. 发明授权

US07957259B1 Mode detection for DVB receiver 有权
标题翻译： DVB接收机的模式检测
公开(公告)号：US07957259B1
公开(公告)日：2011-06-07
申请号：US11894864
申请日：2007-08-21
申请人： Jing Fang , Runsheng He , Zhipei Chi
发明人： Jing Fang , Runsheng He , Zhipei Chi
IPC分类号： H04J11/00
CPC分类号： H04L27/2666
摘要： Systems, apparatus and methods are provided for detecting the mode of a received OFDM signal. A received signal may be correlated with one or more time-delayed version of itself resulting in a set of correlation signals. Each correlation signal may be analyzed for one or more characteristics that can be used to determine the symbol length of the received signal. In order to minimize the number of correlations performed, one or more correlations can be used with varying symbol lengths and a fixed guard interval length. The correlation signals can be processed by filters, and the characteristics of the filtered correlation signals can be analyzed to determine the guard interval length of the received signal. In addition to detecting symbol length, the present invention can be used to detect receiver impairment and perform any appropriate compensations.
摘要翻译：提供了用于检测接收的OFDM信号的模式的系统，装置和方法。接收到的信号可以与自身的一个或多个时间延迟版本相关，从而产生一组相关信号。可以分析每个相关信号的一个或多个特性，其可用于确定接收信号的符号长度。为了最小化执行的相关数量，可以使用具有变化的符号长度和固定的保护间隔长度的一个或多个相关性。可以通过滤波器来处理相关信号，并且可以分析滤波的相关信号的特性，以确定接收信号的保护间隔长度。除了检测符号长度之外，本发明可以用于检测接收机损伤并执行任何适当的补偿。

3. 发明申请

US20070176585A1 Closed-loop digital control system for a DC/DC converter 有权
标题翻译：用于DC / DC转换器的闭环数字控制系统
公开(公告)号：US20070176585A1
公开(公告)日：2007-08-02
申请号：US11710384
申请日：2007-02-23
申请人： Runsheng He , Zhipei Chi
发明人： Runsheng He , Zhipei Chi
IPC分类号： G05F1/00
CPC分类号： H02M3/1584 , H02M2001/0032 , Y02B70/16
摘要： A control system comprises a DC/DC converter that includes first and second inductances, that receives a first DC voltage and that generates a second DC voltage. A control module selectively charges or discharges the first inductance while discharging or charging the second inductance during a first mode and one of charges both of the first and second inductances or discharges both of the first and second inductances during a second mode.
摘要翻译：控制系统包括DC / DC转换器，其包括第一和第二电感，其接收第一DC电压并产生第二DC电压。在第一模式期间，控制模块选择性地对第一电感充电或放电，同时在第二模式期间对第一和第二电感进行充电或者对第一和第二电感进行放电。

4. 发明授权

US08035446B1 Natural sampling for a digital Class-D power amplifier 有权
标题翻译：数字D类功率放大器的自然采样
公开(公告)号：US08035446B1
公开(公告)日：2011-10-11
申请号：US11109372
申请日：2005-04-19
申请人： Zhipei Chi , Peiqi Xuan , Runsheng He
发明人： Zhipei Chi , Peiqi Xuan , Runsheng He
IPC分类号： H03F1/26 , H03F1/30
CPC分类号： H03F3/2173
摘要： A digital signal processor includes an up-sampling module that samples an input signal and generates up-sampling points. A natural sampling module includes a reference signal generation module that generates a reference signal. A crossing point detection module receives the up-sampling points and the reference signal and uses interpolation to detect intersection points of the input signal and the reference signal. The crossing point detection module determines values of the input signal at first and second evaluation times. The crossing point detection module estimates a current intersection point of the input signal and the reference signal as an intersection of the reference signal and a line that extends between first and second points on the input signal that correspond with the first and second evaluation times. A frequency of the reference signal is variable and a current switching period of the reference signal is not equal to a previous switching period.
摘要翻译：数字信号处理器包括上采样模块，其对输入信号进行采样并产生上采样点。自然采样模块包括产生参考信号的参考信号产生模块。交叉点检测模块接收上采样点和参考信号，并使用内插来检测输入信号和参考信号的交点。交叉点检测模块在第一和第二评估时间确定输入信号的值。交叉点检测模块将输入信号和参考信号的当前交点作为参考信号与在与第一和第二评估时间对应的输入信号上的第一和第二点之间延伸的线的交点进行估计。参考信号的频率是可变的，并且参考信号的电流切换周期不等于先前的切换周期。

5. 发明授权

US08023920B1 Image cancellation in receivers 有权
标题翻译：接收器中的图像消除
公开(公告)号：US08023920B1
公开(公告)日：2011-09-20
申请号：US12718909
申请日：2010-03-05
申请人： Haoli Qian , Xiang Guang Feng , Runsheng He , Zhipei Chi
发明人： Haoli Qian , Xiang Guang Feng , Runsheng He , Zhipei Chi
IPC分类号： H04B1/10
CPC分类号： H04B1/28 , H04B1/0032
摘要： Systems and techniques relating to image cancellation in received communications signals are described. A described technique includes receiving a communications signal including a desired signal and an image signal; generating a leakage tracing signal at a frequency band of the image signal, the leakage tracing signal including a noise signal, a frequency of the leakage tracing signal being within the frequency band of the image signal; and removing the image signal from a signal that is based on the communications signal and the leakage tracing signal to resolve the desired signal, where the removing is based on an addition of the leakage tracing signal to the communications signal. Removing the image signal can include using one or more weights to control one or more filters to resolve the desired signal. The one or more weights can be determined based on the noise signal.
摘要翻译：描述与接收的通信信号中的图像消除有关的系统和技术。所描述的技术包括接收包括期望信号和图像信号的通信信号; 在所述图像信号的频带处产生泄漏跟踪信号，所述泄漏跟踪信号包括噪声信号，所述泄漏跟踪信号的频率在所述图像信号的频带内; 以及从基于所述通信信号和所述泄漏跟踪信号的信号中去除所述图像信号以解决所述期望信号，其中所述去除是基于所述通信信号的所述泄漏跟踪信号的相加。去除图像信号可以包括使用一个或多个权重来控制一个或多个滤波器来解析期望的信号。可以基于噪声信号来确定一个或多个权重。

6. 发明授权

US08711673B1 Mode detection for DVB receiver 失效
标题翻译： DVB接收机的模式检测
公开(公告)号：US08711673B1
公开(公告)日：2014-04-29
申请号：US13113399
申请日：2011-05-23
申请人： Jing Fang , Runsheng He , Zhipei Chi
发明人： Jing Fang , Runsheng He , Zhipei Chi
IPC分类号： H04J11/00
CPC分类号： H04L27/2666
摘要： Systems, apparatus and methods are provided for detecting the mode of a received OFDM signal. A received signal may be correlated with one or more time-delayed version of itself resulting in a set of correlation signals. Each correlation signal may be analyzed for one or more characteristics that can be used to determine the symbol length of the received signal. In order to minimize the number of correlations performed, one or more correlations can be used with varying symbol lengths and a fixed guard interval length. The correlation signals can be processed by filters, and the characteristics of the filtered correlation signals can be analyzed to determine the guard interval length of the received signal. In addition to detecting symbol length, the present invention can be used to detect receiver impairment and perform any appropriate compensations.
摘要翻译：提供了用于检测接收的OFDM信号的模式的系统，装置和方法。接收到的信号可以与自身的一个或多个时间延迟版本相关，从而产生一组相关信号。可以分析每个相关信号的一个或多个特性，其可用于确定接收信号的符号长度。为了最小化执行的相关数量，可以使用具有变化的符号长度和固定的保护间隔长度的一个或多个相关性。可以通过滤波器来处理相关信号，并且可以分析滤波的相关信号的特性以确定接收信号的保护间隔长度。除了检测符号长度之外，本发明可以用于检测接收机损伤并执行任何适当的补偿。

7. 发明授权

US07684778B1 Image cancellation in receivers 失效
标题翻译：接收器中的图像消除
公开(公告)号：US07684778B1
公开(公告)日：2010-03-23
申请号：US11225685
申请日：2005-09-12
申请人： Haoli Qian , Xiang Guang Feng , Runsheng He , Zhipei Chi
发明人： Haoli Qian , Xiang Guang Feng , Runsheng He , Zhipei Chi
IPC分类号： H04B1/10
CPC分类号： H04B1/28 , H04B1/0032
摘要： Systems and techniques relating to image cancellation in received communications signals are described. In one aspect, a received communications signal can include a desired signal and an image signal. A leakage tracing signal can be generated, and the image signal can be removed from the communications signal using the leakage tracing signal mixed with the communications signal. Implementations can include generating a first channel signal and a second channel signal, generating a first filter using the first channel signal and the leakage tracing signal, and generating a second filter using the second channel signal and the leakage tracing signal. Removing the image signal from the communications signal can include filtering the first channel signal using the second filter to obtain a first filtered signal, filtering the second channel signal using the first filter to obtain a second filtered signal, and subtracting the second filtered signal from the first filtered signal.
摘要翻译：描述与接收的通信信号中的图像消除有关的系统和技术。在一个方面，接收的通信信号可以包括期望的信号和图像信号。可以产生泄漏跟踪信号，并且可以使用与通信信号混合的泄漏跟踪信号从通信信号中去除图像信号。实现可以包括产生第一信道信号和第二信道信号，使用第一信道信号和泄漏跟踪信号产生第一滤波器，以及使用第二信道信号和泄漏跟踪信号产生第二滤波器。从通信信号中去除图像信号可以包括使用第二滤波器对第一信道信号进行滤波以获得第一滤波信号，使用第一滤波器对第二信道信号进行滤波以获得第二滤波信号，以及从第第一个滤波信号。

8. 发明申请

US20060013023A1 Closed-loop digital control system for a DC/DC converter 有权
标题翻译：用于DC / DC转换器的闭环数字控制系统
公开(公告)号：US20060013023A1
公开(公告)日：2006-01-19
申请号：US10890491
申请日：2004-07-13
申请人： Runsheng He , Zhipei Chi
发明人： Runsheng He , Zhipei Chi
IPC分类号： H02J1/02
CPC分类号： H02M3/1584 , H02M2001/0032 , Y02B70/16
摘要： A closed-loop control system for a DC/DC converter includes a DC/DC converter that receives a first DC voltage and that generates a second DC voltage. The DC/DC converter includes first and second inductances. A control module receives the second DC voltage and generates at least one control signal to one of charge or discharge the first and second inductances. The control module has first and second modes. During the first mode the control module alternately charges one of the first and second inductances and discharges the other of the first and second inductances. During the second mode the control module one of charges or discharges both of the first and second inductances. The control module initiates the second mode when a transient condition occurs in the DC/DC converter. The transient condition is based on one of the second DC voltage and current through an output capacitance in the DC/DC converter.
摘要翻译：用于DC / DC转换器的闭环控制系统包括接收第一DC电压并产生第二DC电压的DC / DC转换器。 DC / DC转换器包括第一和第二电感。控制模块接收第二直流电压，并产生至少一个控制信号，以充电或放电第一和第二电感。控制模块具有第一和第二模式。在第一模式期间，控制模块交替地对第一和第二电感中的一个进行充电，并且对第一和第二电感中的另一个进行放电。在第二模式期间，控制模块对第一和第二电感进行充电或放电。当DC / DC转换器发生瞬变状态时，控制模块启动第二模式。瞬态条件基于DC / DC转换器中通过输出电容的第二直流电压和电流之一。

9. 发明授权

US07924960B1 Input/output data rate synchronization using first in first out data buffers 有权
标题翻译：使用先进先出的数据缓冲器进行输入/输出数据速率同步
公开(公告)号：US07924960B1
公开(公告)日：2011-04-12
申请号：US12574133
申请日：2009-10-06
申请人： Zhipei Chi , Runsheng He
发明人： Zhipei Chi , Runsheng He
IPC分类号： H04L7/00
CPC分类号： H04L25/05 , H03F3/217 , H03F2200/03 , H03F2200/351
摘要： A system includes a first buffer configured to receive data at a first rate, and output the data at a second rate. A processing module configured to receive the data from the first buffer at the second rate, convert the data into processed data, and output the processed data at a third rate. A second buffer is configured to receive the processed data from the processing module at the third rate, and output the processed data at a fourth rate. The third rate is faster than the fourth rate to avoid a buffer underflow condition in the second buffer. In response to the second buffer reaching a predetermined capacity, the processing module is further configured to enter into a break state in which the processing module temporarily stops both receiving data from the first buffer and outputting the processed data and adjusts the second rate to avoid a buffer overrun condition in the first buffer.
摘要翻译：系统包括被配置为以第一速率接收数据的第一缓冲器，并以第二速率输出数据。一种处理模块，被配置为以第二速率从第一缓冲器接收数据，将数据转换成经处理的数据，并以第三速率输出处理后的数据。第二缓冲器被配置为以第三速率从处理模块接收处理的数据，并以第四速率输出处理的数据。第三速率比第四速率快，以避免第二缓冲器中的缓冲器下溢条件。响应于第二缓冲器达到预定容量，处理模块还被配置为进入中断状态，其中处理模块暂时停止从第一缓冲器接收数据并输出处理后的数据并调整第二速率以避免缓冲区溢出条件在第一个缓冲区。

10. 发明申请

US20100171478A1 CLOSED-LOOP DIGITAL CONTROL SYSTEM FOR A DC/DC CONVERTER 有权
标题翻译：用于DC / DC转换器的闭环数字控制系统
公开(公告)号：US20100171478A1
公开(公告)日：2010-07-08
申请号：US12723867
申请日：2010-03-15
申请人： Runsheng He , Zhipei Chi
发明人： Runsheng He , Zhipei Chi
IPC分类号： G05F1/10
CPC分类号： H02M3/1584 , H02M2001/0032 , Y02B70/16
摘要： A control system comprises a DC/DC converter that includes first and second inductances, that receives a first DC voltage and that generates a second DC voltage. A control module selectively charges or discharges the first inductance while discharging or charging the second inductance during a first mode and one of charges both of the first and second inductances or discharges both of the first and second inductances during a second mode.
摘要翻译：控制系统包括DC / DC转换器，其包括第一和第二电感，其接收第一DC电压并产生第二DC电压。在第一模式期间，控制模块选择性地对第一电感充电或放电，同时在第二模式期间对第一和第二电感进行充电或者对第一和第二电感进行放电。

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