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    • 1. 发明授权
    • Method of forming shallow trench
    • 形成浅沟槽的方法
    • US06514817B1
    • 2003-02-04
    • US10116881
    • 2002-04-05
    • Nien-Yu TsaiYung-Ching Wang
    • Nien-Yu TsaiYung-Ching Wang
    • H02L218242
    • H01L27/1087H01L21/76224H01L27/10829H01L29/66181
    • A method of forming a shallow trench in a specific region located between two adjacent deep trench capacitor constructions on a semiconductor substrate, each the deep trench capacitor construction having a collar construction and a conductor construction is provided. The method of forming a shallow trench includes steps of (a) defining a mask by forming a mask layer on the semiconductor substrate which has the deep trench capacitor constructions, (b) performing a first etching process with respect to the regions, which is not covered by the mask, so as to form a first depth trench, in which the first etching process has a relatively high selectivity ratio of the conductor construction relative to the mask, and (c) performing a second etching process with respect to the first depth trench so as to form a second depth trench, in which the second etching process has a selectivity ratio of the conductor construction relative to the collar construction substantially close to 1.
    • 提供了一种在半导体衬底上位于两个相邻的深沟槽电容器结构之间的特定区域中形成浅沟槽的方法,每个深沟槽电容器结构具有套环结构和导体结构。 形成浅沟槽的方法包括以下步骤:(a)通过在具有深沟槽电容器结构的半导体衬底上形成掩模层来限定掩模,(b)相对于不是的区域执行第一蚀刻工艺 由掩模覆盖,以便形成第一深度沟槽,其中第一蚀刻工艺相对于掩模具有相对高的导体结构选择率,以及(c)相对于第一深度执行第二蚀刻工艺 沟槽,以形成第二深度沟槽,其中第二蚀刻工艺具有相对于套环结构的导体结构的选择比基本上接近1。
    • 4. 发明授权
    • Method of forming contact plugs
    • 形成接触塞的方法
    • US06548394B1
    • 2003-04-15
    • US10061646
    • 2002-02-01
    • Hsin-Tang PengYung-Ching Wang
    • Hsin-Tang PengYung-Ching Wang
    • H01L214763
    • H01L27/11521H01L21/76895H01L21/76897H01L27/10888H01L27/115Y10S257/906
    • A method of forming contact plugs is used on a semiconductor substrate with at least four adjacent gate conducting structures, wherein a second gate conducting structure and a third gate conducting structure are formed within an active area. First, the gap between the second gate conducting structure and the third gate conducting structure is filled with a first conductive layer. Then, an inter-layered dielectric (ILD) layer with a planarized surface is formed on the entire surface of the substrate to cover the first conductive layer. Next, a bitline contact hole is formed in the ILD layer to expose the first conductive layer. Thereafter, the bitline contact hole is filled with a second conductive layer to serve as a bitline contact plug.
    • 在具有至少四个相邻的栅极导电结构的半导体衬底上使用形成接触插塞的方法,其中在有源区域内形成第二栅极导电结构和第三栅极导电结构。 首先,用第一导电层填充第二栅极导电结构和第三栅极导电结构之间的间隙。 然后,在基板的整个表面上形成具有平坦化表面的层间电介质层(ILD)层以覆盖第一导电层。 接下来,在ILD层中形成位线接触孔以露出第一导电层。 此后,位线接触孔填充有用作位线接触插塞的第二导电层。
    • 6. 发明授权
    • Method of forming contact hole
    • 形成接触孔的方法
    • US06903022B2
    • 2005-06-07
    • US10262939
    • 2002-10-03
    • Hsin-Tang PengYung-Ching WangTeng-Chun Yang
    • Hsin-Tang PengYung-Ching WangTeng-Chun Yang
    • H01L21/60H01L21/8239H01L21/302
    • H01L21/76897H01L27/1052
    • A method of forming contact holes. A dielectric liner is comformally formed on a substrate, parts of the dielectric liner between the second and the third conducting structure are removed, a conductive liner is conformally formed on the substrate, and parts of the metal layer are removed to leave parts thereof between the second and the third conducting structure. An ILD layer is then formed on the entire surface of the substrate, and a patterned photoresist layer is formed on the ILD layer. Finally, the ILD layer is etched using the patterned photoresist layer as a mask to form a first contact hole, a second contact hole, and a third contact hole in the ILD layer at the same time.
    • 一种形成接触孔的方法。 电介质衬垫被合成地形成在衬底上,去除第二和第三导电结构之间的电介质衬垫的部分,导电衬垫保形地形成在衬底上,并且去除金属层的一部分以将其部分留在 第二和第三导电结构。 然后在衬底的整个表面上形成ILD层,并且在ILD层上形成图案化的光致抗蚀剂层。 最后,使用图案化的光致抗蚀剂层作为掩模来蚀刻ILD层,以在ILD层中同时形成第一接触孔,第二接触孔和第三接触孔。