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1. 发明授权

US08427202B2 Nonvolatile logic circuit and a method for operating the same 有权
标题翻译：非易失逻辑电路及其操作方法
公开(公告)号：US08427202B2
公开(公告)日：2013-04-23
申请号：US13305459
申请日：2011-11-28
申请人： Yukihiro Kaneko
发明人： Yukihiro Kaneko
IPC分类号： H03K19/173 , G11C11/22
CPC分类号： H03K19/17796 , H03K19/17748
摘要： A nonvolatile logic circuit includes logic configuration electrodes and input electrodes. The nonvolatile logic circuit is programmable to any one of the logics between the input signals selected from logical conjunction (AND), logical disjunction (OR), logical non-conjunction (NAND), logical non-disjunction (NOR), and logical exclusive disjunction (XOR) by changing applied voltages to the logic configuration electrodes.
摘要翻译：非易失性逻辑电路包括逻辑配置电极和输入电极。非逻辑逻辑电路可编程为从逻辑连接（AND），逻辑分离（OR），逻辑非连接（NAND），逻辑非分离（NOR）和逻辑独占分离（NOR）之间选择的输入信号之间的任何逻辑电路（XOR），通过将施加的电压改变为逻辑配置电极。

2. 发明申请

US20110309860A1 NONVOLATILE LOGIC CIRCUIT AND A METHOD FOR OPERATING THE SAME AS AN EXCLUSIVE-OR (XOR) CIRCUIT 有权
标题翻译：非线性逻辑电路和用于将其作为独占（异或）电路操作的方法
公开(公告)号：US20110309860A1
公开(公告)日：2011-12-22
申请号：US13222782
申请日：2011-08-31
申请人： Yukihiro KANEKO
发明人： Yukihiro KANEKO
IPC分类号： H03K19/173
CPC分类号： H03K19/21 , G11C11/22 , H01L27/101 , H01L27/1159
摘要： A non-volatile logic circuit includes a control electrode, a ferroelectric layer disposed on the control electrode, a semiconductor layer disposed on the ferroelectric layer, a power electrode and an output electrode disposed on the semiconductor layer, and first to fourth input electrodes disposed on the semiconductor layer. The first and second input electrodes receive first and second inputs, respectively. The third and fourth input electrodes receive inversion signals of the second and first input signal, respectively. A resistance value of the semiconductor layer between the power electrode and the output electrode varies according to the first input signal and the second input signal so that an exclusive-OR signal of the first and second input signals is output from the output electrode.
摘要翻译：非易失性逻辑电路包括控制电极，设置在控制电极上的铁电层，设置在强电介质层上的半导体层，设置在半导体层上的电力电极和输出电极以及设置在半导体层上的第一至第四输入电极半导体层。第一和第二输入电极分别接收第一和第二输入。第三和第四输入电极分别接收第二和第一输入信号的反相信号。电源电极和输出电极之间的半导体层的电阻值根据第一输入信号和第二输入信号而变化，从而从输出电极输出第一和第二输入信号的异或信号。

3. 发明申请

US20110309858A1 NON-VOLATILE LOGIC CIRCUIT AND A METHOD FOR OPERATING THE SAME 有权
标题翻译：非挥发性逻辑电路及其操作方法
公开(公告)号：US20110309858A1
公开(公告)日：2011-12-22
申请号：US13220222
申请日：2011-08-29
申请人： Yukihiro KANEKO
发明人： Yukihiro KANEKO
IPC分类号： H03K19/185
CPC分类号： H01L27/10 , G11C11/22 , H01L27/101 , H01L27/11502
摘要： In a non-volatile logic circuit, a first input electrode and a second input electrode are formed on a semiconductor layer and interposed between an electric current source electrode and an output electrode in a plan view. The first input electrode is next to the second input electrode along the a direction orthogonal to the direction between the electric current source electrode and the output electrode. A method of operating the non-volatile logic circuit includes a step of writing one state selected from four states by applying voltages to the first input electrode and the second input electrode, respectively, and a step of measuring current generated by applying the voltage between the electric current power electrode and the output electrode to determine on the basis of the current, which of the high or low resistant state the non-volatile logic circuit has.
摘要翻译：在非易失性逻辑电路中，第一输入电极和第二输入电极形成在半导体层上并且在平面图中介于电流源电极和输出电极之间。第一输入电极沿着与电流源电极和输出电极之间的方向正交的方向与第二输入电极相邻。一种操作非易失性逻辑电路的方法包括分别通过向第一输入电极和第二输入电极施加电压来写入从四种状态中选出的一种状态的步骤，以及测量通过施加电压而产生的电流的步骤电流功率电极和输出电极根据电流来确定非易失性逻辑电路具有哪些高或低电阻状态。

4. 发明申请

US20110299566A1 PYROELECTRIC TEMPERATURE SENSOR AND A METHOD FOR MEASURING A TEMPERATURE WITH THE PYROELECTRIC TEMPERATURE SENSOR 有权
标题翻译：光伏温度传感器和用于测量温度传感器的方法
公开(公告)号：US20110299566A1
公开(公告)日：2011-12-08
申请号：US13207940
申请日：2011-08-11
申请人： Michihito Ueda , Hiroyuki Tanaka , Yukihiro Kaneko , Eiji Fujii
发明人： Michihito Ueda , Hiroyuki Tanaka , Yukihiro Kaneko , Eiji Fujii
IPC分类号： G01K7/36
CPC分类号： H01L37/02 , G01K7/36
摘要： A temperature sensor includes first and second lower electrodes, a ferroelectric layer having polarization, a semiconductor layer; and first to third upper electrodes. The second upper electrode is interposed between the first upper electrode and the third upper electrode in a plan view. The semiconductor layer includes a first channel disposed between the first upper electrode and the second upper electrode, and a second channel disposed between the second upper electrode and the third upper electrode. The ferroelectric layer includes a first ferroelectric part disposed below the first channel and a second ferroelectric part disposed below the second channel. A polarization direction of the first ferroelectric part is opposite to a polarization direction of the second first ferroelectric part. The temperature is calculated based on the output voltage from the second upper electrode and the voltage applied to the first upper electrode.
摘要翻译：温度传感器包括第一和第二下部电极，具有极化的铁电体层，半导体层; 和第一至第三上电极。第二上电极在平面图中插入在第一上电极和第三上电极之间。半导体层包括设置在第一上电极和第二上电极之间的第一通道和设置在第二上电极和第三上电极之间的第二通道。铁电层包括设置在第一通道下方的第一铁电体部分和设置在第二通道下方的第二铁电体部分。第一铁电体部的偏振方向与第二第一强电介质部的偏振方向相反。基于来自第二上电极的输出电压和施加到第一上电极的电压来计算温度。

5. 发明申请

US20080251816A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20080251816A1
公开(公告)日：2008-10-16
申请号：US12033481
申请日：2008-02-19
申请人： Hiroyuki Tanaka , Yukihiro Kaneko , Yoshihisa Kato
发明人： Hiroyuki Tanaka , Yukihiro Kaneko , Yoshihisa Kato
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L21/28291 , H01L27/11502 , H01L29/6684 , H01L29/78391
摘要： A semiconductor memory device is composed of a field effect transistor using the interface between a ferroelectric film and a semiconductor film as the channel and including a gate electrode to which a voltage for controlling the polarization state of the ferroelectric film is applied and source/drain electrodes provided on both ends of the channel to detect a current flowing in the channel in accordance with the polarization state. The semiconductor film is made of a material having a spontaneous polarization and the direction of the spontaneous polarization is parallel with the interface between the ferroelectric film and the semiconductor film.
摘要翻译：半导体存储器件由使用铁电体膜和半导体膜之间的界面作为沟道的场效应晶体管构成，并且包括施加用于控制强电介质膜的极化状态的电压的栅电极和源极/漏极设置在通道的两端，以根据偏振状态检测在通道中流动的电流。半导体膜由具有自发极化的材料制成，并且自发极化的方向与铁电体膜和半导体膜之间的界面平行。

6. 发明申请

US20070148585A1 Hyperbranched polymer, production method therefor and resist composition containing hyperbranched polymer 审中-公开
标题翻译：超支化聚合物，其制备方法和含有超支化聚合物的抗蚀剂组合物
公开(公告)号：US20070148585A1
公开(公告)日：2007-06-28
申请号：US11473348
申请日：2006-06-22
申请人： Yukihiro Kaneko , Kaoru Suzuki , Minoru Tamura , Yoshiyasu Kubo
发明人： Yukihiro Kaneko , Kaoru Suzuki , Minoru Tamura , Yoshiyasu Kubo
IPC分类号： G03C1/00
CPC分类号： C08F212/14 , G03F7/0392 , G03F7/0395
摘要： The present invention provides a hyperbranched polymer suitable as a polymer material for nanofabrication, in particular, photolithography. The hyperbranched polymer of the present invention is characterized by having a core portion prepared by a living radical polymerization of chloromethyl styrene or the like, and an acid decomposition group such as p-tert-butoxy styrene, which is linked to the core portion and present at the end of a molecule of the polymer.
摘要翻译：本发明提供了一种适用于纳米加工的高分子材料的超支化聚合物，特别是光刻法。本发明的超支化聚合物的特征在于具有通过氯甲基苯乙烯等的活性自由基聚合制备的核心部分和与核心部分连接并存在的酸分解基团如对叔丁氧基苯乙烯在聚合物分子的末端。

7. 发明授权

US06567616B2 Temporary retaining structure for light projecting or receiving devices of AF apparatuses 失效
公开(公告)号：US06567616B2
公开(公告)日：2003-05-20
申请号：US10109321
申请日：2002-03-27
申请人： Yukihiro Kaneko , Mitsuo Manabe
发明人： Yukihiro Kaneko , Mitsuo Manabe
IPC分类号： G03B1336
CPC分类号： G03B13/00
摘要： In a camera provided with an instrument supporting frame, with which a light projecting device or a light receiving device of an automatic focusing apparatus are combined at a predetermined position, a retaining piece, which is capable of elastically pushing and holding the light projecting device or the light receiving device at the predetermined position, is formed through integral molding together with the instrument supporting frame. The device is held by the retaining piece at the predetermined position and is adhered in this state to the instrument supporting frame by use of an adhesive agent.

8. 发明授权

US4623992A Operating panel for electronic audio equipment 失效
标题翻译：电子音响设备操作面板
公开(公告)号：US4623992A
公开(公告)日：1986-11-18
申请号：US558742
申请日：1983-12-06
申请人： Masanori Kurosaki , Yoshio Aoyagi , Yoshiharu Ueki , Yukihiro Kaneko , Minoru Motohashi , Shozaburo Sakaguchi , Manabu Sawaki
发明人： Masanori Kurosaki , Yoshio Aoyagi , Yoshiharu Ueki , Yukihiro Kaneko , Minoru Motohashi , Shozaburo Sakaguchi , Manabu Sawaki
IPC分类号： G11B15/675 , G11B31/00 , G11B33/00 , G11B33/10 , H05K5/00 , H04B1/20 , H04B1/08
CPC分类号： H05K5/0017 , G11B15/675 , G11B31/003 , G11B33/00 , G11B33/10
摘要： In a cassette tape deck having a cover panel for covering an opening into which a tape cassette may be inserted, a keyboard section with dials for operating the tape deck and a display section with display elements for displaying operating conditions of the tape deck are provided on both front and rear surfaces of the cover panel of the tape deck.
摘要翻译：在具有用于覆盖可插入带盒的开口的盖板的盒式磁带机架中，具有用于操作磁带机的拨盘的键盘部分和具有用于显示磁带机的操作条件的显示元件的显示部分设置在胶带甲板的盖板的前表面和后表面。

9. 发明授权

US08773213B2 Resistance-capacitance oscillation circuit 有权
标题翻译：电阻电容振荡电路
公开(公告)号：US08773213B2
公开(公告)日：2014-07-08
申请号：US13614624
申请日：2012-09-13
申请人： Yu Nishitani , Yukihiro Kaneko , Michihito Ueda
发明人： Yu Nishitani , Yukihiro Kaneko , Michihito Ueda
IPC分类号： H03B5/20 , H01L49/02
CPC分类号： H03B5/20 , H01L27/0682 , H01L28/20 , H01L28/40 , H01L28/56 , H03B5/24 , H03B2200/004 , H03B2201/02 , H03B2201/0208
摘要： A resistance-capacitance oscillation circuit comprises an amplifier and a phase shifting circuit. The phase shifting circuit comprises at least three resistance-capacitance circuit elements, each of which comprises a resistance and a capacitor. At least one of the resistance-capacitance circuit elements comprises a variable resistance and a variable capacitor. The variable resistance is formed of a first electrode, a second electrode, a part of a semiconductor film, a part of a ferroelectric film, and a fourth electrode. The variable capacitor is formed of the second electrode, a third electrode, a fifth electrode, another part of the ferroelectric film, another part of the semiconductor film, and a paraelectric film.
摘要翻译：电阻 - 电容振荡电路包括放大器和移相电路。相移电路包括至少三个电阻 - 电容电路元件，每个电阻电容元件包括电阻和电容器。电阻 - 电容电路元件中的至少一个包括可变电阻和可变电容。可变电阻由第一电极，第二电极，半导体膜的一部分，铁电体膜的一部分和第四电极形成。可变电容器由第二电极，第三电极，第五电极，铁电体膜的另一部分，半导体膜的另一部分和顺电膜形成。

10. 发明授权

US08773212B2 Resistance-capacitance oscillation circuit 有权
标题翻译：电阻电容振荡电路
公开(公告)号：US08773212B2
公开(公告)日：2014-07-08
申请号：US13614498
申请日：2012-09-13
申请人： Yu Nishitani , Yukihiro Kaneko , Michihito Ueda
发明人： Yu Nishitani , Yukihiro Kaneko , Michihito Ueda
IPC分类号： H03B5/20 , H01L49/02
CPC分类号： H03B5/20 , H01G7/06 , H01L23/64 , H01L25/16 , H01L28/20 , H01L28/40 , H01L28/55 , H01L28/56 , H01L2924/0002 , H03B5/24 , H03B2200/004 , H03B2201/02 , H03B2201/0208 , H01L2924/00
摘要： A resistance-capacitance oscillation circuit comprises an amplifier and a phase shifting circuit. The phase shifting circuit comprises at least three resistance-capacitance circuit elements, which comprise a resistance and a capacitance. At least one of the resistance-capacitance circuit elements comprises a variable resistance and a variable capacitance. The variable resistance is formed of a first electrode, a second electrode, a part of a semiconductor film, a part of a ferroelectric film, and a fourth electrode. The variable capacitor is formed of the second electrode, a third electrode, a fifth electrode, another part of the ferroelectric film, another part of the semiconductor film, and a paraelectric film.
摘要翻译：电阻 - 电容振荡电路包括放大器和移相电路。相移电路包括至少三个电阻 - 电容电路元件，其包括电阻和电容。电阻 - 电容电路元件中的至少一个包括可变电阻和可变电容。可变电阻由第一电极，第二电极，半导体膜的一部分，铁电体膜的一部分和第四电极形成。可变电容器由第二电极，第三电极，第五电极，铁电体膜的另一部分，半导体膜的另一部分和顺电膜形成。

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