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    • 4. 发明授权
    • Holographic radar
    • 全息雷达
    • US06288672B1
    • 2001-09-11
    • US09394088
    • 1999-09-13
    • Yoshikazu AsanoTomohisa Harada
    • Yoshikazu AsanoTomohisa Harada
    • H01Q302
    • G01S13/89G01S7/35G01S13/02H01Q3/24
    • High-frequency signals from an oscillator (10) are transmitted, through a power divider (12) and a switch (14), from transmission antennas (T1, T2, T3). Reflection waves reflected by targets are received by reception antennas (R1, R2) to thereafter be fed via a switch (16) to a mixer (18). The mixer (18) is supplied with transmission high-frequency signals from the power divider (12) to retrieve beat-signal components therefrom, which in turn are converted into digital signals for the processing in a signal processing circuit 22. The transmission antennas (T1 to T3) and the reception antennas (R1, R2) are switched in sequence whereby it is possible to acquire signals equivalent to ones obtained in radars having a single transmission antenna and six reception antennas.
    • 来自振荡器(10)的高频信号通过功率分配器(12)和开关(14)从发射天线(T1,T2,T3)发射。 由目标反射的反射波由接收天线(R1,R2)接收,之后经由开关(16)馈送到混频器(18)。 向混频器(18)提供来自功率分配器(12)的发送高频信号以从其中检索其中的信号分量,其又被转换为用于信号处理电路22中的处理的数字信号。发送天线 T1至T3)和接收天线(R1,R2),从而可以获取与具有单个发送天线和六个接收天线的雷达中获得的信号相当的信号。
    • 9. 发明授权
    • Clamping circuit for clamping video signal
    • 用于钳位视频信号的钳位电路
    • US4853782A
    • 1989-08-01
    • US165691
    • 1988-03-09
    • Yoshikazu AsanoKazuo Naganawa
    • Yoshikazu AsanoKazuo Naganawa
    • H04N5/08H04N5/18
    • H04N5/08H04N5/18
    • A frame synchronizing signal detecting circuit detects a frame synchronizing signal in a video signal. When the frame synchronizing signal is not detected by the frame synchronizing signal detecting circuit, a clamp level switching circuit is responsive to a switching signal from a timer circuit for generating alternately an upper clamp potential V.sub.+ and a lower clamp potential V.sub.-. When the frame synchronizing signal is detected by the frame synchronizing signal detecting circuit, the clamp level switching circuit generates a normal clamp potential V.sub.0. A clamping pulse generating circuit is responsive to an output from the frame synchronizing signal detecting circuit for generating a clamping pulse. A clamping circuit is responsive to the clamping pulse for clamping an analogue video signal at the clamp potentials V.sub.0, V.sub.+ or V.sub.- from the clamp level switching circuit.
    • 帧同步信号检测电路检测视频信号中的帧同步信号。 当帧同步信号检测电路未检测到帧同步信号时,钳位电平切换电路响应来自定时器电路的切换信号,交替产生上钳位电位V +和下钳位电位V-。 当帧同步信号检测电路检测到帧同步信号时,钳位电平切换电路产生正常钳位电位V0。 钳位脉冲发生电路响应来自帧同步信号检测电路的输出,用于产生钳位脉冲。 钳位电路响应于钳位脉冲,用于钳位来自钳位电平开关电路的钳位电位V0,V +或V-上的模拟视频信号。