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1. 发明授权

US07782124B2 Voltage supply circuit of semiconductor device 有权
标题翻译：半导体器件的电源电路
公开(公告)号：US07782124B2
公开(公告)日：2010-08-24
申请号：US11025047
申请日：2004-12-30
申请人： Yoshihide Bando
发明人： Yoshihide Bando
IPC分类号： G05F3/02
CPC分类号： H03K19/0016
摘要： The purpose of the present invention is to decrease a leak current of a voltage supply circuit using a MOS transistor. This voltage supply circuit comprises an n-channel MOS transistor having a low threshold voltage, the drain of which is connected to the power supply voltage, and a p-channel MOS transistor, the source of which is connected to the source of the n-channel MOS transistor and which supplies a voltage vii from the drain to a load circuit. Since a voltage V gs=1 V is applied to the gate-sources of the p-channel MOS transistor when said circuit is on standby, the p-channel MOS transistor operates in a larger cut-off region than an ordinary cut-off region.
摘要翻译：本发明的目的是减少使用MOS晶体管的电压供给电路的漏电流。该电压供给电路包括其漏极连接到电源电压的阈值电压低的n沟道MOS晶体管和源极连接到n沟道MOS晶体管的p沟道MOS晶体管，并且从漏极向负载电路提供电压vii。由于当所述电路处于待机状态时，对p沟道MOS晶体管的栅极源施加电压V gs = 1V，所以p沟道MOS晶体管在比普通截止区域更大的截止区域工作。

2. 发明授权

US6031788A Semiconductor integrated circuit 有权
标题翻译：半导体集成电路
公开(公告)号：US6031788A
公开(公告)日：2000-02-29
申请号：US207335
申请日：1998-12-08
申请人： Yoshihide Bando , Nobutaka Taniguchi , Hiroyoshi Tomita
发明人： Yoshihide Bando , Nobutaka Taniguchi , Hiroyoshi Tomita
IPC分类号： G11C11/407 , G06F1/04 , G11C7/10 , G11C7/22 , G11C7/00
CPC分类号： G11C7/22 , G11C7/1072
摘要： A semiconductor integrated circuit is adapted to make invalid an external clock, externally supplied to the semiconductor integrated circuit, when the semiconductor integrated circuit is set in an active power-down state. The semiconductor integrated circuit includes a delay locked loop DLL circuit which outputs an internal clock which phase is synchronized to the external clock. A latch circuit retains control signals in synchronism with the internal clock output by the DLL circuit. An internal circuit performs a predetermined process based on the control signals supplied from the latch circuit.
摘要翻译：当半导体集成电路处于有功掉电状态时，半导体集成电路适于使外部提供给半导体集成电路的外部时钟无效。半导体集成电路包括延迟锁定环DLL电路，其输出与外部时钟同步的内部时钟。锁存电路保持与DLL电路的内部时钟输出同步的控制信号。内部电路基于从锁存电路提供的控制信号执行预定处理。

3. 发明授权

US4496806A Electric contact switching device 失效
标题翻译：电接触开关装置
公开(公告)号：US4496806A
公开(公告)日：1985-01-29
申请号：US529723
申请日：1983-09-06
申请人： Kozo Maenishi , Masaaki Adachi , Yoshihide Bando
发明人： Kozo Maenishi , Masaaki Adachi , Yoshihide Bando
IPC分类号： H01H50/10 , H01H50/14 , H01H50/64 , H01P1/12 , H01H15/00 , H01H9/00 , H01H51/00 , H01P1/10
CPC分类号： H01P1/125 , H01H50/14 , H01H50/10 , H01H50/646
摘要： A high frequency R-F switch includes a switch body or housing made from a conductive material or a non-conductive resin having a conductive layer plated on the body surfaces. The switching device includes a first external connector, a first conductor having a switching contact member connected to the first external connector for switching a connection with the switch contact member. A conductive housing supports the first conductor, a second external connector and second conductor. The switch body or housing is in electrical connection with the second external conductor.
摘要翻译：高频R-F开关包括由导电材料制成的开关体或壳体或具有镀在体表上的导电层的非导电树脂。开关装置包括第一外部连接器，第一导体，其具有连接到第一外部连接器的开关触点构件，用于切换与开关接触构件的连接。导电壳体支撑第一导体，第二外部连接器和第二导体。开关体或壳体与第二外部导体电连接。

4. 发明申请

US20060049860A1 Voltage supply circuit of semiconductor device 有权
标题翻译：半导体器件的电源电路
公开(公告)号：US20060049860A1
公开(公告)日：2006-03-09
申请号：US11025047
申请日：2004-12-30
申请人： Yoshihide Bando
发明人： Yoshihide Bando
IPC分类号： H03L7/00 , G05F1/10 , H03K17/687 , H03K3/286 , H03K3/356 , H03L7/06
CPC分类号： H03K19/0016
摘要： The purpose of the present invention is to decrease a leak current of a voltage supply circuit using a MOS transistor. This voltage supply circuit comprises an n-channel MOS transistor having a low threshold voltage, the drain of which is connected to the power supply voltage, and a p-channel MOS transistor, the source of which is connected to the source of the n-channel MOS transistor and which supplies a voltage vii from the drain to a load circuit. Since a voltage V gs=1 V is applied to the gate-sources of the p-channel MOS transistor when said circuit is on standby, the p-channel MOS transistor operates in a larger cut-off region than an ordinary cut-off region.
摘要翻译：本发明的目的是减少使用MOS晶体管的电压供给电路的漏电流。该电压供给电路包括其漏极连接到电源电压的阈值电压低的n沟道MOS晶体管和源极连接到n沟道MOS晶体管的p沟道MOS晶体管，并且从漏极向负载电路提供电压vii。由于当所述电路处于待机状态时，对p沟道MOS晶体管的栅极源施加电压V gs = 1V，所以p沟道MOS晶体管在比普通截止区域更大的截止区域工作。

5. 发明授权

US06728157B2 Semiconductor memory 有权
公开(公告)号：US06728157B2
公开(公告)日：2004-04-27
申请号：US10335948
申请日：2003-01-03
申请人： Yoshimasa Yagishita , Toshiya Uchida , Yoshihide Bando , Hiroyuki Kobayashi , Shusaku Yamaguchi , Masaki Okuda
发明人： Yoshimasa Yagishita , Toshiya Uchida , Yoshihide Bando , Hiroyuki Kobayashi , Shusaku Yamaguchi , Masaki Okuda
IPC分类号： G11C700
CPC分类号： G11C11/4087 , G11C11/406
摘要： A plurality of memory blocks is allocated the same address spaces to write the same data therein, and is operable independently of one another. One of the memory blocks is selected as a refresh block that performs a refresh operation, in response to a refresh command, while another one of the memory blocks is selected as a read block that performs a read operation, in response to a read command. Then, the plurality of memory blocks performs read operations at different timings so that the read operations overlap one another. Therefore, the semiconductor memory can receive read commands at intervals each of which is shorter than the execution time of a single read operation. As a result, externally supplied read commands can be responded to at high speed, and the data transmission rate during read operation can be improved.

6. 发明授权

US06567339B2 Semiconductor integrated circuit 失效
公开(公告)号：US06567339B2
公开(公告)日：2003-05-20
申请号：US10036392
申请日：2002-01-07
申请人： Yoshihide Bando
发明人： Yoshihide Bando
IPC分类号： G11C800
CPC分类号： G11C7/109 , G11C7/1078 , G11C7/22 , G11C11/406 , G11C11/409
摘要： An external command receiving circuit receives an external command signal supplied from the exterior, in synchronization with one transition edge of a first clock signal. An internal command receiving circuit receives an internal command signal internally generated, in synchronization with the other transition edge of the first clock signal. Namely, receiving operation of the internal command signal by the internal command receiving circuit shifts from that of the external command signal by the external command receiving circuit by at least a half cycle of the first clock signal. Immediately after starting an operation according to the external command signal, a control circuit for operating an internal circuit does not receive an operation request according to the internal command signal. This can prevent conflict in operation between the internal circuit according to the external command signal and the internal circuit according to the internal command signal, and also prevent malfunction.

7. 再颁专利

USRE34642E Electric contact switching device 失效
标题翻译：电接触开关装置
公开(公告)号：USRE34642E
公开(公告)日：1994-06-21
申请号：US902498
申请日：1992-06-23
申请人： Kozo Maenishi , Masaaki Adachi , Yoshihide Bando
发明人： Kozo Maenishi , Masaaki Adachi , Yoshihide Bando
IPC分类号： H01H50/10 , H01H50/14 , H01H50/64 , H01P1/12 , H01H15/00
CPC分类号： H01P1/125 , H01H50/14 , H01H50/10 , H01H50/646
摘要： A high frequency R-F switch includes a switch body of housing made from a conductive material or a non-conductive resin having a conductive layer plated on the body surfaces. The switching device includes a first external connector, a first conductor having a switching contact member connected to the first external connector for switching a connection with the switch contact member. A conductive housing .[.supports.]. .Iadd.houses .Iaddend.the first conductor, .Iadd.and connects to .Iaddend.a second external connector and second conductor. The switch body or housing is in electrical connection with the second external conductor.

8. 发明授权

US4437078A Polarized electromagnetic device 失效
标题翻译：极化电磁装置
公开(公告)号：US4437078A
公开(公告)日：1984-03-13
申请号：US263495
申请日：1981-05-14
申请人： Yoshihide Bando , Toshiki Tanaka , Sueaki Honda , Yoshihiko Takahashi , Kenichi Tsuruyoshi , Katsumi Kawashima , Syuichi Kishimoto
发明人： Yoshihide Bando , Toshiki Tanaka , Sueaki Honda , Yoshihiko Takahashi , Kenichi Tsuruyoshi , Katsumi Kawashima , Syuichi Kishimoto
IPC分类号： H01H51/22
CPC分类号： H01H51/2227
摘要： A polarized electromagnetic device is disclosed having a generally I-shaped magnetic core member, a coil which is wound on the center portion of the core member, a pair of permanent magnets which are arranged in parallel with and outside of the respective end portions of the core member, and mutually confronting first and second armature plate members which are joined together through the pair of permanent magnets, with each magnet at the opposite end portions of the armature plate members in order to provide a spacing for accommodating the core member between the armature plate members, and consequently leaving a gap for relative movement therein. The core member and armature plate members are supported to be swingable relative to each other for movement about a center transverse axis of the center portion of the core member.
摘要翻译：公开了一种极化电磁装置，其具有大致为I形的磁芯构件，卷绕在芯构件的中心部分上的线圈，一对永磁体，其布置成与所述芯构件的各个端部平行且向外并且相互面对的第一和第二电枢板构件通过一对永磁体连接在一起，每个磁体位于衔铁板构件的相对端部，以便提供用于将铁芯构件容纳在电枢之间的间隔板构件，因此在其中留下相对移动的间隙。铁心构件和衔铁板构件相对于彼此支撑以围绕芯构件的中心部分的中心横向轴线运动。

9. 发明授权

US4223290A Electromagnetic device of the flat package type 失效
标题翻译：扁平封装类型的电磁装置
公开(公告)号：US4223290A
公开(公告)日：1980-09-16
申请号：US968028
申请日：1978-12-08
申请人： Shunichi Agatahama , Akio Masaki , Yoshihide Bando
发明人： Shunichi Agatahama , Akio Masaki , Yoshihide Bando
IPC分类号： H01F7/14 , H01H50/16 , H01H51/22 , H01F7/02
CPC分类号： H01F7/14 , H01H51/2272
摘要： A miniaturized electromagnetic device is disclosed, which is applicable to an electromagnetic relay of the flat package type.The electromagnetic device comprises a magnetic core having the configuration of the capital letter H, a coil wound round the magnetic core, and a pair of magnetic members for alternatingly forming two closed magnetic circuits in cooperation with said magnetic core, said magnetic members being formed in one-piece with the aid of connecting members of non-magnetic material, one of said magnetic members including a permanent magnet, and each tip of said magnetic member confronting the corresponding tip of said magnetic core and the clearance therebetween being changeable by the magnetic force generated therebetween as said coil is energized.
摘要翻译：公开了一种适用于扁平封装型电磁继电器的小型化电磁装置。电磁装置包括具有大写字母H的构造的磁芯，缠绕在磁芯上的线圈和用于与所述磁芯配合交替地形成两个闭合磁路的一对磁性构件，所述磁性构件形成在借助于非磁性材料的连接构件，其中一个所述磁性构件包括永磁体，并且所述磁性构件的每个尖端面对所述磁芯的相应尖端，并且其间的间隙可通过磁力而变化当所述线圈通电时，它们之间产生。

10. 发明授权

US06754126B2 Semiconductor memory 失效
标题翻译：半导体存储器
公开(公告)号：US06754126B2
公开(公告)日：2004-06-22
申请号：US10106597
申请日：2002-03-27
申请人： Shusaku Yamaguchi , Toshiya Uchida , Yoshimasa Yagishita , Yoshihide Bando , Masahiro Yada , Masaki Okuda , Hiroyuki Kobayashi , Kota Hara , Shinya Fujioka , Waichiro Fujieda
发明人： Shusaku Yamaguchi , Toshiya Uchida , Yoshimasa Yagishita , Yoshihide Bando , Masahiro Yada , Masaki Okuda , Hiroyuki Kobayashi , Kota Hara , Shinya Fujioka , Waichiro Fujieda
IPC分类号： G11C700
CPC分类号： G11C7/1006 , G11C8/12 , G11C11/406 , G11C11/40603 , G11C11/40615 , G11C11/40618 , G11C11/4087 , G11C2211/4061 , G11C2211/4062
摘要： A plurality of first memory blocks and a second memory block for reproducing data of the first memory blocks are formed. When a read command and a refresh command conflict with each other, a read control circuit accesses the first memory block according to the refresh command and reproduces read data by using the second memory block. When a write command and the refresh command conflict with each other, a write control circuit operates the memory block according to an order of command reception. Therefore, it is possible to perform refresh operation without being recognized by users. Namely, a user-friendly semiconductor memory can be provided.
摘要翻译：形成多个第一存储块和用于再现第一存储块的数据的第二存储块。当读命令和刷新命令彼此冲突时，读控制电路根据刷新命令访问第一存储块，并通过使用第二存储块再现读数据。当写命令和刷新命令彼此冲突时，写控制电路根据命令接收的顺序操作存储块。因此，可以在不被用户识别的情况下进行刷新操作。即，可以提供用户友好的半导体存储器。

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