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    • 1. 发明申请
    • TIME-TO-DIGITAL CONVERTER AND OPERATING METHOD
    • 时间到数字转换器和操作方法
    • US20120026028A1
    • 2012-02-02
    • US13083698
    • 2011-04-11
    • Yeomyung KIMTae Wook KIM
    • Yeomyung KIMTae Wook KIM
    • H03M1/50
    • G04F10/005
    • Provided are a TDC having a pipeline or cyclic structure and an operating method thereof. The TDC includes a first stage block and a second stage block. The first stage block detects a first bit of a digital code for a time difference between first and second input signals. The second stage block detects a second bit of the digital code for a time difference between first and second output signals of the first stage block. The first stage block amplifies a time difference between first and second delay signals for the first and second input signals to generate the first and second output signals, and transfers the first and second output signals to the second stage block.
    • 提供具有流水线或循环结构的TDC及其操作方法。 TDC包括第一级块和第二级块。 第一级块检测第一和第二输入信号之间的时间差的数字代码的第一位。 第二级块检测第一级块的第一和第二输出信号之间的时间差的数字代码的第二位。 第一级块放大第一和第二输入信号的第一和第二延迟信号之间的时间差,以产生第一和第二输出信号,并将第一和第二输出信号传送到第二级块。
    • 2. 发明授权
    • Time-to-digital converter and conversion method
    • 时间到数字转换器和转换方法
    • US08890738B2
    • 2014-11-18
    • US14110192
    • 2012-04-04
    • Tae Wook KimYeomyung KimGunhee Han
    • Tae Wook KimYeomyung KimGunhee Han
    • H03M1/12G04F10/00H03M1/00H04L7/033
    • G04F10/005G04F10/00H03M1/00H03M1/12H03M1/1225H03M2201/4233H04L7/033
    • The present disclosure provides a time-to-digital (TDC) converter, comprising: a coarse TDC receiving a start signal and a stop signal, delaying the first start signal in a first time unit to generate n first delayed start signals (where n is an integer equal to or larger than 2), measuring a time difference between the first delayed start signal and the stop signal in the first time unit, and generating second delayed start signals that are obtained by delaying the first delayed start signals in a time unit shorter than the first time unit; and a fine TDC receiving and delaying the second delayed start signal generated from the coarse TDC and receiving the stop signal, and measuring a time difference between the second delayed start signal and the stop signal in a second time unit.
    • 本公开提供了一种时间数字(TDC)转换器,包括:粗TDC接收起始信号和停止信号,以第一时间单位延迟第一起始信号以产生n个第一延迟起始信号(其中n为 等于或大于2的整数),测量第一时间单位中第一延迟起始信号和停止信号之间的时间差,以及产生通过以时间单位延迟第一延迟开始信号而获得的第二延迟起始信号 比第一时间单位短; 以及精细TDC,接收并延迟从粗TDC产生的第二延迟开始信号并接收停止信号,并且以第二时间单位测量第二延迟开始信号和停止信号之间的时间差。
    • 3. 发明申请
    • TIME-TO-DIGITAL CONVERTER AND CONVERSION METHOD
    • 时间到数字转换器和转换方法
    • US20140292552A1
    • 2014-10-02
    • US14110192
    • 2012-04-04
    • Tae Wook KimYeomyung KimGunhee Han
    • Tae Wook KimYeomyung KimGunhee Han
    • G04F10/00
    • G04F10/005G04F10/00H03M1/00H03M1/12H03M1/1225H03M2201/4233H04L7/033
    • The present disclosure provides a time-to-digital (TDC) converter, comprising: a coarse TDC receiving a start signal and a stop signal, delaying the first start signal in a first time unit to generate n first delayed start signals (where n is an integer equal to or larger than 2), measuring a time difference between the first delayed start signal and the stop signal in the first time unit, and generating second delayed start signals that are obtained by delaying the first delayed start signals in a time unit shorter than the first time unit; and a fine TDC receiving and delaying the second delayed start signal generated from the coarse TDC and receiving the stop signal, and measuring a time difference between the second delayed start signal and the stop signal in a second time unit.
    • 本公开提供了一种时间数字(TDC)转换器,包括:粗TDC接收起始信号和停止信号,以第一时间单位延迟第一起始信号以产生n个第一延迟起始信号(其中n为 等于或大于2的整数),测量第一时间单位中第一延迟起始信号和停止信号之间的时间差,以及产生通过以时间单位延迟第一延迟开始信号而获得的第二延迟起始信号 比第一时间单位短; 以及精细TDC,接收并延迟从粗TDC产生的第二延迟开始信号并接收停止信号,并且以第二时间单位测量第二延迟开始信号和停止信号之间的时间差。
    • 4. 发明授权
    • Time-to-digital converter and operating method
    • 时间到数字转换器和操作方法
    • US08362933B2
    • 2013-01-29
    • US13083698
    • 2011-04-11
    • Yeomyung KimTae Wook Kim
    • Yeomyung KimTae Wook Kim
    • H03M1/48
    • G04F10/005
    • Provided are a TDC having a pipeline or cyclic structure and an operating method thereof. The TDC includes a first stage block and a second stage block. The first stage block detects a first bit of a digital code for a time difference between first and second input signals. The second stage block detects a second bit of the digital code for a time difference between first and second output signals of the first stage block. The first stage block amplifies a time difference between first and second delay signals for the first and second input signals to generate the first and second output signals, and transfers the first and second output signals to the second stage block.
    • 提供具有流水线或循环结构的TDC及其操作方法。 TDC包括第一级块和第二级块。 第一级块检测第一和第二输入信号之间的时间差的数字代码的第一位。 第二级块检测第一级块的第一和第二输出信号之间的时间差的数字代码的第二位。 第一级块放大第一和第二输入信号的第一和第二延迟信号之间的时间差,以产生第一和第二输出信号,并将第一和第二输出信号传送到第二级块。