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    • 1. 发明授权
    • Semiconductor device having nitride layers
    • 具有氮化物层的半导体器件
    • US08575656B2
    • 2013-11-05
    • US13605814
    • 2012-09-06
    • Akira YoshiokaYasunobu SaitoWataru Saito
    • Akira YoshiokaYasunobu SaitoWataru Saito
    • H01L31/06H01L29/66
    • H01L29/475H01L21/8252H01L27/0605H01L27/0676H01L27/0688H01L27/0727H01L29/2003H01L29/4175H01L29/66462H01L29/7787H01L29/78H01L29/872
    • According to one embodiment, a semiconductor device having a semiconductor substrate, first to fourth semiconductor layers of nitride, first to third electrodes and a gate electrode is provided. The first semiconductor layer is provided directly on the semiconductor substrate or on the same via a buffer layer. The second semiconductor layer is provided so as to be spaced apart from the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer and has a band gap wider than that of the second semiconductor layer. The fourth semiconductor layer insulates the first and second semiconductor layers. The first electrode forms an ohmic junction with the first to the third semiconductor layers. The second electrode is provided on the third semiconductor layer. The gate electrode is provided between the first and the second electrodes. The third electrode forms a Schottky junction with the first semiconductor layer.
    • 根据一个实施例,提供了具有半导体衬底,氮化物的第一至第四半导体层,第一至第三电极和栅电极的半导体器件。 第一半导体层直接设置在半导体衬底上,或者经由缓冲层设置在其上。 第二半导体层被设置为与第一半导体层间隔开。 第三半导体层设置在第二半导体层上,并且具有比第二半导体层宽的带隙。 第四半导体层使第一和第二半导体层绝缘。 第一电极与第一至第三半导体层形成欧姆结。 第二电极设置在第三半导体层上。 栅电极设置在第一和第二电极之间。 第三电极与第一半导体层形成肖特基结。
    • 7. 发明申请
    • Semiconductor device fabrication method
    • 半导体器件制造方法
    • US20060128119A1
    • 2006-06-15
    • US11282664
    • 2005-11-21
    • Yasunobu SaitoToru Sugiyama
    • Yasunobu SaitoToru Sugiyama
    • H01L21/78H01L21/461
    • H01L21/78H01L21/76885
    • According to the present invention, there is provided a semiconductor device fabrication method comprising: forming a circuit pattern of a semiconductor element and a ground pad connected to a ground interconnection of said circuit pattern, in a semiconductor chip region divided into a plurality of portions on a main surface of a semiconductor substrate; forming a separation groove in a separation region for separating a plurality of semiconductor chips; forming a metal film so as to cover the main surface of said semiconductor substrate; forming an insulating film so as to cover said metal film on the main surface of said semiconductor substrate and fill said separation groove; etching an entire surface of said insulating film to leave said insulating film behind on a bottom of said separation groove; forming a metal layer connected to said ground pad via said metal film, and extending to an upper end of said insulating film on the bottom of said separation groove; and polishing a back surface of said semiconductor substrate until the bottom of said separation groove is exposed, and cutting the semiconductor chip region from said separation groove, thereby separating said plurality of semiconductor chips.
    • 根据本发明,提供了一种半导体器件的制造方法,包括:在分成多个部分的半导体芯片区域中形成半导体元件的电路图案和连接到所述电路图案的接地互连的接地焊盘 半导体衬底的主表面; 在用于分离多个半导体芯片的分离区域中形成分离槽; 形成金属膜以覆盖所述半导体衬底的主表面; 形成绝缘膜以覆盖所述半导体衬底的主表面上的所述金属膜并填充所述分离槽; 蚀刻所述绝缘膜的整个表面以将所述绝缘膜留在所述分离槽的底部上; 通过所述金属膜形成连接到所述接地焊盘的金属层,并延伸到所述隔离槽底部的所述绝缘膜的上端; 并抛光所述半导体衬底的背面,直到所述分离槽的底部露出,并从所述分隔槽切割半导体芯片区域,从而分离所述多个半导体芯片。
    • 10. 发明申请
    • SEMICONDUCTOR DEVICE HAVING NITRIDE LAYERS
    • 具有氮化物层的半导体器件
    • US20130248928A1
    • 2013-09-26
    • US13605814
    • 2012-09-06
    • Akira YOSHIOKAYasunobu SaitoWataru Saito
    • Akira YOSHIOKAYasunobu SaitoWataru Saito
    • H01L29/78
    • H01L29/475H01L21/8252H01L27/0605H01L27/0676H01L27/0688H01L27/0727H01L29/2003H01L29/4175H01L29/66462H01L29/7787H01L29/78H01L29/872
    • According to one embodiment, a semiconductor device having a semiconductor substrate, first to fourth semiconductor layers of nitride, first to third electrodes and a gate electrode is provided. The first semiconductor layer is provided directly on the semiconductor substrate or on the same via a buffer layer. The second semiconductor layer is provided so as to be spaced apart from the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer and has a band gap wider than that of the second semiconductor layer. The fourth semiconductor layer insulates the first and second semiconductor layers. The first electrode forms an ohmic junction with the first to the third semiconductor layers. The second electrode is provided on the third semiconductor layer. The gate electrode is provided between the first and the second electrodes. The third electrode forms a Schottky junction with the first semiconductor layer.
    • 根据一个实施例,提供了具有半导体衬底,氮化物的第一至第四半导体层,第一至第三电极和栅电极的半导体器件。 第一半导体层直接设置在半导体衬底上,或者经由缓冲层设置在其上。 第二半导体层被设置为与第一半导体层间隔开。 第三半导体层设置在第二半导体层上,并且具有比第二半导体层宽的带隙。 第四半导体层使第一和第二半导体层绝缘。 第一电极与第一至第三半导体层形成欧姆结。 第二电极设置在第三半导体层上。 栅电极设置在第一和第二电极之间。 第三电极与第一半导体层形成肖特基结。