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1. 发明授权

US08072001B2 Heterojunction bipolar transistor and method for manufacturing the same, and power amplifier using the same 有权
标题翻译：异质结双极晶体管及其制造方法及使用其的功率放大器
公开(公告)号：US08072001B2
公开(公告)日：2011-12-06
申请号：US12879205
申请日：2010-09-10
申请人： Isao Ohbu , Chushiro Kusano , Yasunari Umemoto , Atsushi Kurokawa
发明人： Isao Ohbu , Chushiro Kusano , Yasunari Umemoto , Atsushi Kurokawa
IPC分类号： H01L29/73
CPC分类号： H01L29/7304 , H01L27/0605 , H01L29/7371 , H03F2200/444 , H03F2203/21178
摘要： A heterojunction bipolar transistor with InGaP as the emitter layer and capable of both reliable electrical conduction and thermal stability wherein a GaAs layer is inserted between the InGaP emitter layer and AlGaAs ballast resistance layer, to prevent holes reverse-injected from the base layer from diffusing and reaching the AlGaAs ballast resistance layer.
摘要翻译：一种异质结双极晶体管，其具有InGaP作为发射极层，并且具有可靠的导电和热稳定性，其中GaAs层插入在InGaP发射极层和AlGaAs镇流电阻层之间，以防止从基极层反向注入的空穴扩散，达到AlGaAs镇流电阻层。

2. 发明授权

US07622756B2 Semiconductor device and radio communication device 有权
标题翻译：半导体器件和无线电通信设备
公开(公告)号：US07622756B2
公开(公告)日：2009-11-24
申请号：US11319084
申请日：2005-12-28
申请人： Satoshi Sasaki , Yasunari Umemoto , Yasuo Osone , Tsutomu Kobori , Chushiro Kusano , Isao Ohbu , Kenji Sasaki
发明人： Satoshi Sasaki , Yasunari Umemoto , Yasuo Osone , Tsutomu Kobori , Chushiro Kusano , Isao Ohbu , Kenji Sasaki
IPC分类号： H01L27/082 , H01L27/102
CPC分类号： H01L29/7304 , H01L23/66 , H01L24/48 , H01L24/49 , H01L25/042 , H01L27/0605 , H01L27/067 , H01L28/40 , H01L29/0808 , H01L29/7371 , H01L2223/6627 , H01L2223/6644 , H01L2224/05553 , H01L2224/05554 , H01L2224/32225 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48227 , H01L2224/48235 , H01L2224/49113 , H01L2224/49171 , H01L2224/73265 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/0102 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01032 , H01L2924/01033 , H01L2924/01037 , H01L2924/01041 , H01L2924/01042 , H01L2924/01049 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10329 , H01L2924/10336 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/1423 , H01L2924/19032 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30105 , H01L2924/3011 , H01L2924/30111 , H01L2924/00 , H01L2224/45099
摘要： A technology which allows a reduction in the thermal resistance of a semiconductor device and the miniaturization thereof is provided. The semiconductor device has a plurality of unit transistors Q, transistor formation regions 3a, 3b, and 3e each having a first number (seven) of the unit transistors Q, and transistor formation regions 3c and 3d each having a second number (four) of the unit transistors Q. The transistor formation regions 3c and 3d are located between the transistor formation regions 3a, 3b, 3e, and 3f and the first number is larger than the second number.
摘要翻译：提供了允许半导体器件的热阻降低和小型化的技术。半导体器件具有多个单位晶体管Q，每个具有第一数量（7）的单位晶体管Q的晶体管形成区域3a，3b和3e，以及每个具有第二数量（4）的晶体管形成区域3c和3d 单位晶体管Q.晶体管形成区域3c和3d位于晶体管形成区域3a，3b，3e和3f之间，并且第一数量大于第二数量。

3. 发明申请

US20060157825A1 Semiconductor device and manufacturing the same 审中-公开
标题翻译：半导体器件和制造相同
公开(公告)号：US20060157825A1
公开(公告)日：2006-07-20
申请号：US11376116
申请日：2006-03-16
申请人： Yasunari Umemoto , Hideyuki Ono , Tomonori Tanoue , Yasuo Ohsone , Isao Ohbu , Chushiro Kusano , Atsushi Kurokawa , Masao Yamane
发明人： Yasunari Umemoto , Hideyuki Ono , Tomonori Tanoue , Yasuo Ohsone , Isao Ohbu , Chushiro Kusano , Atsushi Kurokawa , Masao Yamane
IPC分类号： H01L27/082
CPC分类号： H01L27/0825 , H01L27/0259 , H01L29/7371 , H01L2224/48091 , H01L2224/73265 , H03K17/08146 , H03K17/615 , H01L2924/00014
摘要： The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.
摘要翻译：本发明旨在提高对半导体器件的破坏性。具有连接在高输出的放大电路的输出（集电极和发射极）之间的达林顿的多个双极晶体管的保护电路与放大电路并联电连接。放大电路具有彼此并联连接的多个单元HBT（异质结双极晶体管）。保护电路具有包括具有多个双极型晶体管Q 1至Q 5的第一组保护电路和具有多个双极晶体管的第二组保护电路的两级配置。

4. 发明申请

US20060138459A1 Semiconductor device, manufacturing method of the same and electronic device 审中-公开
标题翻译：半导体器件及其制造方法及电子器件
公开(公告)号：US20060138459A1
公开(公告)日：2006-06-29
申请号：US11316989
申请日：2005-12-27
申请人： Atsushi Kurokawa , Isao Ohbu , Yasunari Umemoto , Satoshi Sasaki , Chushiro Kusano , Yoshinori Imamura
发明人： Atsushi Kurokawa , Isao Ohbu , Yasunari Umemoto , Satoshi Sasaki , Chushiro Kusano , Yoshinori Imamura
IPC分类号： H01L31/109
CPC分类号： H01L29/7304 , H01L29/41708 , H01L29/42304 , H01L29/7371
摘要： Provided is a semiconductor device equipped with HBTs capable of satisfying both thermal stability and reliability and having improved electrostatic breakdown voltage. The HBT according to the present invention is obtained by successively forming, over the main surface of a substrate made of a compound semiconductor, a sub-collector layer, a collector layer, a base layer, an emitter layer, a collector electrode electrically connected to the collector layer, a base electrode electrically connected to the base layer, an emitter mesa layer formed over the emitter layer and electrically connected to the emitter layer, and an emitter electrode electrically connected to the emitter mesa layer. The emitter mesa layer has a semiconductor layer made of an n type GaAs layer, a high concentration semiconductor layer made of an n+ type GaAs layer over the semiconductor layer and a ballast resistor layer made of an n type InGaAs layer over the high concentration semiconductor layer.
摘要翻译：提供了配备能够满足热稳定性和可靠性并具有改善的静电击穿电压的HBT的半导体器件。根据本发明的HBT是通过在由化合物半导体制成的衬底的主表面上连续形成子集电极层，集电极层，基极层，发射极层，集电极，电连接到集电极层，电连接到基极层的基极，在发射极层上形成并电连接到发射极层的发射极台面层和电连接到发射极台面层的发射极。发射极台面层具有由n型GaAs层构成的半导体层，在半导体层上形成由n + +型GaAs层构成的高浓度半导体层和由n型GaAs层制成的镇流电阻层 InGaAs层在高浓度半导体层上。

5. 发明申请

US20050156194A1 Heterojunction bipolar transistor and method for manufacturing the same, and power amplifier using the same 有权
标题翻译：异质结双极晶体管及其制造方法及使用其的功率放大器
公开(公告)号：US20050156194A1
公开(公告)日：2005-07-21
申请号：US11019270
申请日：2004-12-23
申请人： Isao Ohbu , Chushiro Kusano , Yasunari Umemoto , Atsushi Kurokawa
发明人： Isao Ohbu , Chushiro Kusano , Yasunari Umemoto , Atsushi Kurokawa
IPC分类号： H01L21/331 , H01L21/822 , H01L21/8222 , H01L27/04 , H01L27/06 , H01L27/082 , H01L29/73 , H01L29/737 , H01L29/861 , H03F3/24 , H01L29/739
CPC分类号： H01L29/7304 , H01L27/0605 , H01L29/7371 , H03F2200/444 , H03F2203/21178
摘要： A heterojunction bipolar transistor with InGaP as the emitter layer and capable of both reliable electrical conduction and thermal stability wherein a GaAs layer is inserted between the InGaP emitter layer and AlGaAs ballast resistance layer, to prevent holes reverse-injected from the base layer from diffusing and reaching the AlGaAs ballast resistance layer.
摘要翻译：一种异质结双极晶体管，其具有InGaP作为发射极层，并且具有可靠的导电和热稳定性，其中GaAs层插入在InGaP发射极层和AlGaAs镇流电阻层之间，以防止从基极层反向注入的空穴扩散，达到AlGaAs镇流电阻层。

6. 发明授权

US5132752A Field effect transistor 失效
标题翻译：场效应晶体管
公开(公告)号：US5132752A
公开(公告)日：1992-07-21
申请号：US658463
申请日：1991-02-22
申请人： Yasunari Umemoto , Nobuo Kotera , Kiichi Ueyanagi , Norikazu Hashimoto , Nobutoshi Matsunaga , Yasuo Wada , Shoji Shukuri , Noboru Masuda , Takehisa Hayashi , Hirotoshi Tanaka
发明人： Yasunari Umemoto , Nobuo Kotera , Kiichi Ueyanagi , Norikazu Hashimoto , Nobutoshi Matsunaga , Yasuo Wada , Shoji Shukuri , Noboru Masuda , Takehisa Hayashi , Hirotoshi Tanaka
IPC分类号： H01L29/10 , H01L29/812
CPC分类号： H01L29/1075 , H01L29/812 , Y10S257/903
摘要： A field effect transistor formed on a semi-insulator or compound semiconductor substrate comprises a first semiconductor layer forming a source region, a drain region and a channel layer, and a second semiconductor layer having a reverse conduction type to that of the first semiconductor layer. The second semiconductor layer is doped so that it will be totally depleted. Therefore, a portion of the second semiconductor layer adjacent to the substrate will remain conductive. The field effect transistor with this structure prevents the short channel effect and the soft error due to .alpha.-particles. A threshold voltage control arrangement is also provided using the feature of a control electrode coupled to the second semiconductor layer and a feedback arrangement.
摘要翻译：形成在半绝缘体或化合物半导体衬底上的场效应晶体管包括形成源极区，漏极区和沟道层的第一半导体层以及具有与第一半导体层相反的导通型的第二半导体层。第二半导体层被掺杂以使其完全耗尽。因此，与衬底相邻的第二半导体层的一部分将保持导电。具有这种结构的场效应晶体管防止短沟道效应和由于α-粒子引起的软误差。还使用耦合到第二半导体层的控制电极的特征和反馈装置来提供阈值电压控制装置。

7. 发明授权

US5068605A Semiconductor integrated circuit device and method of testing the same 失效
标题翻译：半导体集成电路器件及其测试方法
公开(公告)号：US5068605A
公开(公告)日：1991-11-26
申请号：US404355
申请日：1989-09-07
申请人： Moritoshi Yasunaga , Noboru Masuda , Hideo Todokoro , Yasunari Umemoto , Hirotoshi Tanaka , Hiroyuki Itoh
发明人： Moritoshi Yasunaga , Noboru Masuda , Hideo Todokoro , Yasunari Umemoto , Hirotoshi Tanaka , Hiroyuki Itoh
IPC分类号： G01R31/28 , G01R31/30 , G01R31/302 , G01R31/305 , G01R31/3185 , H01L21/66 , H01L21/82 , H01L21/822 , H01L27/04
CPC分类号： G01R31/305 , G01R31/30 , G01R31/318516
摘要： A semiconductor integrated circuit device includes: input terminals; output terminals; a group of gates which receives an input signal applied to the input terminals and outputs an output signal from the output terminals, the output signal corresponding to the state of the input signal; and an arrangement for forcibly setting the output of each gate constituting the group either at a "1" level or at a "0" level irrespective of the state of the input signal and the state of an input signal to each gate. The arrangement for forcibly setting the output is an arrangement for changing the potential of a semiconductor substrate in which each gate is formed. This arrangement for changing potential includes an impurity doped region formed in the semiconductor substrate, the impurity doped region surrounding at least a transistor constituting each gate so as to apply a potential to the transistor, and a terminal for applying the potential to the impurity doped region. The semiconductor integrated circuit device according to another aspect includes an observation pad formed on a portion of at least one of the output and input areas of each gate, the observation pad being exposed without being covered with an insulator layer and the potential of the observation pad being observed as a difference of shading by using an electron or ion beam tester. A fault of each gate can be detected in accordance with a shading image of the observation pads.
摘要翻译：半导体集成电路装置包括：输入端子; 输出端子; 一组门，其接收施加到输入端的输入信号，并输出来自输出端的输出信号，输出信号对应于输入信号的状态; 以及用于强制地将构成组的每个门的输出强制设置为“1”电平或“0”电平的装置，而与输入信号的状态和每个门的输入信号的状态无关。用于强制设置输出的布置是用于改变其中形成每个栅极的半导体衬底的电位的布置。这种用于变化电位的布置包括形成在半导体衬底中的杂质掺杂区域，至少构成每个栅极的晶体管的杂质掺杂区域，以便向晶体管施加电位，以及将电位施加到杂质掺杂区域。根据另一方面的半导体集成电路器件包括形成在每个栅极的输出和输入区域中的至少一个的一部分上的观察垫，观察垫被暴露而不被绝缘体层覆盖，并且观察垫的电位通过使用电子或离子束测试仪被观察为阴影的差异。可以根据观察垫的阴影图像来检测每个门的故障。

8. 发明授权

US08860093B2 Semiconductor device and radio communication device 有权
标题翻译：半导体器件和无线电通信设备
公开(公告)号：US08860093B2
公开(公告)日：2014-10-14
申请号：US13538121
申请日：2012-06-29
申请人： Satoshi Sasaki , Yasunari Umemoto , Yasuo Osone , Tsutomu Kobori , Chushiro Kusano , Isao Ohbu , Kenji Sasaki
发明人： Satoshi Sasaki , Yasunari Umemoto , Yasuo Osone , Tsutomu Kobori , Chushiro Kusano , Isao Ohbu , Kenji Sasaki
IPC分类号： H01L27/102 , H01L29/737 , H03F3/195 , H01L23/66 , H01L27/06 , H01L23/00
CPC分类号： H01L29/7304 , H01L23/66 , H01L24/48 , H01L24/49 , H01L25/042 , H01L27/0605 , H01L27/067 , H01L28/40 , H01L29/0808 , H01L29/7371 , H01L2223/6627 , H01L2223/6644 , H01L2224/05553 , H01L2224/05554 , H01L2224/32225 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48227 , H01L2224/48235 , H01L2224/49113 , H01L2224/49171 , H01L2224/73265 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/0102 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01032 , H01L2924/01033 , H01L2924/01037 , H01L2924/01041 , H01L2924/01042 , H01L2924/01049 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10329 , H01L2924/10336 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/1423 , H01L2924/19032 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30105 , H01L2924/3011 , H01L2924/30111 , H01L2924/00 , H01L2224/45099
摘要： A technology which allows a reduction in the thermal resistance of a semiconductor device used in a radio communication device, and the miniaturization thereof is provided. For example, the semiconductor device can include a plurality of unit transistors Q, transistor formation regions 3a, 3b, and 3e each having a first number (e.g., seven) of the unit transistors Q, and transistor formation regions 3c and 3d each having a second number (e.g., four) of the unit transistors Q. The transistor formation regions 3c and 3d are located between the transistor formation regions 3a, 3b, 3e, and 3f, and the first number is larger than the second number.
摘要翻译：提供了允许降低无线电通信装置中使用的半导体装置的热阻的技术及其小型化。例如，半导体器件可以包括多个单位晶体管Q，具有单位晶体管Q的第一数量（例如7个）的晶体管形成区域3a，3b和3e以及每个具有单位晶体管Q的晶体管形成区域3c和3d 晶体管形成区域3c和3d位于晶体管形成区域3a，3b，3e和3f之间，第一数量大于第二数量。

9. 发明授权

US08546939B2 RF module including control IC without the aid of a relay pad 有权
标题翻译： RF模块包括控制IC，无需继电器垫
公开(公告)号：US08546939B2
公开(公告)日：2013-10-01
申请号：US11618207
申请日：2006-12-29
申请人： Kenji Sasaki , Tomonori Tanoue , Sakae Kikuchi , Toshifumi Makino , Takeshi Sato , Tsutomu Kobori , Yasunari Umemoto , Takashi Kitahara
发明人： Kenji Sasaki , Tomonori Tanoue , Sakae Kikuchi , Toshifumi Makino , Takeshi Sato , Tsutomu Kobori , Yasunari Umemoto , Takashi Kitahara
IPC分类号： H01L23/34 , H01L29/66 , H01L23/52 , H01L23/48 , H01L29/40 , H03F1/00 , H03F3/14 , H03F3/04 , H03F3/68 , H04B1/06 , H04B7/00 , H04B1/28
CPC分类号： H04B1/28 , H01L23/66 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/78 , H01L24/85 , H01L25/18 , H01L2223/6644 , H01L2224/05553 , H01L2224/05554 , H01L2224/0603 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/49113 , H01L2224/49171 , H01L2224/73265 , H01L2224/78301 , H01L2224/85181 , H01L2224/92247 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01031 , H01L2924/01033 , H01L2924/01049 , H01L2924/01074 , H01L2924/01079 , H01L2924/10329 , H01L2924/10336 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30107 , H01L2924/00014 , H01L2924/00
摘要： A technology is provided so that RF modules used for cellular phones etc. can be reduced in size. Over a wiring board constituting an RF module, there are provided a first semiconductor chip in which an amplifier circuit is formed and a second semiconductor chip in which a control circuit for controlling the amplifier circuit is formed. A bonding pad over the second semiconductor chip is connected with a bonding pad over the first semiconductor chip directly by a wire without using a relay pad. In this regard, the bonding pad formed over the first semiconductor chip is not square but rectangular (oblong).
摘要翻译：提供了一种技术，使得用于蜂窝电话等的RF模块的尺寸可以减小。在构成RF模块的布线板上，设置有形成放大器电路的第一半导体芯片和形成用于控制放大器电路的控制电路的第二半导体芯片。第二半导体芯片上的接合焊盘通过导线直接通过第一半导体芯片上的接合焊盘连接而不使用继电器垫。在这方面，形成在第一半导体芯片上的焊盘不是正方形，而是矩形（长方形）。

10. 发明授权

US07256434B2 Heterojunction bipolar transistor and method for manufacturing the same, and power amplifier using the same 有权
标题翻译：异质结双极晶体管及其制造方法及使用其的功率放大器
公开(公告)号：US07256434B2
公开(公告)日：2007-08-14
申请号：US11019270
申请日：2004-12-23
申请人： Isao Ohbu , Chushiro Kusano , Yasunari Umemoto , Atsushi Kurokawa
发明人： Isao Ohbu , Chushiro Kusano , Yasunari Umemoto , Atsushi Kurokawa
IPC分类号： H01L29/737
CPC分类号： H01L29/7304 , H01L27/0605 , H01L29/7371 , H03F2200/444 , H03F2203/21178
摘要： A heterojunction bipolar transistor with InGaP as the emitter layer and capable of both reliable electrical conduction and thermal stability wherein a GaAs layer is inserted between the InGaP emitter layer and AlGaAs ballast resistance layer, to prevent holes reverse-injected from the base layer from diffusing and reaching the AlGaAs ballast resistance layer.
摘要翻译：一种异质结双极晶体管，其具有InGaP作为发射极层，并且具有可靠的导电和热稳定性，其中GaAs层插入在InGaP发射极层和AlGaAs镇流电阻层之间，以防止从基极层反向注入的空穴扩散，达到AlGaAs镇流电阻层。

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