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    • 1. 发明授权
    • Circuit for switching between two clock signals independently of the frequency of the clock signals
    • 用于在时钟信号频率之间切换两个时钟信号的电路
    • US07586337B2
    • 2009-09-08
    • US11834737
    • 2007-08-07
    • Yasuhiro Nozaki
    • Yasuhiro Nozaki
    • G06F1/08H03K17/00
    • G06F1/08
    • A clock switching circuit for switching between plural clock signals includes a selector for outputting a first control signal when a low speed clock is selected by a selection signal with a permission signal halted, and a second control signal when a high speed clock is selected by the selection signal with a second permission signal halted. The switching circuit includes a first stabilizer for holding the first control signal in timed with the low speed clock to output the second permission signal, and a second stabilizer for holding the second control signal in timed with the high speed clock to output the first permission signal. The switching circuit includes a first and a second gating cell circuit for latching and outputting the low speed clock and the high speed clock when the second permission signal and the first permission signal is supplied, respectively.
    • 一种用于在多个时钟信号之间切换的时钟切换电路包括一个选择器,用于当由允许信号停止的选择信号选择低速时钟时输出第一控制信号;当第二控制信号由 具有第二许可信号的选择信号停止。 切换电路包括:第一稳定器,用于保持与低速时钟定时的第一控制信号以输出第二许可信号;以及第二稳定器,用于保持与高速时钟定时的第二控制信号,以输出第一允许信号 。 切换电路包括第一和第二门控单元电路,用于当提供第二许可信号和第一允许信号时分别锁存和输出低速时钟和高速时钟。
    • 4. 发明申请
    • CIRCUIT FOR SWITCHING BETWEEN TWO CLOCK SIGNALS INDEPENDENTLY OF THE FREQUENCY OF THE CLOCK SIGNALS
    • 用于切换时钟信号不同的两个时钟信号的电路
    • US20080054952A1
    • 2008-03-06
    • US11834737
    • 2007-08-07
    • Yasuhiro Nozaki
    • Yasuhiro Nozaki
    • G06F1/08
    • G06F1/08
    • A clock switching circuit for switching between plural clock signals includes a selector for outputting a first control signal when a low speed clock is selected by a selection signal with a permission signal halted, and a second control signal when a high speed clock is selected by the selection signal with a second permission signal halted. The switching circuit includes a first stabilizer for holding the first control signal in timed with the low speed clock to output the second permission signal, and a second stabilizer for holding the second control signal in timed with the high speed clock to output the first permission signal. The switching circuit includes a first and a second gating cell circuit for latching and outputting the low speed clock and the high speed clock when the second permission signal and the first permission signal is supplied, respectively.
    • 一种用于在多个时钟信号之间切换的时钟切换电路包括一个选择器,用于当由允许信号停止的选择信号选择低速时钟时输出第一控制信号;当第二控制信号由 具有第二许可信号的选择信号停止。 切换电路包括:第一稳定器,用于保持与低速时钟定时的第一控制信号以输出第二许可信号;以及第二稳定器,用于保持与高速时钟定时的第二控制信号,以输出第一允许信号 。 切换电路包括第一和第二门控单元电路,用于当提供第二许可信号和第一允许信号时分别锁存和输出低速时钟和高速时钟。