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1. 发明授权

US09001091B2 Scanning-signal-line driving circuit and display device including same 有权
标题翻译：扫描信号线驱动电路和包括它的显示装置
公开(公告)号：US09001091B2
公开(公告)日：2015-04-07
申请号：US13512389
申请日：2010-06-17
申请人： Mayuko Sakamoto , Yasuaki Iwase , Isao Ogasawara , Takaharu Yamada
发明人： Mayuko Sakamoto , Yasuaki Iwase , Isao Ogasawara , Takaharu Yamada
IPC分类号： G09G5/00 , G11C19/28 , G09G3/36 , G11C19/18
CPC分类号： G11C19/28 , G09G3/3655 , G09G3/3677 , G09G3/3688 , G09G2300/0426 , G09G2310/0286 , G09G2310/0289 , G09G2310/0291 , G09G2310/0294 , G09G2320/0223 , G11C19/184
摘要： In order to supply a low-level potential VSS from a trunk line for the low-level potential VSS to each stage of a shift register, a branch line and an auxiliary line are provided for every plurality of stages of the shift register, and the auxiliary lines are connected to the respective branch lines and the plurality of stages of the shift register. It is also possible to provide an auxiliary line having substantially the same length as the trunk line and to connect all of the branch lines and all of the stages in the shift register to this auxiliary line. A high-level potential VDD may also be supplied using the same method. Consequently, a scanning-signal-line driving circuit is provided in which the frame area and power consumption of a display panel can be reduced when formed on the display panel as an integral unit.
摘要翻译：为了将低电平电位VSS从低电位电位VSS提供给移位寄存器的每个级，为移位寄存器的每个级提供分支线和辅助线，并且辅助线路连接到相应的分支线路和移位寄存器的多个级。还可以提供具有与中继线大致相同长度的辅助线，并将移位寄存器中的所有分支线和所有级连接到该辅助线。也可以使用相同的方法提供高电平电位VDD。因此，提供了一种扫描信号线驱动电路，其中当作为整体单元形成在显示面板上时，可以减小显示面板的框架面积和功耗。

2. 发明授权

US08803785B2 Scanning signal line drive circuit and display device having the same 有权
标题翻译：扫描信号线驱动电路和具有相同功能的显示装置
公开(公告)号：US08803785B2
公开(公告)日：2014-08-12
申请号：US13636148
申请日：2011-01-18
申请人： Yoshihisa Takahashi , Yasuaki Iwase
发明人： Yoshihisa Takahashi , Yasuaki Iwase
IPC分类号： G09G3/36 , G11C19/28 , H01L27/32 , H03K3/356 , G11C19/18
CPC分类号： G11C19/28 , G09G3/3677 , G11C19/184 , H01L27/32 , H03K3/356026
摘要： Stability of a circuit operation in a monolithic gate driver is improved. A bistable circuit is provided with a charge replenishment circuit (71) including: a capacitor (CAP2); a thin-film transistor (MA) having a first electrode supplied with a first clock for charge replenishment (CKA), a second electrode connected to a third-node (N3) connected to one end of the capacitor (CAP2), and a third electrode connected to a second-node (N2) to be maintained at the high level during a normal operation period; and a thin-film transistor (MB) having a first electrode supplied with a second clock for charge replenishment (CKB), a second electrode supplied with a high-level DC power supply potential (VDD), and a third electrode connected to the third-node (N3). The first clock for charge replenishment (CKA) and the second clock for charge replenishment (CKB) are alternately driven to the high level so as to eliminate a period in which “the first clock for charge replenishment (CKA) is at the high level and the second clock for charge replenishment (CKB) is at the high level”.
摘要翻译：提高了单片栅极驱动器中电路操作的稳定性。双稳电路设有电荷补充电路（71），包括：电容器（CAP2）; 具有提供有用于充电补充的第一时钟（CKA）的第一电极的薄膜晶体管（MA），连接到连接到电容器（CAP2）的一端的第三节点（N3））的第二电极，以及第三电极连接到第二节点（N2）的电极在正常操作期间保持在高电平; 以及薄膜晶体管（MB），具有提供有用于充电补充的第二时钟（CKB）的第一电极，提供有高电平直流电源电位（VDD）的第二电极和连接到第三电极节点（N3）。充电补充（CKA）的第一时钟和充电补充（CKB）的第二时钟被交替地驱动到高电平，以消除“充电充电（CKA）的第一时钟处于高电平的时段，以及充电补充的第二个时钟（CKB）处于高位“。

3. 发明申请

US20140111495A1 SCANNING SIGNAL LINE DRIVE CIRCUIT, DISPLAY DEVICE HAVING THE SAME, AND DRIVING METHOD FOR SCANNING SIGNAL LINE 有权
标题翻译：扫描信号线驱动电路，具有该扫描信号线驱动电路的显示装置以及扫描信号线的驱动方法
公开(公告)号：US20140111495A1
公开(公告)日：2014-04-24
申请号：US14117959
申请日：2012-05-16
申请人： Yasuaki Iwase
发明人： Yasuaki Iwase
IPC分类号： H03K3/012 , G09G3/36
CPC分类号： H03K3/012 , G09G3/3677 , G09G3/3696 , G09G2310/0286 , G11C19/28
摘要： The purpose of this invention is to increase reliability of a switching element while reducing consumption power. In the vertical blanking period, an end pulse signal (ED) changes from the low level to the high level. The potential of first nodes (N1) in the first stage to (m−1)th stage of cascade-connected m-stage bistable circuits included in a shift register of the scanning signal drive circuit is reliably maintained at the low level, and the potential of second nodes (N2) in the first stage to the (m−1)th stage changes from the high level to the low level. In a bistable circuit in the m-th stage, the potential of the first node (N1) in the m-th stage changes from the high level to the low level, and the potential of the second node (N2) in the m-th stage is maintained at the low level. The supply to a bistable circuit of clock signals (CKA, CKB) is stopped. Until a write period in the subsequent vertical scanning period, the potential of the first node (N1) and the potential of the second node (N2) in each stage are maintained at the low level.
摘要翻译：本发明的目的是提高开关元件的可靠性，同时降低功耗。在垂直消隐期间，结束脉冲信号（ED）从低电平变为高电平。包括在扫描信号驱动电路的移位寄存器中的级联连接的m级双稳态电路的第一级到第（m-1）级的第一级（N1）的电位被可靠地保持在低电平，第一级到第（m-1）级的第二节点（N2）的电位从高电平变为低电平。在第m阶段的双稳态电路中，第m阶段的第1节点（N1）的电位从高电平变化到低电平，第m节点的第2节点（N2）第三阶段维持在低水平。时钟信号（CKA，CKB）的双稳态电路的供给停止。直到在随后的垂直扫描周期中的写入周期，第一节点（N1）的电位和每个级中的第二节点（N2）的电位保持在低电平。

4. 发明授权

US08593210B2 Signal distribution device and display device 有权
标题翻译：信号分配装置和显示装置
公开(公告)号：US08593210B2
公开(公告)日：2013-11-26
申请号：US13144464
申请日：2009-09-29
申请人： Mayuko Sakamoto , Yoshihisa Takahashi , Yasuaki Iwase
发明人： Mayuko Sakamoto , Yoshihisa Takahashi , Yasuaki Iwase
IPC分类号： H03K17/687
CPC分类号： H01L29/458 , G02F1/13454 , G02F2001/13606 , G02F2201/124 , G09G3/3648 , G09G3/3655 , G09G3/3688 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L29/7869
摘要： A peripheral region of a display panel includes a signal distribution device (4) for time-dividing and distributing, to output terminals (7), an output signal from a source driver. The signal distribution device (4) includes switching elements (20) for the output terminals (7). Each switching element (20) is controlled by a selection signal supplied to a control line (9) connected with a gate electrode. Each switching element (20) includes a source electrode and the drain electrode each having a comb-like shape having a stem part and branch parts extending therefrom. In at least one switching element (20), only all of or part of the branch parts overlap the control line (9) and a semiconductor layer (10). This suppresses abnormal heat generation of a source driver in a display device including the signal distribution circuit by which an output signal from the source driver is distributed to pixels in time series.
摘要翻译：显示面板的外围区域包括：信号分配装置（4），用于对输出端子（7）进行分时和分配来自源极驱动器的输出信号。信号分配装置（4）包括用于输出端子（7）的开关元件（20）。每个开关元件（20）由提供给与栅电极连接的控制线（9）的选择信号控制。每个开关元件（20）包括源电极和漏电极，每个具有梳状形状，其具有杆部分和从其延伸的分支部分。在至少一个开关元件（20）中，只有全部或部分分支部分与控制线（9）和半导体层（10）重叠。这抑制了包括信号分配电路的显示装置中的源极驱动器的异常发热，通过该信号分配电路，来自源极驱动器的输出信号以时间序列分布到像素。

5. 发明授权

US08587509B2 Display device and drive method for driving the same 有权
标题翻译：显示装置及其驱动方法
公开(公告)号：US08587509B2
公开(公告)日：2013-11-19
申请号：US12998517
申请日：2009-06-12
申请人： Yoshihisa Takahashi , Yasuaki Iwase , Mayuko Sakamoto
发明人： Yoshihisa Takahashi , Yasuaki Iwase , Mayuko Sakamoto
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G2310/027 , G09G2310/0297 , G09G2320/0219
摘要： A display device of at least one embodiment of the present invention has a connection changeover circuit, including switch elements for time-division driving, formed on a liquid crystal panel, and the switch elements are paired so that two switch elements in each pair are connected in parallel to one video signal line. The paired switch elements are turned on at the same time, and immediately before one of the switch elements is turned off upon completion of a charging period for its corresponding video signal line, only the other switch element is turned off. As a result, while maintaining drive performance, it is possible to solve the impact of fieldthrough phenomenon caused by one of the switch elements, which are transistors, and also reduce parasitic capacitance formed in the other switch element, thereby suppress the impact of fieldthrough phenomenon caused by that switch element.
摘要翻译：本发明的至少一个实施例的显示装置具有形成在液晶面板上的包括用于时分驱动的开关元件的连接切换电路，并且开关元件配对，使得每对中的两个开关元件被连接与一条视频信号线并联。成对的开关元件同时导通，并且在其相应的视频信号线的充电周期完成之后，在其中一个开关元件关闭之前，只有另一个开关元件被关断。结果，在保持驱动性能的同时，可以解决由作为晶体管的开关元件之一引起的场通过现象的影响，并且还减少在另一个开关元件中形成的寄生电容，从而抑制场通现象的影响由该开关元件引起。

6. 发明申请

US20130093743A1 SCANNING SIGNAL LINE DRIVE CIRCUIT AND DISPLAY DEVICE PROVIDED WITH SAME 有权
标题翻译：扫描信号线驱动电路和显示设备提供
公开(公告)号：US20130093743A1
公开(公告)日：2013-04-18
申请号：US13805781
申请日：2011-05-20
申请人： Yoshihisa Takahashi , Yasuaki Iwase
发明人： Yoshihisa Takahashi , Yasuaki Iwase
IPC分类号： G09G5/00
CPC分类号： G09G5/001 , G09G3/3677 , G09G2310/0286 , G09G2310/06 , G11C19/184 , G11C19/28
摘要： In a monolithic gate driver, a power consumption is reduced as compared with a conventional one without lowering a voltage of a scanning signal to be applied to a gate bus line as compared with a conventional one.A stage constituent circuit includes first-node to third-node, a thin-film transistor (M7) that changes a potential of a scanning signal toward a VDD potential when a potential of the first-node is in a HIGH level, a thin-film transistor (M6) that changes a potential of a different stage control signal toward a potential of a clock (CKA) when a potential of the second-node is in the HIGH level, a capacitor (C1) that is disposed between the first-node and the second-node, and a capacitor (C2) that is disposed between the second-node and the third-node. The potential of the first-node is raised on the basis of a different stage control signal output from the stage constituent circuit in the different stage, and then the potential of the second-node and a potential of the third-node are sequentially raised. Herein, an amplitude of the clock is set to be smaller than an amplitude of the scanning signal.
摘要翻译：在单片栅极驱动器中，与常规栅极驱动器相比，与常规栅极驱动器相比，功率消耗降低，而不降低要施加到栅极总线的扫描信号的电压。阶段构成电路包括第一节点至第三节点，当第一节点的电位处于高电平时，将扫描信号的电位改变为VDD电位的薄膜晶体管（M7）当第二节点的电位处于高电平时，将不同级控制信号的电位变化为时钟（CKA）的电位的薄膜晶体管（M6）;电容器（C1）节点和第二节点，以及设置在第二节点和第三节点之间的电容器（C2）。第一节点的电位根据在不同级中的级构成电路输出的不同级控制信号而增加，然后第二节点的电位和第三节点的电位依次上升。这里，时钟的幅度被设定为小于扫描信号的幅度。

7. 发明申请

US20120320008A1 SCANNING SIGNAL LINE DRIVE CIRCUIT AND DISPLAY DEVICE HAVING THE SAME 有权
标题翻译：扫描信号线驱动电路和具有该信号的显示装置
公开(公告)号：US20120320008A1
公开(公告)日：2012-12-20
申请号：US13580466
申请日：2010-10-14
申请人： Yoshihisa Takahashi , Yasuaki Iwase
发明人： Yoshihisa Takahashi , Yasuaki Iwase
IPC分类号： G06F3/038
CPC分类号： G09G3/3677 , G02F1/13454 , G09G2310/0283 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： A bistable circuit includes an input terminal (41) for a set signal, an input terminal (42) for a reset signal, an output terminal (48) for a state signal, a thin-film transistor (M2) for increasing a potential of the output terminal (48) based on a first clock, a thin-film transistor (M1) for increasing a potential of a first-node connected to a gate terminal of the thin-film transistor (M2) based on the set signal, a thin-film transistor (M5) for decreasing the potential of the first-node, a thin-film transistor (M7) for increasing a potential of a second-node connected to a gate terminal of the thin-film transistor (M5) based on the reset signal, a thin-film transistor (M6) for decreasing the potential of the output terminal (48) based on the potential of the second-node, a thin-film transistor (M3) for increasing the potential of the second-node based on the set signal, and a capacitor (CAP2) having one end connected to the second-node and the other end connected to the input terminal (41).
摘要翻译：双稳态电路包括用于设定信号的输入端（41），用于复位信号的输入端（42），用于状态信号的输出端（48），用于增加电位的电位的薄膜晶体管（M2）基于第一时钟的输出端子（48），用于基于所设置的信号增加连接到薄膜晶体管（M2）的栅极端子的第一节点的电位的薄膜晶体管（M1），用于降低第一节点的电位的薄膜晶体管（M5），用于增加连接到薄膜晶体管（M5）的栅极端子的第二节点的电位的薄膜晶体管（M7），基于复位信号，用于基于第二节点的电位减小输出端子（48）的电位的薄膜晶体管（M6），用于增加第二节点的电位的薄膜晶体管（M3）基于所设置的信号，以及电容器（CAP2），其一端连接到第二节点，另一端连接到输入端子 nal（41）。

8. 发明申请

US20120235983A1 SCANNING-SIGNAL-LINE DRIVING CIRCUIT AND DISPLAY DEVICE INCLUDING SAME 有权
标题翻译：扫描信号线驱动电路和包括其的显示装置
公开(公告)号：US20120235983A1
公开(公告)日：2012-09-20
申请号：US13512389
申请日：2010-06-17
申请人： Mayuko Sakamoto , Yasuaki Iwase , Isao Ogasawara , Takaharu Yamada
发明人： Mayuko Sakamoto , Yasuaki Iwase , Isao Ogasawara , Takaharu Yamada
IPC分类号： G09G5/00
CPC分类号： G11C19/28 , G09G3/3655 , G09G3/3677 , G09G3/3688 , G09G2300/0426 , G09G2310/0286 , G09G2310/0289 , G09G2310/0291 , G09G2310/0294 , G09G2320/0223 , G11C19/184
摘要： In order to supply a low-level potential VSS from a trunk line (21) for the low-level potential VSS to each stage of a shift register (11), a branch line (22) and an auxiliary line (23) are provided for every plurality of stages of the shift register (11), and the auxiliary lines (23) are connected to the respective branch lines (22) and the plurality of stages of the shift register (11). It is also possible to provide an auxiliary line (23) having substantially the same length as the trunk line (21) and to connect all of the branch lines (22) and all of the stages in the shift register (11) to this auxiliary line (23). A high-level potential VDD may also be supplied using the same method. Consequently, a scanning-signal-line driving circuit is provided in which the frame area and power consumption of a display panel can be reduced when formed on the display panel as an integral unit.
摘要翻译：为了从用于低电平电位VSS的干线（21）向移位寄存器（11）的各级提供低电平电位VSS，提供分支线（22）和辅助线（23）对于移位寄存器（11）的每个级，并且辅助线（23）连接到移位寄存器（11）的相应分支线（22）和多级。还可以提供具有与中继线（21）基本上相同长度的辅助线（23），并将移位寄存器（11）中的所有分支线（22）和所有级连接到该辅助线线（23）。也可以使用相同的方法提供高电平电位VDD。因此，提供了一种扫描信号线驱动电路，其中当作为整体单元形成在显示面板上时，可以减小显示面板的框架面积和功耗。

9. 发明申请

US20120087459A1 Shift Register And Display Device 有权
标题翻译：移位寄存器和显示设备
公开(公告)号：US20120087459A1
公开(公告)日：2012-04-12
申请号：US13376401
申请日：2010-02-24
申请人： Masahiko Nakamizo , Masashi Yonemaru , Yasuaki Iwase , Kenichi Ishii
发明人： Masahiko Nakamizo , Masashi Yonemaru , Yasuaki Iwase , Kenichi Ishii
IPC分类号： G11C19/00
CPC分类号： G11C19/184 , G09G3/3677 , G09G2310/0286 , G09G2320/029
摘要： To provide a shift register and a display device each capable of satisfactorily preventing noises of individual stage outputs without increasing circuit complexity, each stage of the shift register includes: a first output transistor; a first capacitor; an input gate; a first switching element; a second switching element; a third switching element; a fourth switching element; and a fifth switching element.
摘要翻译：为了提供移位寄存器和显示装置，每个移位寄存器和显示装置能够令人满意地防止各级输出的噪声而不增加电路复杂度，移位寄存器的每一级包括：第一输出晶体管; 第一电容器; 输入门第一开关元件; 第二开关元件; 第三开关元件; 第四开关元件; 和第五开关元件。

10. 发明授权

US07315603B2 Semiconductor storage device, method for protecting predetermined memory element and portable electronic equipment 有权
标题翻译：半导体存储装置，用于保护预定存储元件和便携式电子设备的方法
公开(公告)号：US07315603B2
公开(公告)日：2008-01-01
申请号：US10848312
申请日：2004-05-19
申请人： Yasuaki Iwase , Yoshifumi Yaoi , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
发明人： Yasuaki Iwase , Yoshifumi Yaoi , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
IPC分类号： G11C8/00
CPC分类号： H01L29/78696 , B82Y10/00 , G11C7/24 , G11C16/0458 , G11C16/0475 , G11C16/22 , G11C2216/06 , H01L21/28282 , H01L21/28291 , H01L29/42384 , H01L29/792
摘要： There is provided a semiconductor storage device and portable electronic equipment including a nonvolatile memory element that can easily be miniaturized. The semiconductor storage device includes a memory cell array 21 in which a plurality of memory elements 1 are arranged and a write state machine 32. The memory element 1 includes a gate electrode 104 formed on a semiconductor layer 102 via a gate insulator 103, a channel region arranged below the gate electrode 104, diffusion regions 107a, 107b that are located on both sides of the channel region and have a conductive type opposite to that of the channel region and memory function bodies 109 that are located on both sides of the gate electrode 104 and have a function to retain electric charge. The write state machine 32 can selectively prevent program and erase of data in the memory elements within a predetermined range.
摘要翻译：提供了一种包括易于小型化的非易失性存储元件的半导体存储装置和便携式电子设备。半导体存储装置包括其中布置有多个存储元件1的存储单元阵列21和写入状态机32。存储元件1包括通过栅极绝缘体103形成在半导体层102上的栅电极104，布置在栅电极104下方的沟道区，位于沟道区两侧的扩散区107a，107b，并具有与沟道区域和记忆功能体109相对的导电类型，其位于栅极电极104的两侧并具有保持电荷的功能。写状态机32可以选择性地防止在预定范围内的存储器元件中的数据的编程和擦除。

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