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    • 3. 发明授权
    • Arranging virtual patterns in semiconductor layout
    • 在半导体布局中排列虚拟图案
    • US08359555B2
    • 2013-01-22
    • US12868694
    • 2010-08-25
    • Yan-Liang Ji
    • Yan-Liang Ji
    • G06F17/50
    • G06F17/5081G06F2217/12Y02P90/265
    • A computer readable medium comprising multiple instructions stored in a computer readable device, upon executing these instructions, a computer performing the following steps: providing a first semiconductor layout and a second semiconductor layout predetermined to be fabricated on different material layers of a semiconductor device, the second semiconductor layout comprising a circuit pattern; setting a forbidden area of the circuit pattern on the first semiconductor layout according to a restriction condition; defining at least a virtual pattern arrangement area on a portion of the first semiconductor layout which does not correspond to the forbidden area; and selecting a positioning point at a boundary of the virtual pattern arrangement area and providing a virtual pattern array in the virtual pattern arrangement by taking the positioning point as an origin of a coordinate system of the virtual pattern array.
    • 一种计算机可读介质,包括存储在计算机可读设备中的多个指令,在执行这些指令时,计算机执行以下步骤:提供预定要制造在半导体器件的不同材料层上的第一半导体布局和第二半导体布局, 包括电路图案的第二半导体布局; 根据限制条件在第一半导体布局上设置电路图案的禁区; 在所述第一半导体布局的与禁止区域不对应的部分上至少限定虚拟图案布置区域; 以及在所述虚拟图案布置区域的边界处选择定位点,并通过将所述定位点作为所述虚拟图案阵列的坐标系的原点来提供所述虚拟图案布置中的虚拟图案阵列。
    • 4. 发明申请
    • COMPUTER READABLE MEDIUM HAVING MULTIPLE INSTRUCTIONS STORED IN A COMPUTER READABLE DEVICE
    • 具有存储在计算机可读设备中的多个指令的计算机可读介质
    • US20100325592A1
    • 2010-12-23
    • US12868694
    • 2010-08-25
    • Yan-Liang Ji
    • Yan-Liang Ji
    • G06F17/50
    • G06F17/5081G06F2217/12Y02P90/265
    • A computer readable medium comprising multiple instructions stored in a computer readable device, upon executing these instructions, a computer performing the following steps: providing a first semiconductor layout and a second semiconductor layout predetermined to be fabricated on different material layers of a semiconductor device, the second semiconductor layout comprising a circuit pattern; setting a forbidden area of the circuit pattern on the first semiconductor layout according to a restriction condition; defining at least a virtual pattern arrangement area on a portion of the first semiconductor layout which does not correspond to the forbidden area; and selecting a positioning point at a boundary of the virtual pattern arrangement area and providing a virtual pattern array in the virtual pattern arrangement by taking the positioning point as an origin of a coordinate system of the virtual pattern array.
    • 一种计算机可读介质,包括存储在计算机可读设备中的多个指令,在执行这些指令时,计算机执行以下步骤:提供预定要制造在半导体器件的不同材料层上的第一半导体布局和第二半导体布局, 包括电路图案的第二半导体布局; 根据限制条件在第一半导体布局上设置电路图案的禁区; 在所述第一半导体布局的与禁止区域不对应的部分上至少限定虚拟图案布置区域; 以及在所述虚拟图案布置区域的边界处选择定位点,并通过将所述定位点作为所述虚拟图案阵列的坐标系的原点来提供所述虚拟图案布置中的虚拟图案阵列。