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    • 1. 发明授权
    • Process variation tolerant circuit with voltage interpolation and variable latency
    • 具有电压内插和可变延迟的过程变差容限电路
    • US07667497B2
    • 2010-02-23
    • US12261771
    • 2008-10-30
    • Xiaoyao LiangDavid BrooksGu-Yeon Wei
    • Xiaoyao LiangDavid BrooksGu-Yeon Wei
    • H03K19/00
    • H02J1/10H03K5/135H03K2005/00065H03K2005/0011Y10T307/696
    • A circuit having dynamically controllable power. The circuit comprises a plurality of pipelined stages, each of the pipelined stages comprising two clocking domains, a plurality of switching circuits, each switching circuit being connected to one of the pipelined stages, first and second power sources connected to each of the plurality of pipelined stages through the switching circuits, the first power source supplying a first voltage and the second power source supplying a second voltage, wherein the first and second power sources each may be applied to a pipelined stage independently of other pipelined stages, first and second complementary clocks, and a plurality of latches connected to the first and second complementary clocks and to the plurality of pipelined stages for proving latch-based clocking to control the first and second clocking domains and to enable time-borrowing across the plurality of switching circuits. The first voltage differs from the second voltage and the plurality of pipelined stages interpolates between the first and second voltages to provide differing effective voltages between the first and second voltages.
    • 具有动态可控功率的电路。 电路包括多个流水线级,每个流水线级包括两个时钟域,多个开关电路,每个开关电路连接到一个流水线级,第一和第二电源连接到多个流水线 通过开关电路的级,提供第一电压的第一电源和提供第二电压的第二电源,其中第一和第二电源各自可以独立于其它流水线级施加到流水线级,第一和第二补充时钟 以及连接到第一和第二互补时钟和多个流水线级的多个锁存器,用于证明基于锁存器的时钟以控制第一和第二时钟域并且能够跨越多个开关电路进行时间借用。 第一电压与第二电压不同,并且多个流水线级在第一和第二电压之间内插,以在第一和第二电压之间提供不同的有效电压。
    • 2. 发明申请
    • Process Variation Tolerant Circuit With Voltage Interpolation And Variable Latency
    • 具有电压插补和可变延迟的过程变差容限电路
    • US20090134707A1
    • 2009-05-28
    • US12261771
    • 2008-10-30
    • Xiaoyao LiangDavid BrooksGu-Yeon Wei
    • Xiaoyao LiangDavid BrooksGu-Yeon Wei
    • H02J1/00
    • H02J1/10H03K5/135H03K2005/00065H03K2005/0011Y10T307/696
    • A circuit having dynamically controllable power. The circuit comprises a plurality of pipelined stages, each of the pipelined stages comprising two clocking domains, a plurality of switching circuits, each switching circuit being connected to one of the pipelined stages, first and second power sources connected to each of the plurality of pipelined stages through the switching circuits, the first power source supplying a first voltage and the second power source supplying a second voltage, wherein the first and second power sources each may be applied to a pipelined stage independently of other pipelined stages, first and second complementary clocks, and a plurality of latches connected to the first and second complementary clocks and to the plurality of pipelined stages for proving latch-based clocking to control the first and second clocking domains and to enable time-borrowing across the plurality of switching circuits. The first voltage differs from the second voltage and the plurality of pipelined stages interpolates between the first and second voltages to provide differing effective voltages between the first and second voltages.
    • 具有动态可控功率的电路。 电路包括多个流水线级,每个流水线级包括两个时钟域,多个开关电路,每个开关电路连接到一个流水线级,第一和第二电源连接到多个流水线 通过开关电路的级,提供第一电压的第一电源和提供第二电压的第二电源,其中第一和第二电源各自可以独立于其它流水线级施加到流水线级,第一和第二补充时钟 以及连接到第一和第二互补时钟和多个流水线级的多个锁存器,用于证明基于锁存器的时钟以控制第一和第二时钟域并且能够跨越多个开关电路进行时间借用。 第一电压与第二电压不同,并且多个流水线级在第一和第二电压之间内插,以在第一和第二电压之间提供不同的有效电压。