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1. 发明授权

US08924644B2 Extending cache in a multi-processor computer 有权
标题翻译：在多处理器计算机中扩展缓存
公开(公告)号：US08924644B2
公开(公告)日：2014-12-30
申请号：US13338804
申请日：2011-12-28
申请人： William E. Atherton , Marcus A. Baker , Sreekanth Konireddygari , Jeffrey B. Williams
发明人： William E. Atherton , Marcus A. Baker , Sreekanth Konireddygari , Jeffrey B. Williams
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F12/08
CPC分类号： G06F12/084 , G06F11/073 , G06F11/0793 , G06F11/1666 , G06F11/20 , G06F12/0842 , G06F2201/81
摘要： Methods, apparatuses, and computer program products of extending cache in a multi-processor computer are provided. Embodiments include detecting, by a donor processor, nonuse of a donor processor's cache; broadcasting to one or more processors in the multi-processor computer, by the donor processor, a donor-ready message indicating the donor processor's cache is available for ownership transferment; receiving from a first requesting processor, by the donor processor, a first ownership-request message requesting ownership of the donor processor's cache by the first requesting processor; transmitting to the first requesting processor, by the donor processor, an ownership-grant message indicating an intention of the donor processor to transfer ownership of the donor processor's cache to the first requesting processor; and receiving from the first requesting processor, by the donor processor, an ownership-claim message indicating that the first requesting processor intends to claim ownership of the donor processor's cache.
摘要翻译：提供了在多处理器计算机中扩展缓存的方法，装置和计算机程序产品。实施例包括由供体处理器检测不使用施主处理器的高速缓存; 通过供体处理器向多处理器计算机中的一个或多个处理器广播指示供体处理器的高速缓存的供体就绪消息可用于所有权转移; 由施主处理器从第一请求处理器接收由第一请求处理器请求所述施主处理器的高速缓存的所有权的第一所有权请求消息; 由所述供体处理器向所述第一请求处理器发送指示所述供体处理器将所述施主处理器的高速缓存的所有权转移给所述第一请求处理器的所有权授权消息; 以及由所述供体处理器从所述第一请求处理器接收指示所述第一请求处理器旨在要求所述供体处理器的高速缓存的所有权的所有权声明消息。

2. 发明授权

US08132055B2 Operating system-firmware interface update recovery 失效
标题翻译：操作系统 - 固件界面更新恢复
公开(公告)号：US08132055B2
公开(公告)日：2012-03-06
申请号：US12622969
申请日：2009-11-20
申请人： Paul L. Anderson , William E. Atherton , Tu T. Dang , Michael C. Elles
发明人： Paul L. Anderson , William E. Atherton , Tu T. Dang , Michael C. Elles
IPC分类号： G06F11/00
CPC分类号： G06F11/1433 , G06F11/1417 , G06F11/2284
摘要： Operating system (‘OS’)-firmware interface update recovery including determining, for each of a plurality of available OS-firmware interface images for booting a computer, whether each available OS-firmware interface image is corrupted or uncorrupted; setting, for each corrupted OS-firmware interface image, a predictive failure analysis (‘PFA’) bit in nonvolatile memory available to the OS-firmware interface update recovery module; selecting an uncorrupted OS-firmware interface image; initiating a boot for the computer with the selected OS-firmware interface image; determining whether a previous update to one of the available OS-firmware interface images was interrupted; and notifying a user that the previous update was interrupted if the previous update to one of the available OS-firmware interface images interrupted.
摘要翻译：操作系统（“OS”） - 固件接口更新恢复，包括为每个可用的用于引导计算机的可用OS固件接口图像确定每个可用OS-固件接口图像是否损坏或未被破坏; 对于每个损坏的OS固件界面图像，设置OS固件接口更新恢复模块可用的非易失性存储器中的预测故障分析（“PFA”）位; 选择未被破坏的OS固件界面图像; 使用所选的OS固件界面图像启动计算机的引导; 确定对所述可用OS固件接口图像之一的先前更新是否被中断; 并且如果先前更新到可用的OS固件接口图像之一被中断，则通知用户先前更新被中断。

3. 发明授权

US08108180B2 End of life prediction of flash memory 有权
标题翻译：闪存的寿命预测
公开(公告)号：US08108180B2
公开(公告)日：2012-01-31
申请号：US12041320
申请日：2008-03-03
申请人： Tara Astigarraga , William E. Atherton , Michael E. Browne
发明人： Tara Astigarraga , William E. Atherton , Michael E. Browne
IPC分类号： G06F12/00
CPC分类号： G11C16/349 , G06F11/008 , G06F11/3466 , G06F12/0246 , G06F2201/88
摘要： Disclosed are a method, electronic device, and computer readable medium for determining an end-of-life stage of the flash memory. The method includes detecting at least one life cycle event associated with a flash memory residing on an electronic device. A counter that is associated with the life cycle event is then incremented. Based on the counter, a total number of occurrences for the one life cycle event is determined. The total number of occurrences for the at least one given threshold is also determined. A current life cycle stage of the flash memory is identified based at least in part on determining if the total number of occurrences exceeds at least one given threshold. The life cycle stage is associated with the at least one given threshold. A user is then notified of the life cycle state of the flash memory.
摘要翻译：公开了一种用于确定闪存的寿命阶段的方法，电子设备和计算机可读介质。该方法包括检测与驻留在电子设备上的闪存相关联的至少一个生命周期事件。然后增加与生命周期事件相关联的计数器。基于计数器，确定一个生命周期事件的总发生次数。还确定了至少一个给定阈值的总出现次数。至少部分地基于确定总发生次数是否超过至少一个给定阈值来识别闪存的当前生命周期阶段。生命周期阶段与至少一个给定的阈值相关联。然后，向用户通知闪存的生命周期状态。

4. 发明授权

US08103993B2 Structure for dynamically allocating lanes to a plurality of PCI express connectors 有权
标题翻译：用于向多个PCI Express连接器动态分配车道的结构
公开(公告)号：US08103993B2
公开(公告)日：2012-01-24
申请号：US12131291
申请日：2008-06-02
申请人： William E. Atherton , Marcus A. Baker , Eric R. Kern
发明人： William E. Atherton , Marcus A. Baker , Eric R. Kern
IPC分类号： G06F17/50
CPC分类号： G06F13/4022
摘要： A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for dynamically allocating lanes to a plurality of PCI Express connectors is disclosed that include identifying whether a PCI Express device is installed into each PCI Express connector, and assigning a portion of the lanes to each PCI Express connector having a PCI Express device installed into the PCI Express connector. Dynamically allocating lanes to a plurality of PCI Express connectors may also include identifying a device type for each PCI Express device installed into the plurality of PCI Express connectors, creating allocation rules that specify the allocation of lanes to the plurality of PCI Express connectors, and receiving user allocation preferences that specify the allocation of lanes to the plurality of PCI Express connectors.
摘要翻译：公开了一种体现在用于设计，制造和/或测试用于向多个PCI Express连接器动态分配通道的设计的机器可读存储介质中的设计结构，其包括识别PCI Express设备是否安装到每个PCI Express连接器中，并将一部分通道分配给具有安装在PCI Express连接器中的PCI Express设备的每个PCI Express连接器。动态分配多个PCI Express连接器的通道还可以包括识别安装到多个PCI Express连接器中的每个PCI Express设备的设备类型，创建指定到多个PCI Express连接器的通道分配的分配规则，以及接收指定向多个PCI Express连接器分配通道的用户分配首选项。

5. 发明申请

US20110040916A1 SYSTEM RECONFIGURATION OF EXPANSION CARDS 有权
标题翻译：扩展卡的系统重构
公开(公告)号：US20110040916A1
公开(公告)日：2011-02-17
申请号：US12540172
申请日：2009-08-12
申请人： William E. Atherton
发明人： William E. Atherton
IPC分类号： G06F13/00
CPC分类号： G06F13/4295
摘要： A method and computer program product for improving or optimizing the configuration of expansion cards and expansion card slots in a computer system. The slot width of each slot is serially set to two or more link widths supported by the expansion card that is connect in each slot and each of the plurality of expansion cards is retrained at each of the set slot widths. The current link speed and a current link width for each of the plurality of expansion cards may be identified at each of the set slot widths to enable a determination of a configuration of the plurality of expansion cards within the plurality of expansion card slots that will improve collective throughput of the expansion cards. Optionally, the throughput of one expansion card may be prioritized over the throughput of another expansion card, such as those expansion cards or functionalities specified by user preferences or identified by system monitoring of loads placed on the expansion cards.
摘要翻译：一种用于改进或优化计算机系统中的扩展卡和扩展卡插槽的配置的方法和计算机程序产品。每个插槽的插槽宽度被串行设置为由每个插槽中连接的扩展卡所支持的两个或多个链路宽度，并且多个扩展卡中的每一个在每个设置的时隙宽度上被再培训。可以在每个设置的时隙宽度处识别多个扩展卡中的每一个的当前链路速度和当前链路宽度，以便能够确定将在多个扩展卡槽内改善的多个扩展卡的配置扩充卡的集体吞吐量。可选地，一个扩展卡的吞吐量可以优先于另一扩展卡的吞吐量，例如那些扩展卡或由用户偏好指定的功能或通过系统监视放置在扩展卡上的负载来识别。

6. 发明授权

US07657688B2 Dynamically allocating lanes to a plurality of PCI express connectors 有权
标题翻译：动态分配车道到多个PCI快速连接器
公开(公告)号：US07657688B2
公开(公告)日：2010-02-02
申请号：US12262528
申请日：2008-10-31
申请人： William E. Atherton , Marcus A. Baker , Eric R. Kern
发明人： William E. Atherton , Marcus A. Baker , Eric R. Kern
IPC分类号： G06F13/00
CPC分类号： G06F13/4022
摘要： Method, apparatus, and computer program products for dynamically allocating lanes to a plurality of PCI Express connectors are disclosed that include identifying whether a PCI Express device is installed into each PCI Express connector, and assigning a portion of the lanes to each PCI Express connector having a PCI Express device installed into the PCI Express connector. Dynamically allocating lanes to a plurality of PCI Express connectors may also include identifying a device type for each PCI Express device installed into the plurality of PCI Express connectors. Dynamically allocating lanes to a plurality of PCI Express connectors may also include creating allocation rules that specify the allocation of lanes to the plurality of PCI Express connectors. Dynamically allocating lanes to a plurality of PCI Express connectors may also include receiving user allocation preferences that specify the allocation of lanes to the plurality of PCI Express connectors.
摘要翻译：公开了用于向多个PCI Express连接器动态分配通道的方法，装置和计算机程序产品，其包括识别PCI Express设备是否安装到每个PCI Express连接器中，以及将一部分通道分配给每个具有 PCI Express设备安装到PCI Express连接器中。动态分配多个PCI Express连接器的通道还可以包括识别安装到多个PCI Express连接器中的每个PCI Express设备的设备类型。动态地将车道分配到多个PCI Express连接器还可以包括创建指定到多个PCI Express连接器的车道分配的分配规则。动态分配多个PCI Express连接器的通道还可以包括接收指定对多个PCI Express连接器的通道分配的用户分配偏好。

7. 发明申请

US20080201547A1 STRUCTURE FOR STORAGE ALLOCATION MANAGEMENT IN SWITCHES UTILIZING FLOW CONTROL 审中-公开
标题翻译：利用流量控制开关中存储分配管理的结构
公开(公告)号：US20080201547A1
公开(公告)日：2008-08-21
申请号：US12109963
申请日：2008-04-25
申请人： William E. Atherton , Marcus A. Baker , Eric R. Kern
发明人： William E. Atherton , Marcus A. Baker , Eric R. Kern
IPC分类号： G06F12/02
CPC分类号： G06F12/0284
摘要： A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for managing allocation of storage in a switch utilizing flow control is provided. The design structure includes a switch having a plurality of ports and an internal storage divided into a plurality of storage units. The design structure provides for monitoring an average number of storage units used by each of the plurality of ports over a predetermined time period, setting a threshold for the average number of storage units used by each of the plurality of ports, and allocating one or more available storage units assigned to a first port to a second port in response to storage allocation management being enabled for the second port and the average number of storage units used by the second port exceeding the threshold for the second port.
摘要翻译：提供了一种体现在机器可读存储介质中的设计结构，用于设计，制造和/或测试用于管理利用流量控制的开关中的存储分配的设计。该设计结构包括具有多个端口的开关和分成多个存储单元的内部存储器。该设计结构提供用于监视在预定时间段内由多个端口中的每一个使用的平均数量的存储单元，设置由多个端口中的每个端口使用的平均数量的存储单元的阈值，并且分配一个或多个响应于对第二端口启用的存储分配管理和第二端口使用的平均存储单元数量超过第二端口的阈值，可用存储单元被分配给第一端口到第二端口。

8. 发明申请

US20080162078A1 END OF LIFE PREDICTION OF FLASH MEMORY 有权
公开(公告)号：US20080162078A1
公开(公告)日：2008-07-03
申请号：US12041304
申请日：2008-03-03
申请人： TARA ASTIGARRAGA , William E. ATHERTON , Michael E. BROWNE
发明人： TARA ASTIGARRAGA , William E. ATHERTON , Michael E. BROWNE
IPC分类号： G06F12/00
CPC分类号： G11C16/349 , G06F11/008 , G06F11/3466 , G06F12/0246 , G06F2201/88
摘要： Disclosed are a method, electronic device, and computer readable medium for determining an end-of-life stage of the flash memory. The method includes detecting at least one life cycle event associated with a flash memory residing on an electronic device. A counter that is associated with the life cycle event is then incremented. Based on the counter, a total number of occurrences for the one life cycle event is determined. The total number of occurrences for the at least one given threshold is also determined. A current life cycle stage of the flash memory is identified based at least in part on determining if the total number of occurrences exceeds at least one given threshold. The life cycle stage is associated with the at least one given threshold. A user is then notified of the life cycle state of the flash memory.

9. 发明申请

US20080086275A1 END OF LIFE PREDICTION OF FLASH MEMORY 有权
标题翻译： FLASH存储器寿命预测结束
公开(公告)号：US20080086275A1
公开(公告)日：2008-04-10
申请号：US11539027
申请日：2006-10-05
申请人： Tara Astigarraga , William E. Atherton , Michael E. Browne
发明人： Tara Astigarraga , William E. Atherton , Michael E. Browne
IPC分类号： G06F19/00 , G06F17/40
CPC分类号： G11C16/349 , G06F11/008 , G06F11/3466 , G06F12/0246 , G06F2201/88
摘要： Disclosed are a method, electronic device, and computer readable medium for determining an end-of-life stage of the flash memory. The method comprises detecting at least one life cycle event associated with a flash memory residing on an electronic device A counter that is associated with the life cycle event is then incremented. Based on the counter, a total number of occurrences for the one life cycle event is determined. The total number of occurrences for the at least one given threshold are also determined. A current life cycle stage of the flash memory is identified based at least in part on the determining if the total number of occurrences exceeds at least one given threshold. The life cycle stage is associated with the at least one given threshold. A user is then notified of the life cycle state of the flash memory.
摘要翻译：公开了一种用于确定闪存的寿命阶段的方法，电子设备和计算机可读介质。该方法包括检测与驻留在电子设备上的闪存相关联的至少一个生命周期事件。然后，与生命周期事件相关联的计数器然后递增。基于计数器，确定一个生命周期事件的总发生次数。还确定了至少一个给定阈值的总出现次数。至少部分地基于确定总发生次数是否超过至少一个给定阈值来识别闪存的当前生命周期阶段。生命周期阶段与至少一个给定的阈值相关联。然后，向用户通知闪存的生命周期状态。

10. 发明授权

US08140730B2 System reconfiguration of expansion cards 有权
标题翻译：扩展卡的系统重新配置
公开(公告)号：US08140730B2
公开(公告)日：2012-03-20
申请号：US12540172
申请日：2009-08-12
申请人： William E. Atherton
发明人： William E. Atherton
IPC分类号： G06F13/00
CPC分类号： G06F13/4295
摘要： A method and computer program product for improving or optimizing the configuration of expansion cards and expansion card slots in a computer system. The slot width of each slot is serially set to two or more link widths supported by the expansion card that is connect in each slot and each of the plurality of expansion cards is retrained at each of the set slot widths. The current link speed and a current link width for each of the plurality of expansion cards may be identified at each of the set slot widths to enable a determination of a configuration of the plurality of expansion cards within the plurality of expansion card slots that will improve collective throughput of the expansion cards. Optionally, the throughput of one expansion card may be prioritized over the throughput of another expansion card, such as those expansion cards or functionalities specified by user preferences or identified by system monitoring of loads placed on the expansion cards.
摘要翻译：一种用于改进或优化计算机系统中的扩展卡和扩展卡插槽的配置的方法和计算机程序产品。每个插槽的插槽宽度被串行设置为由每个插槽中连接的扩展卡所支持的两个或多个链路宽度，并且多个扩展卡中的每一个在每个设置的时隙宽度上被再培训。可以在每个设置的时隙宽度处识别多个扩展卡中的每一个的当前链路速度和当前链路宽度，以便能够确定将在多个扩展卡槽内改善的多个扩展卡的配置扩充卡的集体吞吐量。可选地，一个扩展卡的吞吐量可以优先于另一扩展卡的吞吐量，例如那些扩展卡或由用户偏好指定的功能或通过系统监视放置在扩展卡上的负载来识别。

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