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1. 发明授权

US06393591B1 Method for remotely testing microelectronic device over the internet 有权
标题翻译：通过互联网远程测试微电子设备的方法
公开(公告)号：US06393591B1
公开(公告)日：2002-05-21
申请号：US09249907
申请日：1999-02-12
申请人： Jesse H. Jenkins, IV , Walter H. Edmondson
发明人： Jesse H. Jenkins, IV , Walter H. Edmondson
IPC分类号： G01R3128
CPC分类号： G06F11/2294 , G06F2201/875
摘要： The Internet is used to test an integrated circuit chip that is provided with boundary scan circuitry and plugged into a circuit board at a customer's location. A host computer at the manufacturer's location runs a web page server having the ability to remotely test a customer's chip. The process is initiated by the customer connecting the circuit board to his own computer and logging onto the web site. The customer transmits customer identification and other data to the web server, which then transmits a downloader program and a JAVA program script to the customer's computer. The customer's computer then uses the downloader program to transmit high and low level device data describing the functionality of the chip to the host computer, which then generates and transmits a set of suitable test vectors to the customer's computer. Then, the customer's computer tests the chip using the boundary scan circuitry and test vectors and transmits the test results to the host computer, which then produces and transmits an evaluation of the results to the customer's computer.
摘要翻译：因特网被用来测试一个集成电路芯片，它提供了边界扫描电路，并在客户的位置插入电路板。制造商所在的主机运行一个能够远程测试客户芯片的网页服务器。该过程由客户将电路板连接到自己的计算机并登录到网站启动。客户将客户识别和其他数据传送到Web服务器，Web服务器然后将下载程序和JAVA程序脚本发送到客户的计算机。然后，客户的计算机使用下载程序将描述芯片的功能的高级和低级设备数据传送到主计算机，然后主机产生并发送一组合适的测试向量给客户的计算机。然后，客户的计算机使用边界扫描电路和测试向量来测试芯片，并将测试结果发送到主计算机，然后主机产生并将结果的评估传输给客户的计算机。

2. 发明授权

US07496820B1 Method and apparatus for generating test vectors for an integrated circuit under test 有权
标题翻译：用于生成被测集成电路的测试矢量的方法和装置
公开(公告)号：US07496820B1
公开(公告)日：2009-02-24
申请号：US11369670
申请日：2006-03-07
申请人： Conrad A. Theron , Michael L. Simmons , Walter H. Edmondson , Mihai G. Statovici
发明人： Conrad A. Theron , Michael L. Simmons , Walter H. Edmondson , Mihai G. Statovici
IPC分类号： G06F11/00
CPC分类号： G06F11/263 , G01R31/31813
摘要： Method, apparatus, and computer readable medium for generating test vectors for an integrated circuit (IC) under test is described. In one example, a test function is specified using at least one elementary function that encapsulates program code associated with an architecture of the IC under test. An engine is configured with device description data for the IC under test. The engine is executed with the test function as parametric input to generate the test vectors. In one example, the IC under test comprises a programmable logic device (PLD) and the test vectors include configuration data for configuring a pattern in the PLD and at least one test vector for exercising the pattern. The test vectors may be applied directly to the device or through automatic test equipment (ATE). Alternatively, the test vectors may be applied to a IC design simulation of the device.
摘要翻译：描述了用于产生被测集成电路（IC）的测试向量的方法，装置和计算机可读介质。在一个示例中，使用至少一个基本功能来指定测试功能，该基本功能封装与被测IC的架构相关联的程序代码。引擎配置有被测试IC的设备描述数据。引擎以测试功能作为参数输入来执行，以生成测试向量。在一个示例中，所测试的IC包括可编程逻辑器件（PLD），并且测试向量包括用于配置PLD中的模式的配置数据和用于执行模式的至少一个测试向量。测试矢量可以直接应用于设备或通过自动测试设备（ATE）。或者，测试向量可以应用于设备的IC设计仿真。

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