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    • 1. 发明申请
    • ANALOG/DIGITAL CONVERTER AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    • 模拟/数字转换器和半导体集成电路器件
    • US20130049999A1
    • 2013-02-28
    • US13338338
    • 2011-12-28
    • TAKASHI OSHIMATaizo YamawakiTomomi Takahashi
    • TAKASHI OSHIMATaizo YamawakiTomomi Takahashi
    • H03M1/10
    • H03M1/1009H03M1/00H03M1/0695H03M1/1028H03M1/12H03M1/1215H03M1/804
    • A reference A/D conversion unit is connected in parallel to an input common to a time-interleaved A/D converter to be a calibration target, and the output of each unitary A/D conversion unit which makes up the time-interleaved A/D converter is calibrated in a digital region by using a low-speed high-resolution A/D conversion result output from the reference A/D conversion unit. Also, fCLK/N (fCLK represents an overall sampling rate of the time-interleaved A/D converter, and N is relatively prime to the number of unitary A/D conversion units connected in parallel M) is set as the operation clock frequency of the reference A/D conversion unit. Samplings of all unitary A/D conversion units can be sequentially synchronized with the sampling of the reference A/D conversion unit, and the operation clock frequency of the reference A/D converter can be made N times slower than the overall sampling rate of the time-interleaved A/D converter.
    • 参考A / D转换单元并联连接到时间交织的A / D转换器的公共端作为校准对象,并且构成时间交织的A / D转换单元的每个单位A / D转换单元的输出, D转换器通过使用从参考A / D转换单元输出的低速高分辨率A / D转换结果在数字区域进行校准。 另外,fCLK / N(fCLK表示时间交织的A / D转换器的总体采样率,N是并行连接的单位A / D转换单元的数量的N相对于M)被设定为操作时钟频率 参考A / D转换单元。 所有单位A / D转换单元的采样可以与参考A / D转换单元的采样顺序同步,并且参考A / D转换器的工作时钟频率可以比总的采样率慢 时间交织的A / D转换器。
    • 2. 发明授权
    • Ink jet recording paper
    • 喷墨记录纸
    • US07303651B2
    • 2007-12-04
    • US10494843
    • 2002-11-08
    • Shinichi AsanoMotoko HirakiTomomi TakahashiHiromasa KondoTakeshi IidaRyu Kitamura
    • Shinichi AsanoMotoko HirakiTomomi TakahashiHiromasa KondoTakeshi IidaRyu Kitamura
    • D21F11/00
    • B41M5/5218B41M5/506B41M5/508B41M2205/38
    • Ink jet printing paper capable of providing, by using a low permeablity or a nonpermeable supporting sheet, a high surface glossiness and a high dot reproducibility of a silver halide photograph level, an excellent absorptivity of ink, and a high recording density, and preventing cockling by ink solvent, comprising the low permeablity or the nonpermeable supporting sheet, at least one ink receiving layer coated on the supporting sheet, and a luster layer coated on the ink receiving layer, the ink receiving layer in contact with the luster layer comprising pigment, as a main component, having a specific surface area-based mode diameter of pore distribution of 100 nm or less and an average secondary particle size of 1.3 μm or less, and the luster layer comprising pigment, as a main component, having an average primary particle size of 5 to 100 nm.
    • 能够通过使用低渗透性或不渗透性的支撑片材提供卤化银照片级的高表面光泽度和高点再现性,油墨的优异吸收性和高记录密度,并防止起皱的喷墨打印纸 通过油墨溶剂,包含低透过性或不渗透性支撑片材,涂覆在支撑片材上的至少一种油墨接受层和涂覆在油墨接收层上的光泽层,与包含颜料的光泽层接触的油墨接收层, 作为主要成分,其孔分布的比表面积模式直径为100nm以下,平均二次粒径为1.3μm以下,作为主要成分的颜料作为主要成分,具有平均初级 粒度为5〜100nm。
    • 8. 发明授权
    • Analog/digital converter and semiconductor integrated circuit device
    • 模拟/数字转换器和半导体集成电路器件
    • US08102289B2
    • 2012-01-24
    • US12676357
    • 2009-02-19
    • Takashi OshimaTaizo YamawakiTomomi Takahashi
    • Takashi OshimaTaizo YamawakiTomomi Takahashi
    • H03M1/10
    • H03M1/1009H03M1/00H03M1/0695H03M1/1028H03M1/12H03M1/1215H03M1/804
    • In the digital calibration technique of the conventional time-interleaved analog/digital converter, it is impossible to perform highly-accurate calibration that supports a high-speed sampling rate of the next-generation application and achieves a high resolution. For its solution, a reference A/D conversion unit is connected in parallel to an input common to a time-interleaved A/D converter to be a calibration target, and the output of each unitary A/D conversion unit which makes up the time-interleaved A/D converter is calibrated in a digital region by using a low-speed high-resolution A/D conversion result output from the reference A/D conversion unit. Also, fCLK/N (fCLK represents an overall sampling rate of the time-interleaved A/D converter, and N is relatively prime to the number of unitary A/D conversion units connected in parallel M) is set as the operation clock frequency of the reference A/D conversion unit. In this configuration, samplings of all unitary A/D conversion units can be sequentially synchronized with the sampling of the reference A/D conversion unit, and the operation clock frequency of the reference A/D converter can be made N times slower than the overall sampling rate of the time-interleaved A/D converter.
    • 在传统的时间交错模拟/数字转换器的数字校准技术中,不可能执行支持下一代应用的高速采样率的高精度校准,并实现高分辨率。 对于其解决方案,参考A / D转换单元并联连接到时间交织的A / D转换器的公共端作为校准目标,并且构成时间的每个单位A / D转换单元的输出 通过使用从参考A / D转换单元输出的低速高分辨率A / D转换结果,在数字区域校准交错A / D转换器。 另外,fCLK / N(fCLK表示时间交织的A / D转换器的总体采样率,N是并行连接的单位A / D转换单元的数量的N相对于M)被设定为操作时钟频率 参考A / D转换单元。 在这种配置中,所有单位A / D转换单元的采样可以与参考A / D转换单元的采样顺序同步,并且参考A / D转换器的操作时钟频率可以比总体的N倍慢 时间交织A / D转换器的采样率。
    • 9. 发明申请
    • ANALOG/DIGITAL CONVERTER AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    • 模拟/数字转换器和半导体集成电路器件
    • US20110128171A1
    • 2011-06-02
    • US12676357
    • 2009-02-19
    • Takashi OshimaTaizo YamawakiTomomi Takahashi
    • Takashi OshimaTaizo YamawakiTomomi Takahashi
    • H03M1/10
    • H03M1/1009H03M1/00H03M1/0695H03M1/1028H03M1/12H03M1/1215H03M1/804
    • In the digital calibration technique of the conventional time-interleaved analog/digital converter, it is impossible to perform highly-accurate calibration that supports a high-speed sampling rate of the next-generation application and achieves a high resolution. For its solution, a reference A/D conversion unit is connected in parallel to an input common to a time-interleaved A/D converter to be a calibration target, and the output of each unitary A/D conversion unit which makes up the time-interleaved A/D converter is calibrated in a digital region by using a low-speed high-resolution A/D conversion result output from the reference A/D conversion unit. Also, fCLK/N (fCLK represents an overall sampling rate of the time-interleaved A/D converter, and N is relatively prime to the number of unitary A/D conversion units connected in parallel M) is set as the operation clock frequency of the reference A/D conversion unit. In this configuration, samplings of all unitary A/D conversion units can be sequentially synchronized with the sampling of the reference A/D conversion unit, and the operation clock frequency of the reference A/D converter can be made N times slower than the overall sampling rate of the time-interleaved A/D converter.
    • 在传统的时间交错模拟/数字转换器的数字校准技术中,不可能执行支持下一代应用的高速采样率的高精度校准,并实现高分辨率。 对于其解决方案,参考A / D转换单元并联连接到时间交织的A / D转换器的公共端作为校准目标,并且构成时间的每个单位A / D转换单元的输出 通过使用从参考A / D转换单元输出的低速高分辨率A / D转换结果,在数字区域校准交错A / D转换器。 另外,fCLK / N(fCLK表示时间交织的A / D转换器的总体采样率,N是并行连接的单位A / D转换单元的数量的N相对于M)被设定为操作时钟频率 参考A / D转换单元。 在这种配置中,所有单一A / D转换单元的采样可以与参考A / D转换单元的采样顺序同步,并且参考A / D转换器的操作时钟频率可以比总体的N倍慢 时间交织A / D转换器的采样率。