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1. 发明授权

US07594105B2 Multilayer print circuit board 失效
标题翻译：多层印刷电路板
公开(公告)号：US07594105B2
公开(公告)日：2009-09-22
申请号：US11566942
申请日：2006-12-05
申请人： Tohru Ohsaka
发明人： Tohru Ohsaka
IPC分类号： H05K7/08 , H01P5/02
CPC分类号： G06F1/189 , G06F1/188 , H05K1/0231 , H05K1/116 , H05K3/429 , H05K2201/09718 , H05K2201/10545 , H05K2201/10689 , Y10T29/49117 , Y10T29/49126 , Y10T29/49165
摘要： This invention effectively prevents potential fluctuation in the power supply terminal of a semiconductor device, that is, noise from flowing out to a main power supply wiring. A multilayer print circuit board includes a first power supply via hole which connects to the power supply terminal of a semiconductor integrated circuit on a first surface layer and extends from the first surface layer to a second surface layer, a ground via hole which connects to a ground conductive layer, extends from the ground conductive layer to the second surface layer, and connects to the first power supply via hole on the second surface layer through a bypass capacitor, a first clearance hole which is formed in a power supply conductive layer, and a second clearance hole which is formed in the ground conductive layer. The first clearance hole is larger than the second clearance hole.
摘要翻译：本发明有效地防止半导体装置的电源端子的电位波动，即噪声流出到主电源配线。多层印刷电路板包括第一电源通孔，其连接到第一表面层上的半导体集成电路的电源端并从第一表面层延伸到第二表面层;接地通孔，其连接到接地导电层从接地导电层延伸到第二表面层，并且通过旁路电容器连接到第二表面层上的第一电源通孔，形成在电源导电层中的第一间隙孔，以及形成在接地导电层中的第二间隙孔。第一间隙孔大于第二间隙孔。

2. 发明授权

US07495928B2 Semiconductor device and printed circuit board 失效
标题翻译：半导体器件和印刷电路板
公开(公告)号：US07495928B2
公开(公告)日：2009-02-24
申请号：US11960161
申请日：2007-12-19
申请人： Tohru Ohsaka
发明人： Tohru Ohsaka
IPC分类号： H05K7/10 , H05K7/12
CPC分类号： H05K1/0243 , H01L23/49827 , H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6627 , H01L2224/48091 , H01L2224/48227 , H01L2224/49112 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15173 , H01L2924/15311 , H01L2924/1903 , H01L2924/3011 , H01L2924/30111 , H05K1/023 , H05K1/112 , H05K3/242 , H05K2201/09227 , H05K2201/0979 , H05K2201/10022 , H05K2201/10734 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： For a multi-terminal semiconductor package, such as a BGA or a CSP, that handles high-speed differential signals, a high-speed signal is assigned to the innermost located electrode pad on an interposer substrate, and the electrode pad is connected to the outermost located ball pad on the interposer substrate. With this arrangement, the length of a plating stub can be considerably reduced, and the adverse affect on a signal waveform can be minimized. This arrangement is especially effective for differential signal lines.
摘要翻译：对于处理高速差分信号的诸如BGA或CSP的多端子半导体封装，将高速信号分配给插入器基板上的最内侧定位的电极焊盘，并且电极焊盘连接到位于内插器基板上的最外侧的球垫。通过这种布置，可以显着地减少电镀短截线的长度，并且可以最小化对信号波形的不利影响。这种布置对于差分信号线特别有效。

3. 发明授权

US07277298B2 Multi-terminal device and printed wiring board 有权
标题翻译：多终端设备和印刷电路板
公开(公告)号：US07277298B2
公开(公告)日：2007-10-02
申请号：US11237508
申请日：2005-09-27
申请人： Tohru Ohsaka
发明人： Tohru Ohsaka
IPC分类号： H05K7/00
CPC分类号： H01L23/49838 , H01L23/50 , H01L2924/0002 , H01L2924/15173 , H01L2924/15311 , H01L2924/3011 , H05K1/0237 , H05K1/114 , H05K2201/09227 , H05K2201/09236 , H05K2201/10734 , H01L2924/00
摘要： According to the invention, even when high-speed differential signal pins are arranged on the inner side of a BGA, they can be wired on a printed wiring board at a low cost. In a multi-terminal device (1) having one surface where a large number of connection terminals are arrayed planarly, terminals (3) that need not be electrically connected individually are arranged between differential signal terminals (2) of the multi-terminal device and the periphery of the multi-terminal device.
摘要翻译：根据本发明，即使高速差分信号引脚布置在BGA的内侧，也可以低成本地布线在印刷电路板上。在具有平面排列大量连接端子的一个表面的多端子装置（1）中，不需要电连接的端子（3）分别设置在多端子装置的差分信号端子（2）和多端设备的外围。

4. 发明授权

US5973929A Printed circuit board having an embedded capacitor 失效
标题翻译：具有嵌入式电容器的印刷电路板
公开(公告)号：US5973929A
公开(公告)日：1999-10-26
申请号：US974510
申请日：1997-11-19
申请人： Tomoyasu Arakawa , Toru Otaki , Yasushi Takeuchi , Hideho Inagawa , Yoshimi Terayama , Tohru Ohsaka
发明人： Tomoyasu Arakawa , Toru Otaki , Yasushi Takeuchi , Hideho Inagawa , Yoshimi Terayama , Tohru Ohsaka
IPC分类号： H01G4/12 , H01G4/228 , H01G4/255 , H01G4/40 , H05K1/11 , H05K1/16 , H05K3/42 , H01G4/35
CPC分类号： H05K1/115 , H05K1/162 , H05K2201/0187 , H05K2201/0979 , H05K2201/09809 , H05K3/429 , H05K3/4688
摘要： A circuit board having a printed capacitor whose capacitance is easily adjusted includes a plurality of through-holes arranged in arrays and electrically connected to each other via conductive films. Therefore, first and second electrode portions are arranged to oppose each other, and form a printed capacitor. The capacitance of the capacitor can be adjusted by the number and diameter of through-holes, and the interval between each two adjacent through-holes. Therefore, even when a large-capacitance capacitor is to be formed, the printed capacitor can be rendered compact.
摘要翻译：电容容易调节的具有印刷电容器的电路板包括排列成阵列并通过导电膜彼此电连接的多个通孔。因此，第一电极部分和第二电极部分彼此相对布置，并形成印刷电容器。电容器的电容可以通过通孔的数量和直径以及两个相邻通孔之间的间隔进行调整。因此，即使要形成大容量电容器，印刷电容器也可以变得紧凑。

5. 发明申请

US20090051015A1 SEMICONDUCTOR DEVICE AND PRINTED CIRCUIT BOARD 有权
标题翻译：半导体器件和印刷电路板
公开(公告)号：US20090051015A1
公开(公告)日：2009-02-26
申请号：US12255789
申请日：2008-10-22
申请人： Tohru Ohsaka
发明人： Tohru Ohsaka
IPC分类号： H01L23/485 , H05K1/00
CPC分类号： H05K1/0243 , H01L23/49827 , H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6627 , H01L2224/48091 , H01L2224/48227 , H01L2224/49112 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15173 , H01L2924/15311 , H01L2924/1903 , H01L2924/3011 , H01L2924/30111 , H05K1/023 , H05K1/112 , H05K3/242 , H05K2201/09227 , H05K2201/0979 , H05K2201/10022 , H05K2201/10734 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： For a multi-terminal semiconductor package, such as a BGA or a CSP, that handles high-speed differential signals, a high-speed signal is assigned to the innermost located electrode pad on an interposer substrate, and the electrode pad is connected to the outermost located ball pad on the interposer substrate. With this arrangement, the length of a plating stub can be considerably reduced, and the adverse affect on a signal waveform can be minimized. This arrangement is especially effective for differential signal lines.
摘要翻译：对于处理高速差分信号的诸如BGA或CSP的多端子半导体封装，将高速信号分配给插入器基板上的最内侧定位的电极焊盘，并且电极焊盘连接到位于内插器基板上的最外侧的球垫。通过这种布置，可以显着地减少电镀短截线的长度，并且可以最小化对信号波形的不利影响。这种布置对于差分信号线特别有效。

6. 发明授权

US07349224B2 Semiconductor device and printed circuit board 失效
标题翻译：半导体器件和印刷电路板
公开(公告)号：US07349224B2
公开(公告)日：2008-03-25
申请号：US11094136
申请日：2005-03-31
申请人： Tohru Ohsaka
发明人： Tohru Ohsaka
IPC分类号： H05K7/10 , H05K7/12
CPC分类号： H05K1/0243 , H01L23/49827 , H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6627 , H01L2224/48091 , H01L2224/48227 , H01L2224/49112 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15173 , H01L2924/15311 , H01L2924/1903 , H01L2924/3011 , H01L2924/30111 , H05K1/023 , H05K1/112 , H05K3/242 , H05K2201/09227 , H05K2201/0979 , H05K2201/10022 , H05K2201/10734 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： For a multi-terminal semiconductor package, such as a BGA or a CSP, that handles high-speed differential signals, a high-speed signal is assigned to the innermost located electrode pad on an interposer substrate, and the electrode pad is connected to the outermost located ball pad on the interposer substrate. With this arrangement, the length of a plating stub can be considerably reduced, and the adverse affect on a signal waveform can be minimized. This arrangement is especially effective for differential signal lines.
摘要翻译：对于处理高速差分信号的诸如BGA或CSP的多端子半导体封装，将高速信号分配给插入器基板上的最内侧定位的电极焊盘，并且电极焊盘连接到位于内插器基板上的最外侧的球垫。通过这种布置，可以显着地减少电镀短截线的长度，并且可以最小化对信号波形的不利影响。这种布置对于差分信号线特别有效。

7. 发明申请

US20070136618A1 MULTILAYER PRINT CIRCUIT BOARD 失效
标题翻译：多层印刷电路板
公开(公告)号：US20070136618A1
公开(公告)日：2007-06-14
申请号：US11566942
申请日：2006-12-05
申请人： Tohru Ohsaka
发明人： Tohru Ohsaka
IPC分类号： G06F1/00
CPC分类号： G06F1/189 , G06F1/188 , H05K1/0231 , H05K1/116 , H05K3/429 , H05K2201/09718 , H05K2201/10545 , H05K2201/10689 , Y10T29/49117 , Y10T29/49126 , Y10T29/49165
摘要： This invention effectively prevents potential fluctuation in the power supply terminal of a semiconductor device, that is, noise from flowing out to a main power supply wiring. A multilayer print circuit board includes a first power supply via hole which connects to the power supply terminal of a semiconductor integrated circuit on a first surface layer and extends from the first surface layer to a second surface layer, a ground via hole which connects to a ground conductive layer, extends from the ground conductive layer to the second surface layer, and connects to the first power supply via hole on the second surface layer through a bypass capacitor, a first clearance hole which is formed in a power supply conductive layer, and a second clearance hole which is formed in the ground conductive layer. The first clearance hole is larger than the second clearance hole.
摘要翻译：本发明有效地防止半导体装置的电源端子的电位波动，即噪声流出到主电源配线。多层印刷电路板包括第一电源通孔，其连接到第一表面层上的半导体集成电路的电源端并从第一表面层延伸到第二表面层;接地通孔，其连接到接地导电层从接地导电层延伸到第二表面层，并且通过旁路电容器连接到第二表面层上的第一电源通孔，形成在电源导电层中的第一间隙孔，以及形成在接地导电层中的第二间隙孔。第一间隙孔大于第二间隙孔。

8. 发明授权

US06335866B1 Printed wiring board unit for use with electronic apparatus 有权
标题翻译：用于电子设备的印刷电路板单元
公开(公告)号：US06335866B1
公开(公告)日：2002-01-01
申请号：US09167576
申请日：1998-10-07
申请人： Tohru Ohtaki , Tohru Ohsaka
发明人： Tohru Ohtaki , Tohru Ohsaka
IPC分类号： H05K114
CPC分类号： H05K1/141 , H05K1/0216 , H05K1/0237 , H05K1/181 , H05K3/3447 , H05K3/368 , H05K2201/10189 , H05K2201/10386 , H05K2201/10689
摘要： A printed wiring board unit for use with an electronic apparatus in which the unit is formed by a power circuit and a digital circuit. The power circuit is constructed as a power circuit board made of a single-sided board, and the digital circuit is a high density digital circuit board which is smaller than the power circuit board. The digital circuit board is formed into a module by mounting thereon an IC, etc., which operates at the highest internal clock frequency. This reduced digital circuit board is mounted onto the power circuit board with spacing between parts in a layered structure, thereby improving unwanted radiation noise characteristics without increasing costs.
摘要翻译：一种与电子设备一起使用的印刷线路板单元，其中单元由电源电路和数字电路形成。电源电路构成为由单面板制成的电源电路板，数字电路是比电源电路板小的高密度数字电路板。数字电路板通过安装在最高内部时钟频率上工作的IC等而形成为模块。该减小数字电路板以分层结构的部件之间的间隔安装在电源电路板上，从而在不增加成本的情况下改善不需要的辐射噪声特性。

9. 发明授权

US07851900B2 Stacked semiconductor package 有权
标题翻译：堆叠半导体封装
公开(公告)号：US07851900B2
公开(公告)日：2010-12-14
申请号：US11378685
申请日：2006-03-17
申请人： Tohru Ohsaka , Hiroshi Kondo
发明人： Tohru Ohsaka , Hiroshi Kondo
IPC分类号： H01L23/02
CPC分类号： H05K1/141 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/48225 , H01L2224/48227 , H01L2224/97 , H01L2225/06568 , H01L2225/1023 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/30107 , H05K1/0263 , H05K1/145 , H05K3/3436 , H05K2201/10515 , H05K2201/10734 , H01L2924/00 , H01L2224/0401
摘要： In a stacked semiconductor package, since electric power is supplied to a second semiconductor package through a first semiconductor package, a power supply path becomes complicated and fluctuation of its inductance becomes large, whereby power bounce occurs to reduce signal quality and also prevent high speed signal communication. Therefore, according to the present invention, a first solder ball group for joint to a printed wiring board is attached to a second layer of the first semiconductor package, and a second solder ball group for joint to the first semiconductor package and a solder group for power supply for direct joint to the printed wiring board are provided on the second layer of the second semiconductor package, whereby electric power can be directly supplied from the printed wiring board.
摘要翻译：在层叠半导体封装中，由于通过第一半导体封装向第二半导体封装供给电力，电源路径变得复杂，电感的波动变大，因此发生电源反弹以降低信号质量并且还防止高速信号通讯。因此，根据本发明，与第一半导体封装的第二层和第一半导体封装的接合用的第二焊球组和用于与第一半导体封装接合的第二焊球组，用于直接接合到印刷线路板的电源设置在第二半导体封装的第二层上，从而可以从印刷线路板直接供应电力。

10. 发明授权

US07839652B2 Semiconductor device and printed circuit board 有权
标题翻译：半导体器件和印刷电路板
公开(公告)号：US07839652B2
公开(公告)日：2010-11-23
申请号：US12255789
申请日：2008-10-22
申请人： Tohru Ohsaka
发明人： Tohru Ohsaka
IPC分类号： H05K7/10 , H05K7/12
CPC分类号： H05K1/0243 , H01L23/49827 , H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6627 , H01L2224/48091 , H01L2224/48227 , H01L2224/49112 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15173 , H01L2924/15311 , H01L2924/1903 , H01L2924/3011 , H01L2924/30111 , H05K1/023 , H05K1/112 , H05K3/242 , H05K2201/09227 , H05K2201/0979 , H05K2201/10022 , H05K2201/10734 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： For a multi-terminal semiconductor package, such as a BGA or a CSP, that handles high-speed differential signals, a high-speed signal is assigned to the innermost located electrode pad on an interposer substrate, and the electrode pad is connected to the outermost located ball pad on the interposer substrate. With this arrangement, the length of a plating stub can be considerably reduced, and the adverse affect on a signal waveform can be minimized. This arrangement is especially effective for differential signal lines.
摘要翻译：对于处理高速差分信号的诸如BGA或CSP的多端子半导体封装，将高速信号分配给插入器基板上的最内侧定位的电极焊盘，并且电极焊盘连接到位于内插器基板上的最外侧的球垫。通过这种布置，可以显着地减少电镀短截线的长度，并且可以最小化对信号波形的不利影响。这种布置对于差分信号线特别有效。

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