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1. 发明授权

US06265892B1 Low noise output buffer 失效
标题翻译：低噪声输出缓冲器
公开(公告)号：US06265892B1
公开(公告)日：2001-07-24
申请号：US09371199
申请日：1999-08-10
申请人： Shyh-Jye Jou , Ray-De Chiao , Shu-Hua Kuo , Tin-Hao Lin
发明人： Shyh-Jye Jou , Ray-De Chiao , Shu-Hua Kuo , Tin-Hao Lin
IPC分类号： H03K1716
CPC分类号： H03K17/167
摘要： A low noise output buffer to simultaneously reduce switching noise and output signal ringing for output ringing and maintain DC current. A temporary and a steady-state output buffers are supplied by a buffer voltage source and an internal circuit voltage source, respectively. Each driver has a pull-up and a pull-down transistors. While switching the output buffer from a high voltage level to a low voltage level or from a low voltage level to a high voltage level, a predriver and a single steady-state circuit are designed to respectively generate a large simultaneous switching noise at the buffer voltage source and a small simultaneous switching noise at the internal circuit voltage source. A Schmitt trigger circuit is also used to turn off the temporary driver, so as to reduce the output signal ringing while the steady-state driver maintains a supply of DC current. In another design of a low noise output buffer to reduce ground bounces and output signal ringing as well as to maintain a DC current, a temporary driver is used. An adaptive characteristic of the low noise output buffer under different loading conditions is achieved by a feedback circuit. The temporary driver is turned on only during the middle period of output transition time to provide an additional charging or discharging current. Since the temporary driver is always off apart from the transition period, the effect of reducing ground bounces and output signal ringing can thus be outstanding.
摘要翻译：低噪声输出缓冲器，可同时降低开关噪声和输出信号振铃以进行输出振铃并保持直流电流。分别由缓冲电压源和内部电路电压源提供临时和稳态输出缓冲器。每个驱动器都有一个上拉和一个下拉晶体管。当将输出缓冲器从高电压电平切换到低电压电平或从低电压电平切换到高电压电平时，预驱动器和单稳态电路被设计为分别在缓冲电压下产生大的同时开关噪声源极和内部电路电压源的小的同时开关噪声。施密特触发电路也用于关断临时驱动器，以便在稳态驱动器保持直流电流供应时减少输出信号振铃。在另一种低噪声输出缓冲器的设计中，为了减少地面跳动和输出信号振铃以及维持直流电流，使用临时驱动器。通过反馈电路实现了不同负载条件下低噪声输出缓冲器的自适应特性。临时驱动器仅在输出转换时间的中间期间接通，以提供额外的充电或放电电流。由于临时驾驶员始终偏离过渡期，所以减少地面反弹和输出信号振铃的效果因此可以突出。

2. 发明授权

US5945696A Silicon chip having mixed input/output slot structure 失效
标题翻译：具有混合输入/输出槽结构的硅芯片
公开(公告)号：US5945696A
公开(公告)日：1999-08-31
申请号：US065471
申请日：1998-04-23
申请人： Hsiao-Ping Lin , Tin-Hao Lin
发明人： Hsiao-Ping Lin , Tin-Hao Lin
IPC分类号： H01L23/50 , H01L27/02 , H01L27/10
CPC分类号： H01L27/0207 , H01L23/50 , H01L2924/0002
摘要： A silicon chip having a mixed input/output slot structure comprising a core region having a plurality of circuits formed thereon, a wiring region surrounding and linked to the core region, and an input/output area surrounding and linked to the wiring region, where the input/output area has a plurality of input/output slots and four corner cells. The input/output slots can be divided into groups with each group having a different height, and input/output slots on the same side of the input/output area all have the same height. Therefore, a choice of sides for placing the input/output slots can be made, and the layout of input/output slots around the silicon chip is not be restricted by one side. Hence, chip size can be reduced and chip surface can be fully utilized.
摘要翻译：一种具有混合输入/输出槽结构的硅芯片，包括其上形成有多个电路的芯区域，围绕并连接到芯区域的布线区域以及围绕并连接到布线区域的输入/输出区域，其中输入/输出区域具有多个输入/输出槽和四个转角单元。输入/输出槽可以分成组，每组具有不同的高度，输入/输出区同一侧的输入/输出槽都具有相同的高度。因此，可以选择用于放置输入/输出槽的侧面，并且不能限制硅芯片周围的输入/输出槽的布局。因此，可以减小芯片尺寸并且可以充分利用芯片表面。

3. 发明授权

US07078930B2 Integrated circuit chip with high area utilization rate 失效
标题翻译：集成电路芯片具有较高的面积利用率
公开(公告)号：US07078930B2
公开(公告)日：2006-07-18
申请号：US10907608
申请日：2005-04-07
申请人： Tin-Hao Lin , Chia-Nan Hong
发明人： Tin-Hao Lin , Chia-Nan Hong
IPC分类号： H03K19/00
CPC分类号： H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit chip with a high area utilization rate includes: a plurality of logic circuits in a logic area; a first input and output circuit near a first side of the logic area for exchanging signals with the logic circuit; a second input and output circuit near a second side of the logic area for exchanging signals with the logic circuit; a plurality of first probe pads coupled to the first and the second input and output circuits for inputting or outputting signals to the first and the second input and output circuits; a corner cell comprising a plurality of wires coupled to the first and the second input and output circuits for exchanging signals between the first and the second input and output circuits; and a first process monitor circuit formed in the corner cell for monitoring a semiconductor process of the integrated circuit chip.
摘要翻译：具有高面积利用率的集成电路芯片包括：逻辑区域中的多个逻辑电路; 靠近用于与逻辑电路交换信号的逻辑区域的第一侧的第一输入和输出电路; 靠近逻辑区域的第二侧的第二输入和输出电路，用于与逻辑电路交换信号; 耦合到第一和第二输入和输出电路的多个第一探针焊盘，用于向第一和第二输入和输出电路输入或输出信号; 角电池包括耦合到第一和第二输入和输出电路的多条导线，用于在第一和第二输入和输出电路之间交换信号; 以及形成在角电池中的用于监视集成电路芯片的半导体工艺的第一处理监视电路。

4. 发明申请

US20060071685A1 Integrated Circuit Chip With High Area Utilization Rate 失效
标题翻译：高面积利用率的集成电路芯片
公开(公告)号：US20060071685A1
公开(公告)日：2006-04-06
申请号：US10907608
申请日：2005-04-07
申请人： Tin-Hao Lin , Chia-Nan Hong
发明人： Tin-Hao Lin , Chia-Nan Hong
IPC分类号： H03K19/173
CPC分类号： H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit chip with a high area utilization rate includes: a plurality of logic circuits in a logic area; a first input and output circuit near a first side of the logic area for exchanging signals with the logic circuit; a second input and output circuit near a second side of the logic area for exchanging signals with the logic circuit; a plurality of first probe pads coupled to the first and the second input and output circuits for inputting or outputting signals to the first and the second input and output circuits; a corner cell comprising a plurality of wires coupled to the first and the second input and output circuits for exchanging signals between the first and the second input and output circuits; and a first process monitor circuit formed in the corner cell for monitoring a semiconductor process of the integrated circuit chip.
摘要翻译：具有高面积利用率的集成电路芯片包括：逻辑区域中的多个逻辑电路; 靠近用于与逻辑电路交换信号的逻辑区域的第一侧的第一输入和输出电路; 靠近逻辑区域的第二侧的第二输入和输出电路，用于与逻辑电路交换信号; 耦合到第一和第二输入和输出电路的多个第一探针焊盘，用于向第一和第二输入和输出电路输入或输出信号; 角电池包括耦合到第一和第二输入和输出电路的多条导线，用于在第一和第二输入和输出电路之间交换信号; 以及形成在角电池中的用于监视集成电路芯片的半导体工艺的第一处理监视电路。

5. 发明授权

US5974476A On-chip input/output device having programmable I/O unit being configured based upon internal configuration circuit 失效
标题翻译：具有基于内部配置电路配置的可编程I / O单元的片上输入/输出装置
公开(公告)号：US5974476A
公开(公告)日：1999-10-26
申请号：US989287
申请日：1997-12-12
申请人： Tin-Hao Lin , Jeng-Huang Wu
发明人： Tin-Hao Lin , Jeng-Huang Wu
IPC分类号： G01R31/3181 , H03K19/0185 , G06F13/14 , G01R31/3187
CPC分类号： H03K19/018585 , G01R31/3181
摘要： An input/output (I/O) device with programmable I/O characteristics is provided for use on an integrated circuit to serve as a communication interface whose input/output characteristics can be set through programmable means to be matched to the external circuitry to which the IC chip is connected for use. This allows the IC chip on which the I/O device is provided to be matched for use with various kinds of external systems. Further, the I/O device can also be provided with a self-control feature that can detect whether the I/O characteristics of the I/O device are matched to the external circuitry and, if not, automatically set the I/O device to the required I/O characteristic. The I/O device can prevent an IC chip from being discarded due to a mismatch in the I/O characteristics with the external circuitry to which the IC chip is connected for use.
摘要翻译：提供具有可编程I / O特性的输入/输出（I / O）器件用于集成电路，用作通信接口，其输入/输出特性可通过可编程手段设置为与外部电路匹配， IC芯片连接使用。这允许提供I / O设备的IC芯片与各种外部系统配合使用。此外，I / O设备还可以具有可以检测I / O设备的I / O特性是否与外部电路匹配的自控功能，如果不是，I / O设备自动设置I / O设备到所需的I / O特性。由于I / O特性与IC芯片连接使用的外部电路不匹配，因此I / O设备可以防止IC芯片被丢弃。

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