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1. 发明授权

US07666689B2 Method to remove circuit patterns from a wafer 失效
标题翻译：从晶片去除电路图案的方法
公开(公告)号：US07666689B2
公开(公告)日：2010-02-23
申请号：US11609573
申请日：2006-12-12
申请人： Steven R. Codding , David Domina , James L. Hardy , Timothy Krywanczyk
发明人： Steven R. Codding , David Domina , James L. Hardy , Timothy Krywanczyk
IPC分类号： H01L21/00
CPC分类号： B24C3/322
摘要： A method holds wafers that contain patterned structures using a particle blasting tool. Next, the method directs particles at the patterned structures, such that the particles contact the patterned structures with a predetermined velocity and remove the patterned structures. This process of directing the particles at the wafer is controlled to stop directing the particles when substantially all of the patterned structures are removed from the wafer. This process also comprises selecting the particles to have a size equal to or less than 3 microns. For example, the particles can comprise aluminum oxide, silicon oxide, cerium, and/or a plastic. By maintaining the particle size equal to 3 microns or less, the blasting produces a substantially smooth wafer surface, thereby omitting the need for subsequent wafer polishing. Further, the wafers produced by such processing do not exhibit the highly stress lattice and fragile nature of wafers processed by wet processing.
摘要翻译：一种方法使用颗粒喷砂工具保持包含图案化结构的晶片。接下来，该方法将颗粒引导到图案化结构，使得颗粒以预定速度接触图案化结构并去除图案化结构。当基本上将所有图案化结构从晶片上移除时，控制在晶片处引导颗粒的这个过程以停止引导颗粒。该方法还包括选择具有等于或小于3微米尺寸的颗粒。例如，颗粒可以包括氧化铝，氧化硅，铈和/或塑料。通过保持等于3微米或更小的粒度，喷砂产生基本上平滑的晶片表面，从而省去了随后的晶片抛光的需要。此外，通过这种处理制造的晶片不会表现出通过湿法加工处理的晶片的高应力晶格和脆性。

2. 发明申请

US20080139088A1 Method to Remove Circuit Patterns from a Wafer 失效
标题翻译：从晶圆去除电路图案的方法
公开(公告)号：US20080139088A1
公开(公告)日：2008-06-12
申请号：US11609573
申请日：2006-12-12
申请人： Steven R. Codding , David Domina , James L. Hardy , Timothy Krywanczyk
发明人： Steven R. Codding , David Domina , James L. Hardy , Timothy Krywanczyk
IPC分类号： B24B1/00
CPC分类号： B24C3/322
摘要： A method holds wafers that contain patterned structures using a particle blasting tool. Next, the method directs particles at the patterned structures, such that the particles contact the patterned structures with a predetermined velocity and remove the patterned structures. This process of directing the particles at the wafer is controlled to stop directing the particles when substantially all of the patterned structures are removed from the wafer. This process also comprises selecting the particles to have a size equal to or less than 3 microns. For example, the particles can comprise aluminum oxide, silicon oxide, cerium, and/or a plastic. By maintaining the particle size equal to 3 microns or less, the blasting produces a substantially smooth wafer surface, thereby omitting the need for subsequent wafer polishing. Further, the wafers produced by such processing do not exhibit the highly stress lattice and fragile nature of wafers processed by wet processing.
摘要翻译：一种方法使用颗粒喷砂工具保持包含图案化结构的晶片。接下来，该方法将颗粒引导到图案化结构，使得颗粒以预定速度接触图案化结构并去除图案化结构。当基本上将所有图案化结构从晶片上移除时，控制在晶片处引导颗粒的这个过程以停止引导颗粒。该方法还包括选择具有等于或小于3微米尺寸的颗粒。例如，颗粒可以包括氧化铝，氧化硅，铈和/或塑料。通过保持等于3微米或更小的粒度，喷砂产生基本上平滑的晶片表面，从而省去了随后的晶片抛光的需要。此外，通过这种处理制造的晶片不会表现出通过湿法加工处理的晶片的高应力晶格和脆性。

3. 发明申请

US20080064185A1 SEMICONDUCTOR WAFER FRONT SIDE PROTECTION 审中-公开
标题翻译：半导体波形前端保护
公开(公告)号：US20080064185A1
公开(公告)日：2008-03-13
申请号：US11926668
申请日：2007-10-29
申请人： Allan Abrams , Donald Brouillette , Joseph Danaher , Timothy Krywanczyk , Rene Lamothe , Ivan Stone , Matthew Whalen
发明人： Allan Abrams , Donald Brouillette , Joseph Danaher , Timothy Krywanczyk , Rene Lamothe , Ivan Stone , Matthew Whalen
IPC分类号： H01L21/30
CPC分类号： H01L21/3081 , H01L21/304 , H01L2221/6834
摘要： There is provided a method for making a wafer comprising the steps of providing a substrate having a first surface, an opposite second surface, and at least one side edge defining a thickness of the substrate, the at least one side edge having a first peripheral region and a second peripheral region adjacent to the first peripheral region. The method includes applying a fluid to the first surface and the first peripheral region of the at least one side edge and removing the opposite second surface and the second peripheral region of the at least one side edge to form a third surface. A semiconductor chip made from the method for making the wafer is also provided.
摘要翻译：提供了一种用于制造晶片的方法，包括以下步骤：提供具有第一表面，相对的第二表面和限定衬底的厚度的至少一个侧边缘的衬底，所述至少一个侧边缘具有第一周边区域以及与第一周边区域相邻的第二周边区域。该方法包括将流体施加到至少一个侧边缘的第一表面和第一周边区域，并且移除至少一个侧边缘的相对的第二表面和第二周边区域以形成第三表面。还提供了由制造晶片的方法制成的半导体芯片。

4. 发明申请

US20050090110A1 Use of photoresist in substrate vias during backside grind 失效
公开(公告)号：US20050090110A1
公开(公告)日：2005-04-28
申请号：US10989059
申请日：2004-11-15
申请人： Donald Brouillette , Joseph Danaher , Timothy Krywanczyk , Amye Wells
发明人： Donald Brouillette , Joseph Danaher , Timothy Krywanczyk , Amye Wells
IPC分类号： H01L21/768 , H01L21/311
CPC分类号： H01L21/76898
摘要： A structure and method of formation. The substrate has front and back surfaces on opposite sides of the substrate. The substrate has a backside portion extending from the back surface to a second depth into the substrate as measured from the front surface. At least one via is formed in the substrate and extends from the front surface to a via depth into the substrate. The via depth is specific to each via. The via depth of each via is less than an initial thickness of the substrate. The second depth does not exceed the minimum via depth of the via depths. Organic material (e.g., photoresist) is inserted into each via. The organic material is subsequently covered with a tape, followed by removal of the backside portion of the substrate. The tape is subsequently removed from the organic material, followed by removal of the organic material from each via.

5. 发明申请

US20050045591A1 METHOD OF POLISHING C4 MOLYBDENUM MASKS TO REMOVE MOLYBDENUM PEAKS 有权
标题翻译：抛光C4莫氏体掩模去除莫氏体峰的方法
公开(公告)号：US20050045591A1
公开(公告)日：2005-03-03
申请号：US10604991
申请日：2003-08-29
申请人： Steven Codding , Timothy Krywanczyk , Joseph Danaher , John Malinowski , James Palmer , Melvin Kelly , Caitlin Weinstein , Wolfgang Sauter
发明人： Steven Codding , Timothy Krywanczyk , Joseph Danaher , John Malinowski , James Palmer , Melvin Kelly , Caitlin Weinstein , Wolfgang Sauter
IPC分类号： C23F3/06 , H01L21/321 , C23F1/00
CPC分类号： H01L21/3212 , C23F3/06
摘要： A method of treating a molybdenum (moly) mask used in a C4 process to pattern C4 contacts. The moly mask has a wafer side which contacts a wafer during the C4 process and has a rough surface that includes spikes/projections of moly. The moly mask also has a non wafer side and a plurality of holes extending through the mask to pattern C4 contacts in the C4 process. An adhesive layer, such as an adhesive tape, is applied to the non wafer side of the moly mask, to enable a polishing tool to pull a vacuum on the non wafer side of the moly mask in spite of the presence of the holes to secure the moly mask during a subsequent polishing step. The tape also functions as a cushion so that defects on the non wafer side of the moly mask do not replicate through the moly mask to the polished wafer side of the moly mask. The wafer side of the moly mask is then subjected to mechanical or chemical/mechanical polishing to substantially remove the spikes of moly without significantly altering the dimensions of the moly mask or the holes.
摘要翻译：一种处理C4工艺中使用的钼（钼）掩模的图案化C4接触的方法。钼掩模具有在C4工艺期间接触晶片的晶片侧，并且具有包括钼的尖峰/突起的粗糙表面。钼掩模还具有非晶片侧和在C4工艺中延伸穿过掩模以形成图案C4触点的多个孔。粘合剂层例如胶带被施加到钼掩模的非晶片侧，以使得抛光工具能够在钼掩模的非晶片侧上拉真空，尽管存在孔以确保在随后的抛光步骤期间的钼掩模。胶带还起垫片的作用，使得钼掩模的非晶片侧的缺陷不会通过钼掩模复制到钼掩模的抛光晶片侧。然后对钼掩模的晶片侧进行机械或化学/机械抛光，以基本上除去钼的尖峰而不显着改变钼掩模或孔的尺寸。

6. 发明申请

US20080099149A1 REWORK PROCESS FOR REMOVING RESIDUAL UV ADHESIVE FROM C4 WAFER SURFACES 审中-公开
标题翻译：从C4波形表面去除残留紫外线粘合剂的工艺流程
公开(公告)号：US20080099149A1
公开(公告)日：2008-05-01
申请号：US11968669
申请日：2008-01-03
申请人： Steven Codding , Timothy Krywanczyk , Edward Sprogis , Jocelyn Sylvestre , Matthew Whalen
发明人： Steven Codding , Timothy Krywanczyk , Edward Sprogis , Jocelyn Sylvestre , Matthew Whalen
IPC分类号： B32B37/12
CPC分类号： H01L21/67132 , H01L21/02057 , H01L21/67028
摘要： A method for the removal of residual UV radiation-sensitive adhesive from the surfaces of semiconductor wafers, remaining thereon from protective UV radiation-sensitive tapes which were stripped from the semiconductor wafers. Moreover, provided is an arrangement for implementing the removal of residual sensitive adhesive, which remain from tapes employed as protective layers on semiconductor wafers, particularly wafers having surfaces including C4 connections.
摘要翻译：从半导体晶片剥离的保护性紫外线辐射敏感带保留在其上的半导体晶片的表面上去除残留的UV辐射敏感性粘合剂的方法。此外，提供了一种用于实现从半导体晶片上用作保护层的带留下的残留敏感性粘合剂的去除，特别是具有包括C4连接的表面的晶片的布置。

7. 发明申请

US20070077752A1 Rework process for removing residual UV adhesive from C4 wafer surfaces 有权
标题翻译：从C4晶圆表面去除残余UV粘合剂的返工工艺
公开(公告)号：US20070077752A1
公开(公告)日：2007-04-05
申请号：US11243882
申请日：2005-10-04
申请人： Steven Codding , Timothy Krywanczyk , Edmund Sprogis , Jocelyn Sylvestre , Matthew Whalen
发明人： Steven Codding , Timothy Krywanczyk , Edmund Sprogis , Jocelyn Sylvestre , Matthew Whalen
IPC分类号： H01L21/4763 , G03C5/00
CPC分类号： H01L21/67132 , H01L21/02057 , H01L21/67028
摘要： A method for the removal of residual UV radiation-sensitive adhesive from the surfaces of semiconductor wafers, remaining thereon from protective UV radiation-sensitive tapes which were stripped from the semiconductor wafers. Moreover, provided is an arrangement for implementing the removal of residual sensitive adhesive, which remain from tapes employed as protective layers on semiconductor wafers, particularly wafers having surfaces including C4 connections.
摘要翻译：从半导体晶片剥离的保护性紫外线辐射敏感带保留在其上的半导体晶片的表面上去除残留的UV辐射敏感性粘合剂的方法。此外，提供了一种用于实现从半导体晶片上用作保护层的带留下的残留敏感性粘合剂的去除，特别是具有包括C4连接的表面的晶片的布置。

8. 发明申请

US20070029045A1 System and Device For Thinning Wafers That Have Contact Bumps 有权
标题翻译：具有接触碰撞的薄化晶片的系统和器件
公开(公告)号：US20070029045A1
公开(公告)日：2007-02-08
申请号：US11533609
申请日：2006-10-17
申请人： Timothy Krywanczyk , Edmund Sprogis
发明人： Timothy Krywanczyk , Edmund Sprogis
IPC分类号： H01L21/306
CPC分类号： H01L21/78
摘要： In accordance with the foregoing objects and advantages, the present invention provides a fabrication device that may be used during the grinding operation of the fabrication process. The fabrication device comprises a socket plate that includes a plurality of cavities formed therein that correspond in position and number to the solder (or other conductive material) bumps formed on the front surface of a product wafer.
摘要翻译：根据上述目的和优点，本发明提供了可在制造过程的磨削操作期间使用的制造装置。该制造装置包括插座板，该插座板包括形成在其中的多个空腔，其位置和数量与形成在产品晶片的前表面上的焊料（或其他导电材料）凸起相对应。

9. 发明申请

US20050202678A1 Semiconductor wafer front side protection 失效
标题翻译：半导体晶圆正面保护
公开(公告)号：US20050202678A1
公开(公告)日：2005-09-15
申请号：US11117122
申请日：2005-04-28
申请人： Allan Abrams , Donald Brouillette , Joseph Danaher , Timothy Krywanczyk , Rene Lamothe , Ivan Stone , Matthew Whalen
发明人： Allan Abrams , Donald Brouillette , Joseph Danaher , Timothy Krywanczyk , Rene Lamothe , Ivan Stone , Matthew Whalen
IPC分类号： H01L21/301 , H01L21/304 , H01L21/461 , H01L21/302 , H01L21/78
CPC分类号： H01L21/3081 , H01L21/304 , H01L2221/6834
摘要： There is provided a method for making a wafer comprising the steps of providing a substrate having a first surface, an opposite second surface, and at least one side edge defining a thickness of the substrate, the at least one side edge having a first peripheral region and a second peripheral region adjacent to the first peripheral region. The method includes applying a fluid to the first surface and the first peripheral region of the at least one side edge and removing the opposite second surface and the second peripheral region of the at least one side edge to form a third surface. A semiconductor chip made from the method for making the wafer is also provided.
摘要翻译：提供了一种用于制造晶片的方法，包括以下步骤：提供具有第一表面，相对的第二表面和限定衬底的厚度的至少一个侧边缘的衬底，所述至少一个侧边缘具有第一周边区域以及与第一周边区域相邻的第二周边区域。该方法包括将流体施加到至少一个侧边缘的第一表面和第一周边区域，并且移除至少一个侧边缘的相对的第二表面和第二周边区域以形成第三表面。还提供了由制造晶片的方法制成的半导体芯片。

10. 发明申请

US20050106879A1 Method for thinning wafers that have contact bumps 失效
标题翻译：稀释具有接触凸点的晶片的方法
公开(公告)号：US20050106879A1
公开(公告)日：2005-05-19
申请号：US10713659
申请日：2003-11-13
申请人： Timothy Krywanczyk , Edmund Sprogis
发明人： Timothy Krywanczyk , Edmund Sprogis
IPC分类号： H01L21/44 , H01L21/78
CPC分类号： H01L21/78
摘要： In accordance with the foregoing objects and advantages, the present invention provides a fabrication device that may be used during the grinding operation of the fabrication process. The fabrication device comprises a socket plate that includes a plurality of cavities formed therein that correspond in position and number to the solder (or other conductive material) bumps formed on the front surface of a product wafer.
摘要翻译：根据上述目的和优点，本发明提供了可在制造过程的磨削操作期间使用的制造装置。该制造装置包括插座板，该插座板包括形成在其中的多个空腔，其位置和数量与形成在产品晶片的前表面上的焊料（或其他导电材料）凸起相对应。

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