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1. 发明授权

US06946325B2 Methods for packaging microelectronic devices 有权
标题翻译：微电子器件封装方法
公开(公告)号：US06946325B2
公开(公告)日：2005-09-20
申请号：US10653008
申请日：2003-08-28
申请人： Tay Wuu Yean , Victor Tan Cher Khng
发明人： Tay Wuu Yean , Victor Tan Cher Khng
IPC分类号： H01L23/538 , H01L25/10 , H01L21/48 , H01L23/48 , H01R43/00
CPC分类号： H01L24/96 , H01L21/568 , H01L23/5389 , H01L24/19 , H01L24/82 , H01L24/97 , H01L25/105 , H01L2224/04105 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05569 , H01L2224/05571 , H01L2224/12105 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18162 , Y10T29/49222 , H01L2224/82 , H01L2924/00 , H01L2224/05647 , H01L2924/00014 , H01L2224/05666 , H01L2224/05147 , H01L2224/05166
摘要： Methods for packaging microelectronic devices and microelectronic devices formed by such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of microelectronic dies to a support member, covering the dies and at least a portion of the support member with a dielectric layer, forming a plurality of vias through the dielectric layer between the dies, and fabricating a plurality of conductive links in corresponding vias. In another embodiment, a plurality of microelectronic devices includes a support member, a plurality of microelectronic dies coupled to the support member, a dielectric layer over the dies and at least a portion of the support member, and a plurality of conductive links extending from a first surface of the dielectric layer to a second surface. The dies include an integrated circuit and a plurality of bond-pads coupled to the integrated circuit, and the conductive links are disposed between the dies.
摘要翻译：本文公开了用于封装通过这些方法形成的微电子器件和微电子器件的方法。在一个实施例中，一种方法包括将多个微电子管芯耦合到支撑构件，用介电层覆盖模具和支撑构件的至少一部分，形成通过模具之间的介电层的多个通孔，并且制造相应通孔中的多个导电连接。在另一个实施例中，多个微电子器件包括支撑构件，耦合到支撑构件的多个微电子模具，在模具和支撑构件的至少一部分上的电介质层，以及从一个介电层的第一表面到第二表面。模具包括集成电路和耦合到集成电路的多个接合焊盘，并且导电连接件设置在管芯之间。

2. 发明授权

US06773960B2 Methods for forming a slot with a laterally recessed area at an end thereof through an interposer or other carrier substrate 有权
标题翻译：用于通过插入件或其它载体衬底在其端部形成具有侧向凹入区域的槽的方法
公开(公告)号：US06773960B2
公开(公告)日：2004-08-10
申请号：US10435423
申请日：2003-05-08
申请人： Setho Sing Fee , Tay Wuu Yean , Lim Thiam Chye
发明人： Setho Sing Fee , Tay Wuu Yean , Lim Thiam Chye
IPC分类号： H01L2148
CPC分类号： H01L24/97 , H01L21/4803 , H01L23/13 , H01L23/49811 , H01L24/45 , H01L24/48 , H01L24/50 , H01L2224/45124 , H01L2224/45144 , H01L2224/4824 , H01L2224/73215 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01033 , H01L2924/01079 , H01L2924/01087 , H01L2924/09701 , H01L2924/12042 , H01L2924/181 , H05K3/0044 , H05K2203/0228 , H05K2203/1476 , Y10T408/03 , H01L2924/00014 , H01L2224/85 , H01L2924/00
摘要： An interposer includes a substantially planar substrate with a slot formed therethrough. The slot includes a laterally recessed area formed in only a portion of a periphery thereof, which is positioned so as to expose at least a portion of an active surface of the semiconductor die located between a bond pad and an outer periphery of the semiconductor die. The laterally recessed area facilitates access to the bond pad by apparatus for forming, positioning, or securing intermediate conductive elements. The slot may be formed by forming a first, thin elongated slot through the interposer substrate, then widening a portion thereof. Alternatively, a first, small circular hole may be formed through the interposer substrate, then an elongated slot having a width that exceeds the diameter of the small circular hole may be formed through the substrate at a location which is continuous with the small circular hole.
摘要翻译：插入器包括具有穿过其形成的狭槽的基本平坦的基板。狭槽包括只形成在其周边的一部分中的横向凹入区域，其被定位成暴露位于半导体管芯的接合焊盘和外周之间的半导体管芯的有源表面的至少一部分。横向凹陷区域便于通过用于形成，定位或固定中间导电元件的设备进入接合焊盘。槽可以通过形成通过插入器基板的第一细长狭缝，然后加宽其一部分而形成。或者，可以通过插入器基板形成第一小圆形孔，然后可以在与小圆孔连续的位置处形成具有超过小圆孔直径的宽度的细长槽。

3. 发明授权

US07573136B2 Semiconductor device assemblies and packages including multiple semiconductor device components 有权
标题翻译：包括多个半导体器件组件的半导体器件组件和封装
公开(公告)号：US07573136B2
公开(公告)日：2009-08-11
申请号：US11140422
申请日：2005-05-27
申请人： Tongbi Jiang , Setho Sing Fee , Tay Wuu Yean , Lim Thiam Chye
发明人： Tongbi Jiang , Setho Sing Fee , Tay Wuu Yean , Lim Thiam Chye
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： H01L25/0657 , H01L23/3128 , H01L24/48 , H01L24/97 , H01L25/105 , H01L2224/05568 , H01L2224/05573 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/16145 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73257 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555 , H01L2225/06586 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2924/00014 , H01L2924/01079 , H01L2924/01087 , H01L2924/09701 , H01L2924/12042 , H01L2924/15151 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/18165 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A multidie semiconductor device assembly or package includes an interposer comprising a substrate with at least one receptacle therethrough. A plurality of semiconductor device components (e.g., semiconductor devices) may be assembled with the interposer. For example, at least one contact pad of a semiconductor device component adjacent to one surface of the interposer may be electrically connected to a corresponding contact pad of another semiconductor device component positioned adjacent to an opposite surface of the interposer. As another example, multiple semiconductor device components may be at least partially superimposed relative to one another and at least partially disposed within a receptacle of the interposer.
摘要翻译：多元半导体器件组件或封装包括内插器，其包括具有穿过其中的至少一个插座的衬底。多个半导体器件部件（例如，半导体器件）可以与插入器组装。例如，与插入器的一个表面相邻的半导体器件部件的至少一个接触焊盘可以电连接到邻近插入器的相对表面定位的另一个半导体器件部件的对应接触焊盘。作为另一示例，多个半导体器件部件可以至少部分地相对于彼此重叠并且至少部分地设置在插入器的插座内。

4. 发明授权

US06913476B2 Temporary, conformable contacts for microelectronic components 失效
标题翻译：微电子元件的临时，一致的触点
公开(公告)号：US06913476B2
公开(公告)日：2005-07-05
申请号：US10228771
申请日：2002-08-27
申请人： Tay Wuu Yean , Lee Choon Kuan
发明人： Tay Wuu Yean , Lee Choon Kuan
IPC分类号： G01R1/067 , H01R3/08 , H01R13/24 , H05K3/32 , H05K7/10
CPC分类号： G01R1/06783 , H01R12/714 , H01R13/24 , H01R2201/20 , H05K3/326 , H05K7/1061
摘要： Various aspects of the invention provide temporary interfaces for microelectronic components, microelectronic component test systems, and methods of testing microelectronic components. One of the disclosed temporary interfaces employs a substrate having a plurality of terminals and a switch layer carrying a plurality of actuatable liquid switches. These switches may be adapted to conform to a surface of a component terminal to electrically connect the component terminal to a terminal of the substrate. Another adaptation provides a microelectronic component test system including a microelectronic component including a plurality of terminals. A body is juxtaposed with, but spaced from, the microelectronic component. The body carries a plurality of conduits and a conformable conductor is associated with each conduit. Each of these conformable conductors comprises a volume of electrically conductive liquid and the associated conduit.
摘要翻译：本发明的各个方面提供了用于微电子部件，微电子部件测试系统和测试微电子部件的方法的临时接口。所公开的临时接口之一采用具有多个端子的基板和承载多个可致动液体开关的开关层。这些开关可以适于符合元件端子的表面，以将元件端子电连接到基板的端子。另一种适应性提供了包括包括多个端子的微电子部件的微电子部件测试系统。身体与微电子部件并列，但与微电子部件间隔开。身体携带多个导管，并且适配导体与每个管道相关联。这些适形导体中的每一个包括一定体积的导电液体和相关导管。

5. 发明授权

US06906415B2 Semiconductor device assemblies and packages including multiple semiconductor devices and methods 有权
标题翻译：包括多个半导体器件和方法的半导体器件组件和封装
公开(公告)号：US06906415B2
公开(公告)日：2005-06-14
申请号：US10184340
申请日：2002-06-27
申请人： Tongbi Jiang , Setho Sing Fee , Tay Wuu Yean , Lim Thiam Chye
发明人： Tongbi Jiang , Setho Sing Fee , Tay Wuu Yean , Lim Thiam Chye
IPC分类号： H01L23/13 , H01L23/31 , H01L23/498 , H01L25/10 , H05K1/14 , H05K3/34 , H05K3/40 , H01L23/34
CPC分类号： H01L23/13 , H01L23/3128 , H01L23/49805 , H01L25/105 , H01L2224/16145 , H01L2225/1035 , H01L2225/1064 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/09701 , H01L2924/15311 , H01L2924/19041 , H05K1/141 , H05K3/3436 , H05K3/3442 , H05K3/403 , H05K2201/045 , H05K2201/049 , H05K2201/09181 , H05K2201/10727
摘要： A multidie semiconductor device (MDSCD) package includes a generally planar interposer comprising a substrate with a central receptacle, upper surface conductors, and outer connectors on the lower surface of the interposer. Conductive vias connect upper surface conductors with outer connectors. One or more semiconductor devices may be mounted in the receptacle and one or more other semiconductor devices mounted above and/or below the interposer and attached thereto. The package may be configured to have a footprint not significantly larger than the footprint of the largest device and/or a thickness not significantly greater than the combined thickness of included devices. Methods for assembling and encapsulating packages from multidie wafers and multi-interposer sheets or strips are disclosed. Methods for combining a plurality of packages into a single stacked package are disclosed. The methods may include use of somewhat laterally extending intermediate conductive elements, flip-chip style electrical connection, or both within the same package.
摘要翻译：多芯片半导体器件（MDSCD）封装包括大体上平面的中介层，其包括具有中心插座的基板，上表面导体以及插入件下表面上的外部连接器。导电通孔将上表面导体与外部连接器相连。一个或多个半导体器件可以安装在插座中，以及安装在插入件上方和/或下方并附着于其上的一个或多个其它半导体器件。封装可以被配置为具有不显着大于最大器件的占地面积和/或不显着大于所包括的器件的组合厚度的厚度。公开了用于组装和封装来自多芯片晶片和多中介片片或条的封装的方法。公开了将多个封装组合成单个堆叠封装的方法。这些方法可以包括在相同封装内使用稍微侧向延伸的中间导电元件，倒装片式电连接或两者。

6. 发明授权

US08399297B2 Methods of forming and assembling pre-encapsulated assemblies and of forming associated semiconductor device packages 有权
标题翻译：形成和组装预封装组件和形成相关半导体器件封装的方法
公开(公告)号：US08399297B2
公开(公告)日：2013-03-19
申请号：US13277988
申请日：2011-10-20
申请人： Tay Wuu Yean , Wang Ai-Chie
发明人： Tay Wuu Yean , Wang Ai-Chie
IPC分类号： H01L21/00
CPC分类号： H01L23/13 , H01L23/3107 , H01L23/3135 , H01L23/49548 , H01L23/49861 , H01L25/105 , H01L25/16 , H01L27/14618 , H01L31/0203 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/48091 , H01L2224/73265 , H01L2224/81385 , H01L2225/06562 , H01L2225/1017 , H01L2225/1029 , H01L2225/1035 , H01L2225/1041 , H01L2225/1052 , H01L2225/1058 , H01L2924/15151 , H01L2924/15153 , H01L2924/18161 , H01L2924/00014
摘要： Methods of forming pre-encapsulated frames comprise flowing a dielectric encapsulation material around at least one conductive trace. A cavity configured to receive at least one semiconductor device at least partially in the cavity is formed in the encapsulation material. A first connection area of the at least one trace is exposed within the cavity. At least another connection area of the at least one trace is exposed laterally adjacent to the cavity. The dielectric encapsulation material is hardened to form a pre-encapsulated frame.
摘要翻译：形成预封装框架的方法包括使电介质封装材料围绕至少一个导电迹线流动。在封装材料中形成被配置为至少部分地在空腔中容纳至少一个半导体器件的空腔。所述至少一个迹线的第一连接区域在所述空腔内露出。至少一个迹线的至少另一个连接区域横向暴露在空腔附近。电介质封装材料被硬化以形成预封装的框架。

7. 发明申请

US20070128737A1 Microelectronic devices and methods for packaging microelectronic devices 失效
标题翻译：用于封装微电子器件的微电子器件和方法
公开(公告)号：US20070128737A1
公开(公告)日：2007-06-07
申请号：US11600665
申请日：2006-11-15
申请人： Tay Wuu Yean , Victor Tan Cher Khng
发明人： Tay Wuu Yean , Victor Tan Cher Khng
IPC分类号： H01L21/00
CPC分类号： H01L24/96 , H01L21/568 , H01L23/5389 , H01L24/19 , H01L24/82 , H01L24/97 , H01L25/105 , H01L2224/04105 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05569 , H01L2224/05571 , H01L2224/12105 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18162 , Y10T29/49222 , H01L2224/82 , H01L2924/00 , H01L2224/05647 , H01L2924/00014 , H01L2224/05666 , H01L2224/05147 , H01L2224/05166
摘要： Methods for packaging microelectronic devices and microelectronic devices formed by such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of microelectronic dies to a support member, covering the dies and at least a portion of the support member with a dielectric layer, forming a plurality of vias through the dielectric layer between the dies, and fabricating a plurality of conductive links in corresponding vias. In another embodiment, a plurality of microelectronic devices includes a support member, a plurality of microelectronic dies coupled to the support member, a dielectric layer over the dies and at least a portion of the support member, and a plurality of conductive links extending from a first surface of the dielectric layer to a second surface. The dies include an integrated circuit and a plurality of bond-pads coupled to the integrated circuit, and the conductive links are disposed between the dies.
摘要翻译：本文公开了用于封装通过这些方法形成的微电子器件和微电子器件的方法。在一个实施例中，一种方法包括将多个微电子管芯耦合到支撑构件，用介电层覆盖模具和支撑构件的至少一部分，形成通过模具之间的介电层的多个通孔，并且制造相应通孔中的多个导电连接。在另一个实施例中，多个微电子器件包括支撑构件，耦合到支撑构件的多个微电子模具，在模具和支撑构件的至少一部分上的电介质层，以及从一个介电层的第一表面到第二表面。模具包括集成电路和耦合到集成电路的多个接合焊盘，并且导电连接件设置在管芯之间。

8. 发明授权

US08072082B2 Pre-encapsulated cavity interposer 有权
标题翻译：预封装腔插入器
公开(公告)号：US08072082B2
公开(公告)日：2011-12-06
申请号：US12128575
申请日：2008-05-28
申请人： Tay Wuu Yean , Wang Ai-Chie
发明人： Tay Wuu Yean , Wang Ai-Chie
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： H01L23/13 , H01L23/3107 , H01L23/3135 , H01L23/49548 , H01L23/49861 , H01L25/105 , H01L25/16 , H01L27/14618 , H01L31/0203 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/48091 , H01L2224/73265 , H01L2224/81385 , H01L2225/06562 , H01L2225/1017 , H01L2225/1029 , H01L2225/1035 , H01L2225/1041 , H01L2225/1052 , H01L2225/1058 , H01L2924/15151 , H01L2924/15153 , H01L2924/18161 , H01L2924/00014
摘要： A pre-encapsulated cavity interposer, a pre-encapsulated frame, for a semiconductor device.
摘要翻译：用于半导体器件的预封装腔插入件，预封装框架。

9. 发明授权

US07198980B2 Methods for assembling multiple semiconductor devices 有权
标题翻译：组装多个半导体器件的方法
公开(公告)号：US07198980B2
公开(公告)日：2007-04-03
申请号：US10706576
申请日：2003-11-12
申请人： Tongbi Jiang , Setho Sing Fee , Tay Wuu Yean , Lim Thiam Chye
发明人： Tongbi Jiang , Setho Sing Fee , Tay Wuu Yean , Lim Thiam Chye
IPC分类号： H01L23/538
CPC分类号： H01L24/97 , H01L23/3128 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L2224/05599 , H01L2224/16145 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73253 , H01L2224/73265 , H01L2224/85424 , H01L2224/85439 , H01L2224/85444 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/0652 , H01L2225/06555 , H01L2225/06572 , H01L2225/06586 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01049 , H01L2924/01079 , H01L2924/01087 , H01L2924/09701 , H01L2924/12042 , H01L2924/15151 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L2924/18165 , H01L2224/32225 , H01L2924/00012 , H01L2924/00 , H01L2224/85 , H01L2224/81 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： A multidie semiconductor device (MDSCD) package includes a generally planar interposer comprising a substrate with a central receptacle, upper surface conductors, and outer connectors on the lower surface of the interposer. Conductive vias connect upper surface conductors with outer connectors. One or more semiconductor devices may be mounted in the receptacle and one or more other semiconductor devices mounted above and/or below the interposer and attached thereto. The package may be configured to have a footprint not significantly larger than the footprint of the largest device and/or a thickness not significantly greater than the combined thickness of included devices. Methods for assembling and encapsulating packages from multidie wafers and multi-interposer sheets or strips are disclosed. Methods for combining a plurality of packages into a single stacked package are disclosed. The methods may include use of somewhat laterally extending intermediate conductive elements, flip-chip style electrical connection, or both within the same package.
摘要翻译：多芯片半导体器件（MDSCD）封装包括大体上平面的中介层，其包括具有中心插座的基板，上表面导体以及插入件下表面上的外部连接器。导电通孔将上表面导体与外部连接器相连。一个或多个半导体器件可以安装在插座中，以及安装在插入件上方和/或下方并附着于其上的一个或多个其它半导体器件。封装可以被配置为具有不显着大于最大器件的占地面积和/或不显着大于所包括的器件的组合厚度的厚度。公开了用于组装和封装来自多芯片晶片和多中介片片或条的封装的方法。公开了将多个封装组合成单个堆叠封装的方法。这些方法可以包括在相同封装内使用稍微侧向延伸的中间导电元件，倒装片式电连接或两者。

10. 发明授权

US07145228B2 Microelectronic devices 有权
标题翻译：微电子器件
公开(公告)号：US07145228B2
公开(公告)日：2006-12-05
申请号：US11186534
申请日：2005-07-21
申请人： Tay Wuu Yean , Victor Tan Cher Khng
发明人： Tay Wuu Yean , Victor Tan Cher Khng
IPC分类号： H01L23/04
CPC分类号： H01L24/96 , H01L21/568 , H01L23/5389 , H01L24/19 , H01L24/82 , H01L24/97 , H01L25/105 , H01L2224/04105 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05569 , H01L2224/05571 , H01L2224/12105 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18162 , Y10T29/49222 , H01L2224/82 , H01L2924/00 , H01L2224/05647 , H01L2924/00014 , H01L2224/05666 , H01L2224/05147 , H01L2224/05166
摘要： Methods for packaging microelectronic devices and microelectronic devices formed by such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of microelectronic dies to a support member, covering the dies and at least a portion of the support member with a dielectric layer, forming a plurality of vias through the dielectric layer between the dies, and fabricating a plurality of conductive links in corresponding vias. In another embodiment, a plurality of microelectronic devices includes a support member, a plurality of microelectronic dies coupled to the support member, a dielectric layer over the dies and at least a portion of the support member, and a plurality of conductive links extending from a first surface of the dielectric layer to a second surface. The dies include an integrated circuit and a plurality of bond-pads coupled to the integrated circuit, and the conductive links are disposed between the dies.
摘要翻译：本文公开了用于封装通过这些方法形成的微电子器件和微电子器件的方法。在一个实施例中，一种方法包括将多个微电子管芯耦合到支撑构件，用介电层覆盖模具和支撑构件的至少一部分，形成通过模具之间的介电层的多个通孔，并且制造相应通孔中的多个导电连接。在另一个实施例中，多个微电子器件包括支撑构件，耦合到支撑构件的多个微电子模具，在模具和支撑构件的至少一部分上的电介质层，以及从一个介电层的第一表面到第二表面。模具包括集成电路和耦合到集成电路的多个接合焊盘，并且导电连接件设置在管芯之间。

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