专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US4205390A Address converter 失效
标题翻译：地址转换器
公开(公告)号：US4205390A
公开(公告)日：1980-05-27
申请号：US945444
申请日：1978-09-25
申请人： Kiyoshi Sakurai , Tateo Matsumoto , Teruo Ishikawa
发明人： Kiyoshi Sakurai , Tateo Matsumoto , Teruo Ishikawa
IPC分类号： G06F12/06 , G06F5/00 , G06F13/00
CPC分类号： G06F12/06
摘要： An address converter for decoding a multi-bit binary address has a binary adder to provide a logic subtraction of binary bit information introduced by a plurality of manually settable switches from a predetermined number of most significant binary bits in an address signal, an address-decode circuit for receiving an output signal from the adder and the next order of magnitude of the binary bits in the address signal and a plurality of system subunits which receive an output signal from the address-decode circuit and the remaining least significant bit information in the address signal to access the subunits according to the address signal and the switch settings in a predetermined order.
摘要翻译：用于解码多位二进制地址的地址转换器具有二进制加法器，以从地址信号中的预定数量的最高有效二进制位提供由多个可手动设置的开关引入的二进制位信息的逻辑减法，地址解码用于接收来自加法器的输出信号和地址信号中的二进制位的下一个数量级的多个系统子单元，以及从地址译码电路接收输出信号的多个系统子单元和地址中的剩余的最低有效位信息信号根据地址信号和开关设置以预定顺序访问子单元。

IPRDB

热门服务

关于我们

友情链接

联系方式