专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06069579A Folding type A/D converter and folding type A/D converter circuit 有权
标题翻译：折叠式A / D转换器和折叠式A / D转换电路
公开(公告)号：US06069579A
公开(公告)日：2000-05-30
申请号：US131238
申请日：1998-08-07
申请人： Masao Ito , Takeshi Shigenobu , Toshio Kumamoto , Takahiro Miki , Hiroshi Komurasaki
发明人： Masao Ito , Takeshi Shigenobu , Toshio Kumamoto , Takahiro Miki , Hiroshi Komurasaki
IPC分类号： H03M1/14 , H03M1/20 , H03M1/36 , H03M1/12
CPC分类号： H03M1/205 , H03M1/141
摘要： An A/D converter simplifies its circuit configuration without deteriorating accuracy in A/D conversion. A circuit is formed of a folding and interpolation type. A gain-variable pre-amplifier group 11 amplifies each of reference voltages Vref1 to VrefN and an analog input voltage Vin, to output the result to a folding amplifier group 12, while a gain-variable pre-amplifier group 21 amplifies each of reference voltages Vrr1 to VrrJ and the analog input voltage Vin, to output the result to a comparator group 24. Each of pre-amplifiers constituting the gain-variable pre-amplifier groups 11 and 21 has an amplification factor that varies in upper and lower comparison periods according to a clock control signal .PHI.cnt.
摘要翻译： A / D转换器简化了其电路配置，而不会降低A / D转换的精度。电路由折叠和内插形式组成。增益可变前置放大器组11放大每个参考电压Vref1至VrefN和模拟输入电压Vin，以将结果输出到折叠放大器组12，而增益可变的前置放大器组21放大每个参考电压 Vrr1至VrrJ和模拟输入电压Vin，将结果输出到比较器组24.构成增益可变前置放大器组11和21的每个前置放大器具有在上和下比较周期内变化的放大系数，到时钟控制信号PHI cnt。

2. 发明申请

US20060132417A1 Semiconductor integrated circuit for liquid crystal display driver 审中-公开
标题翻译：半导体集成电路用于液晶显示驱动
公开(公告)号：US20060132417A1
公开(公告)日：2006-06-22
申请号：US11311161
申请日：2005-12-20
申请人： Takeshi Shigenobu , Mitsuru Hiraki , Masashi Horiguchi , Kazuo Okado , Takesada Akiba
发明人： Takeshi Shigenobu , Mitsuru Hiraki , Masashi Horiguchi , Kazuo Okado , Takesada Akiba
IPC分类号： G09G3/36
CPC分类号： G09G3/3696 , G09G3/3674 , G09G3/3685
摘要： In a liquid crystal drive controller formed as a semiconductor integrated circuit having therein a power source circuit including a boosting circuit and driving a source line and a gate line of a TFT liquid crystal panel, the number of external capacitive elements and the number of external terminals for connecting the external capacitive elements are reduced, thereby reducing the size and cost of the chip and an electronic device on which the chip is mounted. As a boosting circuit for generating a voltage for driving a source line of the TFT liquid crystal panel in the liquid crystal controller having therein the power source including the boosting circuit, a boosting circuit having an external capacitive element is used. On the other hand, as a boosting circuit for generating a voltage for driving a gate line, a charge pump having a built-in (on-chip) capacitive element is used.
摘要翻译：在形成为半导体集成电路的液晶驱动控制器中，其中具有包括升压电路并驱动TFT液晶面板的源极线和栅极线的电源电路，外部电容元件的数量和外部端子的数量用于连接外部电容元件的功能减小，从而减小芯片的尺寸和成本以及安装芯片的电子设备。作为用于在其中具有包括升压电路的电源的液晶控制器中产生用于驱动TFT液晶面板的源极线的电压的升压电路，使用具有外部电容元件的升压电路。另一方面，作为用于产生用于驱动栅极线的电压的升压电路，使用具有内置（片上）电容元件的电荷泵。

3. 发明授权

US06278395B1 Folding and interpolation analog-to-digital converter 失效
标题翻译：折叠和插补模数转换电路
公开(公告)号：US06278395B1
公开(公告)日：2001-08-21
申请号：US09435207
申请日：1999-11-05
申请人： Masao Ito , Takeshi Shigenobu
发明人： Masao Ito , Takeshi Shigenobu
IPC分类号： H03M150
CPC分类号： H03M1/205 , H03M1/141
摘要： An object is to obtain an A/D converter with improved A/D conversion accuracy. The resistor elements (R) and (R) are connected through wiring (L10) (2×L11, L12, 2×L13) mostly with two resistor elements left therebetween. For example, the resistor elements (R1) and (R2) are connected through the partial wiring (L11) and (L13) extended to the left in the diagram, and the resistor elements (R3) and (R4) are connected through the partial wiring (L11) and (L13) extended to the right in the diagram. Thus all of the wiring (L10) connecting electrically adjacent resistor elements (R) and (R) are formed of a combination of partial wiring {2×L11, L12, 2×L13}.
摘要翻译：目的是获得具有改进的A / D转换精度的A / D转换器。电阻元件（R）和（R）通过布线（L10）（2xL11，L12,2XL13）连接，其中大部分留有两个电阻元件。例如，电阻元件（R1）和（R2）通过图中左侧的部分布线（L11）和（L13）连接，电阻元件（R3）和（R4）通过部分接线图（L11）和（L13）在图中向右延伸。因此，连接电相邻的电阻元件（R）和（R）的所有布线（L10）由部分布线{2xL11，L12,2×L13}的组合形成。

4. 发明授权

US06566942B2 Multistage amplifier circuit 失效
标题翻译：多级放大电路
公开(公告)号：US06566942B2
公开(公告)日：2003-05-20
申请号：US09931060
申请日：2001-08-17
申请人： Takeshi Shigenobu
发明人： Takeshi Shigenobu
IPC分类号： H03F102
CPC分类号： H03F3/45977
摘要： A coupler/isolator alternatively couples and isolates unit amplifiers of a multiple stage chopper amplifier to shift gradually and slightly reset timing and amplification timing of the chopper amplifiers. In this way, a first-stage chopper amplifier to an n-th timing of the chopper amplifiers. In this way, a first-stage chopper amplifier to an n-th stage chopper amplifier are sequentially reset. The first-stage chopper amplifier to the n-th stage chopper amplifier are sequentially operated to amplify, in a pipeline format, a differential voltage between a signal voltage input to a signal voltage input terminal and a reference voltage input to a reference voltage input terminal, and supply the amplified differential voltage to a next-stage circuit.
摘要翻译：耦合器/隔离器交替地耦合和隔离多级斩波放大器的单元放大器，以逐渐和稍微复位斩波放大器的定时和放大定时。以这种方式，将斩波放大器的第n级定时的第一级斩波放大器。以这种方式，第一级斩波放大器到第n级斩波放大器被顺序复位。顺序地对第n级斩波放大器的第一级斩波放大器以流水线格式放大输入到信号电压输入端的信号电压与输入到参考电压输入端的参考电压之间的差分电压并将放大的差分电压提供给下一级电路。

5. 发明授权

US06232804B1 Sample hold circuit having a switch 失效
标题翻译：具有开关的采样保持电路
公开(公告)号：US06232804B1
公开(公告)日：2001-05-15
申请号：US09413751
申请日：1999-10-06
申请人： Takeshi Shigenobu , Masao Ito , Toshio Kumamoto
发明人： Takeshi Shigenobu , Masao Ito , Toshio Kumamoto
IPC分类号： G11C2702
CPC分类号： G11C27/026
摘要： In a sample hold circuit (6, 50, 60) capable of relaxing a dependency of a voltage of an analogue input signal on an ON resistance of a switch (2). In the sample hold circuit (6, 50, 60), plural reference voltages VrefN are supplied, and unit switches (11e) forming the switch (2) are selectively activated (an ON state) based on a comparison results (whether or not the voltage of the analogue input signal is greater than each reference voltage) from plural comparison circuits (13e) whose operations are performed based on the voltage of the analogue input signal (1).
摘要翻译：在能够放松模拟输入信号的电压对开关（2）的导通电阻的依赖性的采样保持电路（6,50,60）中。在采样保持电路（6,50,60）中，提供多个参考电压VrefN，并且基于比较结果（形成开关（2））的单元开关（11e）是否被选择性地激活（ON状态）根据模拟输入信号（1）的电压执行其操作的多个比较电路（13e），模拟输入信号的电压大于每个参考电压）。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式